MIC23451

MIC23451
3MHz, 2A Triple Synchronous
Buck Regulator with
HyperLight Load® and Power Good
General Description
Features
The MIC23451 is a high-efficiency, 3MHz, triple 2A,
®
synchronous buck regulator with HyperLight Load mode.
HyperLight Load provides very-high efficiency at light
loads and ultra-fast transient response, which is ideal for
supplying processor core voltages. An additional benefit of
this proprietary architecture is very low output ripple
voltage throughout the entire load range with the use of
small output capacitors. The 4mm x 4mm QFN package
saves board space and requires only five external
components for each channel.
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The MIC23451 is designed for use with a very small
inductor, down to 0.47µH, and an output capacitor as small
as 2.2µF that enables a total solution size that is less than
1mm height.
The MIC23451 has a very-low quiescent current of 24µA
each channel and achieves as high as 81% efficiency at
1mA. At higher loads, the MIC23451 provides a constant
switching frequency around 3MHz while achieving peak
efficiencies up to 93%.
The MIC23451 is available in a 26-pin 4mm x 4mm QFN
package with an operating junction temperature range
from –40°C to +125°C.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
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2.7V to 5.5V input voltage
Three independent 2A outputs
Up to 93% peak efficiency
81% typical efficiency at 1mA
Three independent power good indicators
24µA typical quiescent current (per channel)
3MHz PWM operation in continuous mode
Ultra-fast transient response
Low voltage output ripple
− 30mVPP ripple in HyperLight Load mode
− 5mV output voltage ripple in full PWM mode
Fully integrated MOSFET switches
0.1µA shutdown current (per channel)
Thermal-shutdown and current-limit protection
Output voltage as low as 1V
26-pin 4mm × 4mm QFN
–40°C to +125°C junction temperature range
Applications
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Solid state drives (SSD)
µC/µP, FPGA, and DSP power
Test and measurement systems
Set-top boxes and DTV
High-performance servers
Security/surveillance cameras
5V POL applications
Typical Application
HyperLight Load is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
November 5, 2013
Revision 1.2
Micrel, Inc.
MIC23451
Ordering Information
Part Number
Marking
Nominal Output
Voltage
Junction Temperature
(1)
Range
AAA
Adj./Adj./Adj.
–40°C to +125°C
MIC23451-AAAYFL
(2,3)
Package
26-Pin 4mm × 4mm QFN
Lead Finish
Pb-Free
Notes:
1. Other options are available. Contact Micrel for details.
2. QFN is a Green, RoHS-compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.
3. QFN • = Pin 1 identifier
Pin Configuration
26-Pin 4mm × 4mm QFN (FL) − Adjustable
(Top View)
Pin Description
Pin Number
Pin Name
Pin Function
26, 4, 7
SW1, 2, 3
Switch (Output). Internal power MOSFET output switches for output 1/2/3.
21, 19, 15
EN1, 2, 3
Enable (Input). Logic high enables operation of regulator 1/2/3. Logic low will shut down the
device. Do not leave floating.
22, 18, 12
SNS1, 2, 3
Sense. Connect to VOUT1,2,3 as close to output capacitor as possible to sense output voltage.
23, 17, 14
FB1, 2, 3
Feedback. Connect a resistor divider from output 1/2/3 to ground to set the output voltage.
20, 16, 13
PG1, 2, 3
Power Good. Open-drain output for the power good indicator for output 1/2/3. Place a resistor
between this pin and a voltage source to detect a power good condition.
EP1, 24, 11
AGND
25, 5, 8
PVIN1, 2, 3
Power Input Voltage. Connect a capacitor to PGND to localize loop currents and decouple
switching noise.
3, 6, 9
AVIN1, 2, 3
Analog Input Voltage. Connect a capacitor to AGND to decouple noise.
EP2, 10, 2, 1
PGND
November 5, 2013
Analog Ground. Connect to quiet ground point away from high-current paths, for example, COUT,
for best operation. Must be connected externally to PGND.
Power Ground.
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Micrel, Inc.
MIC23451
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (PVIN, AVIN) .................................. −0.3 to 6V
Sense (VSNS1, VSNS2, VSNS3). ................................. −0.3 to 6V
Power Good (PG1, PG2, PG3) ............................ −0.3 to 6V
Output Switch Voltage (VSW1, VSW2, VSW3)......... −0.3V to 6V
Enable Input Voltage (VEN1, VEN2, VEN3) ............ −0.3V to VIN
Storage Temperature Range .................... −65°C to +150°C
(3)
ESD Rating ................................................. ESD Sensitive
Supply Voltage (VIN) ..................................... +2.7V to +5.5V
Enable Input Voltage (VEN1, VEN2, VEN3) ................. 0V to VIN
Output Voltage Range (VSNS1, VSNS2, VSNS3) ... +1V to +3.3V
Junction Voltage Range (TJ) ............... −40°C ≤ TJ ≤ +125°C
Thermal Resistance
26-Pin 4mm × 4mm QFN (θJA)......................... +20°C/W
26-Pin 4mm × 4mm QFN (θJC) ........................ +10°C/W
Electrical Characteristics(4)
TA = +25°C; VIN = VEN1, VEN2, VEN3 = 3.6V; L1 = L2 = L3 = 1µH; COUT1, COUT2, COUT3 = 4.7µF, unless otherwise specified.
Bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted.
Parameter
Condition
Min.
2.7
Supply Voltage Range
Undervoltage Lockout Threshold
Typ.
2.45
Turn-On
Undervoltage Lockout Hysteresis
2.55
Max.
Units
5.5
V
2.65
V
75
mV
Quiescent Current
IOUT = 0mA, SNS > 1.2 × VOUTNOM
65
120
µA
Per Channel Shutdown Current
VEN1, VEN2, VEN3 = 0V; VIN = 5.5V
0.1
5
µA
+2.5
%
0.635
V
Output Voltage Accuracy
VIN = 3.6V if VOUT(NOM) < 2.5V, ILOAD = 20mA
VIN = 4.5V if VOUT(NOM) ≥ 2.5V, ILOAD = 20mA
Feedback Voltage
(VFB1, VFB2, VFB3)
Peak Current Limit
IOUT1, IOUT2, IOUT3
SNS1, SNS2, SNS3 = 0.9 × VOUTNOM
−2.5
0.604
0.62
2.2
4.1
A
2.3
A
0.3
%/V
Foldback Current Limit
Output Voltage Line Regulation
(VOUT1, VOUT2, VOUT3)
Output Voltage Load Regulation
(VOUT1, VOUT2, VOUT3)
VIN = 3.6V to 5.5V if VOUTNOM1, 2, 3 < 2.5V, ILOAD = 20mA
VIN = 4.5V to 5.5V if VOUTNOM1, 2, 3 ≥ 2.5V, ILOAD = 20mA
DCM: 20mA < ILOAD < 130mA, VIN = 3.6V if VOUTNOM < 2.5V
0.2
DCM: 20mA < ILOAD < 130mA, VIN = 5.0V if VOUTNOM > 2.5V
0.4
CCM: 200mA < ILOAD < 500mA, VIN = 3.6V if VOUTNOM < 2.5V
0.6
CCM: 200mA < ILOAD < 1A, VIN = 5.0V if VOUTNOM > 2.5V
0.3
PWM Switch ON-Resistance
(RSW1, RSW2, RSW3)
ISW1, ISW2, ISW3 = +100mA (PMOS)
Maximum Frequency
%
0.217
Ω
IOUT1, IOUT2, IOUT3 = 120mA
3
MHz
Soft-Start Time
VOUT1, VOUT2, VOUT3 = 90%
150
µs
Power Good Threshold
% of VNOM
83
Power Good Hysteresis
Power Good Pull Down
90
96
10
VSNS = 90% VNOM, IPG = 1mA
%
%
200
mV
Notes:
1. Exceeding the absolute maximum ratings may damage the device.
2. The device is not guaranteed to function outside its operating ratings.
3. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
4. Specification for packaged product only.
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MIC23451
Electrical Characteristics(4) (Continued)
TA = +25°C; VIN = VEN1, VEN2, VEN3 = 3.6V; L1 = L2 = L3 = 1µH; COUT1, COUT2, COUT3 = 4.7µF, unless otherwise specified.
Bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted.
Parameter
Condition
Min.
Typ.
Max.
Units
Enable Threshold
Turn-On
0.5
0.9
1.2
V
Enable Input Current
0.1
1
µA
Overtemperature Shutdown
160
°C
Overtemperature Shutdown
Hysteresis
20
°C
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MIC23451
Typical Characteristics
Current Limit
vs. Input Voltage
5.0
PEAK CURRENT LIMIT (A)
4.8
4.6
CH1 = 2.5V
4.4
4.2
4.0
CH3 = 1.2V
3.8
3.6
CH2 = 1.8V
3.4
3.2
3.0
2
3
4
5
6
INPUT VOLTAGE (V)
Shutdown Current
vs. Input Voltage
Line Regulation
(Low Loads)
180
1.90
140
OUTPUT VOLTAGE (V)
SUPPLY CURRENT (nA)
160
120
100
80
60
40
1.85
IOUT = 80mA
IOUT = 20mA
1.80
IOUT = 1mA
1.75
20
0
2
3
4
5
6
1.70
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Output Voltage
vs. Temperature
Output Voltage
vs. Output Current (HLL)
1.84
1.90
1.86
1.84
VIN = 5V
1.82
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.88
VIN = 3.6V
1.80
1.78
VIN = 3V
1.76
1.74
1.72
1.70
1.82
VIN = 5.5V
VIN = 3.6V
1.80
1.78
VIN = 2.7V
1.76
VOUT = 1.8V
0
0.03
0.06
0.09
0.12
0.15
1.74
0.18
LOAD CURRENT (A)
November 5, 2013
-60 -40 -20
0
20
40
60
80 100 120 140
TEMPERATURE (°C)
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Micrel, Inc.
MIC23451
Typical Characteristics (Continued)
PG Delay Time
vs. Input Voltage
PG Thresholds
vs. Input Voltage
100
PG DELAY (µs)
PG RISING
60
40
20
PG FALLING
2
3
4
5
0.90
0.88
0.87
0.86
0.85
PG FALLING
0.84
2.0
2.5
3.0
1.0
0.9
0.8
0.7
5.0
5.5
2.51
2.49
2.47
6.0
UVLO FALLING
-60 -40 -20
0
20
40
80 100 120 140
60
TEMPERATURE (°C)
Switching Frequency
vs. Load Current
1.0
10000
0.9
1000
0.8
0.7
VIN = 3.6V
100
VIN = 3V
VIN = 5V
10
1
0.6
TAMB = 25°C
2.5
4.5
FREQUENCY (kHz)
1.1
ENABLE THRESHOLD (V)
ENABLE THRESHOLD (V)
1.2
2.0
4.0
2.53
Enable Threshold vs.
Temperature
Enable Threshold
vs. Input Voltage
0.5
3.5
2.55
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
0.6
UVLO RISING
PG RISING
0.89
0.83
6
2.57
UVLO THRESHOLD (V)
PG THRESHOLD (% of VREF)
0.91
80
0
UVLO Threshold
vs. Temperature
VIN = 3.6V
3.0
3.5
4.0
4.5
5.0
5.5
6.0
INPUT VOLTAGE (V)
0.5
-60
-40
-20
VOUT = 1.8V
0
20
40
60
TEMPERATURE (°C)
80
100 120
0.1
0.0001
0.001
0.01
0.1
1
10
OUTPUT CURRENT (A)
VFB
vs. Temperature
0.640
0.635
VFB (V)
0.630
VIN = 5.5V
0.625
0.620
0.615
VIN = 3.6V
VIN=2.7V
0.610
0.605
0.600
-60 -40 -20
0
20
40
60
80 100 120 140
TEMPERATURE (°C)
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MIC23451
Typical Characteristics (Continued)
Max Package Dissipation
vs. Ambient Temperature
POWER DISSIPATION (W)
7
6
5
4
3
2
1
0
0
20
40
60
80
100
120
AMBIENT TEMPERATURE (°C)
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MIC23451
Functional Characteristics
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MIC23451
Functional Characteristics (Continued)
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MIC23451
Functional Characteristics (Continued)
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MIC23451
Functional Diagram
Figure 1. Simplified MIC23451 Adjustable Functional Block Diagram
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MIC23451
Functional Description
PGND
The power ground pin is the ground path for the high
current in PWM mode. The current loop for the power
ground should be as short and wide as possible and
separate from the analog ground (AGND) loop as
applicable. Refer to the “PCB Layout Recommendations”
section for more details.
PVIN
The input supply (PVIN) provides power to the internal
MOSFETs for the switch mode regulator. The VIN
operating range is 2.7V to 5.5V, so an input capacitor,
with a minimum voltage rating of 6.3V is recommended.
Because of the high di/dt switching speeds, a minimum
2.2µF or 4.7µF recommended bypass capacitor, placed
close to PVIN and the power ground (PGND) pin, is
required. Refer to the “PCB Layout Recommendations”
section for details.
PG
The power good (PG) pin is an open-drain output that
indicates logic high when the output voltage is typically
above 90% of its steady state voltage. A pull-up resistor
of more than 5kΩ should be connected from PG to VOUT.
AVIN
The input supply (AVIN) provides power to the internal
control circuitry. Because the high di/dt switching speeds
on PVIN cause small voltage spikes, a 50Ω RC filter and
a minimum 100nF decoupling capacitor, placed close to
the AVIN and signal ground (AGND) pin, is required.
FB
The feedback (FB) pin is the control input for
programming the output voltage. A resistor divider
network is connected to this pin from the output and is
compared to the internal 0.62V reference within the
regulation loop.
EN
A logic high signal on the enable pin (EN) activates the
output voltage of the device. A logic low signal on the
enable pin deactivates the output and reduces supply
current to 0.01µA. The MIC23451 features internal softstart circuitry that reduces inrush current and prevents
the output voltage from overshooting at start-up. Do not
leave the EN pin floating.
The output voltage can be programmed between 1V and
3.3V using Equation 1:
R1 

VOUT = VREF × 1 +

R2 

Eq. 1
where:
R1 is the top, VOUT connected resistor
R2 is the bottom, AGND connected resistor
SW
The switch (SW) connects directly to one end of the
inductor and provides the current path during switching
cycles. The other end of the inductor is connected to the
load, SNS pin, and output capacitor. Because of the highspeed switching on this pin, the switch node should be
routed away from sensitive nodes.
Table 1 shows example feedback resistor values.
Table 1. Feedback Resistor Values
SNS
The sense (SNS) pin is connected to the output of the
device to provide feedback to the control circuitry. The
SNS connection should be placed close to the output
capacitor. Refer to the “PCB Layout Recommendations”
section for more details.
VOUT
R1
R2
1.2V
274k
294k
1.5V
316k
221k
1.8V
301k
158k
2.5V
324k
107k
3.3V
309k
71.5k
AGND
The analog ground (AGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the power ground
(PGND) loop. Refer to the “PCB Layout Recommendations”
section for more details.
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MIC23451
Application Information
Maximum current ratings of the inductor are generally
given in two forms: permissible DC current and saturation
current. Permissible DC current can be rated either for a
40°C temperature rise or a 10% to 20% loss in
inductance. Make sure the inductor selected can handle
the maximum operating current. When saturation current
is specified, make sure that there is enough margin, so
that the peak current does not cause the inductor to
saturate. Peak current can be calculated as shown in
Equation 2:
The MIC23451 is a triple high performance DC-to-DC
step down regulator offering a small solution size.
Supporting three outputs with currents up to 2A inside a
4mm × 4mm QFN package, the IC requires only five
external components per channel while meeting today’s
miniature portable electronic device needs. Using the
HyperLight Load switching scheme, the MIC23451 can
maintain high efficiency throughout the entire load range
while providing ultra-fast load transient response. The
following sections provide additional device application
information.

 1 − VOUT /VIN
IPEAK = IOUT + VOUT 
 2× f ×L

Input Capacitor
A 2.2µF or greater ceramic capacitor should be placed
close to the PVIN pin for each channel and its
corresponding PGND pin for bypassing. For example, the
Murata GRM188R60J475ME19D, size 0603, 4.7µF
ceramic capacitor is ideal, based on performance, size,
and cost. An X5R or X7R temperature rating is
recommended for the input capacitor. Y5V temperature
rating capacitors, in addition to losing most of their
capacitance over temperature, can also become resistive
at high frequencies. This reduces their ability to filter out
high-frequency noise.



Eq. 2
As Equation 2 shows, the peak inductor current is
inversely proportional to the switching frequency and the
inductance; the lower the switching frequency or the
inductance the higher the peak current. As input voltage
increases, the peak current also increases.
The size of the inductor depends on the requirements of
the application. Refer to the “Typical Application
Schematic” and “Bill of Materials” sections for details.
DC resistance (DCR) is also important. While DCR is
inversely proportional to size, DCR can represent a
significant efficiency loss. Refer to the “Efficiency
Considerations” section.
Output Capacitor
The MIC23451 is designed for use with a 2.2µF or
greater ceramic output capacitor. Increasing the output
capacitance lowers output ripple and improves load
transient response, but could also increase solution size
or cost. A low equivalent series resistance (ESR) ceramic
output
capacitor,
such
as
the
Murata
GRM188R60J475ME84D, size 0603, 4.7µF ceramic
capacitor, is recommended based on performance, size,
and cost. Both the X7R or X5R temperature rating
capacitors are recommended. The Y5V and Z5U
temperature rating capacitors are not recommended due
to their wide variation in capacitance over temperature
and increased resistance at high frequencies.
The transition between high loads (CCM) to HyperLight
Load (HLL) mode is determined by the inductor ripple
current and the load current, as shown in Figure 2.
Inductor Selection
When selecting an inductor, it is important to consider the
following factors (not necessarily in order of importance):
•
Inductance
•
Rated current value
•
Size requirements
•
DC resistance (DCR)
Figure 2. Transition between CCM Mode and HLL Mode
The diagram shows the signals for high-side switch drive
(HSD) for TON control, the inductor current, and the lowside switch drive (LSD) for TOFF control.
The MIC23451 is designed for use with a 0.47µH to
2.2µH inductor. For faster transient response, a 0.47µH
inductor yields the best result. On the other hand, a
2.2µH inductor yields lower output voltage ripple. For the
best compromise of these, a 1µH is generally
recommended.
November 5, 2013
In HLL mode, the inductor is charged with a fixed TON
pulse on the high-side switch (HSD). After this, the LSD
is switched on and current falls at a rate of VOUT/L. The
controller remains in HLL mode while the inductor falling
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MIC23451
current is detected to cross approximately –50mA. When
the LSD (or TOFF) time reaches its minimum and the
inductor falling current is no longer able to reach this
−50mA threshold, the part is in CCM mode and switching
at a virtually constant frequency.
Once in CCM mode, the TOFF time does not vary.
Therefore, it is important to note that if L is large enough,
the HLL transition level will not be triggered.
That inductor is:
L MAX =
VOUT × 135ns
2 × 50mA
Eq. 3
Compensation
The MIC23451 is designed to be stable with a 0.47µH to
2.2µH inductor with a 4.7µF ceramic (X5R) output
capacitor.
Figure 3. Efficiency under Load
Duty Cycle
The typical maximum duty cycle of the MIC23451 is 80%.
Figure 3 shows an efficiency curve. From no load to
100mA, efficiency losses are dominated by quiescent
current losses, gate drive, and transition losses. By using
the HyperLight Load mode, the MIC23451 can maintain
high efficiency at low output currents.
Efficiency Considerations
Efficiency is defined as the amount of useful output
power, divided by the amount of power supplied.
V
×I
Efficiency % =  OUT OUT
 VIN × IIN

 × 100

Over 100mA, efficiency loss is dominated by MOSFET
RDSON and inductor losses. Higher input supply voltages
will increase the gate-to-source voltage on the internal
MOSFETs, thereby reducing the internal RDSON. This
improves efficiency by reducing DC losses in the device.
All but the inductor losses are inherent to the device.
Because of this, inductor selection becomes increasingly
critical in efficiency calculations. As the inductors are
reduced in size, the DC resistance (DCR) can become
very significant. The DCR losses can be calculated as
shown in Equation 5.
Eq. 4
Maintaining high efficiency serves two purposes. It
reduces power dissipation in the power supply, reducing
the need for heat sinks and thermal design
considerations, and it reduces current consumption for
battery-powered applications. Reduced current draw from
a battery increases the device’s operating time and is
critical in hand-held devices.
PDCR = IOUT 2 × DCR
There are two types of losses in switching converters: DC
losses and switching losses. DC losses are the power
2
dissipation of I R. Power is dissipated in the high-side
switch during the on cycle. Power loss is equal to the
high-side MOSFET RDSON multiplied by the switch current
squared. During the off cycle, the low-side N-channel
MOSFET conducts, also dissipating power. Device
operating current also reduces efficiency. The product of
the quiescent (operating) current and the supply voltage
represents another DC loss. The current required to drive
the gates on and off at a constant 4MHz frequency, and
the switching transitions, make up the switching losses.
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Eq. 5
From that, the loss in efficiency caused by inductor
resistance can be calculated as shown in Equation 6.
 
VOUT × IOUT
Efficiency Loss = 1 − 
V
  OUT × IOUT + PDCR

 × 100


Eq. 6
Efficiency loss caused by DCR is minimal at light loads
and gains significance as the load is increased. Inductor
selection becomes a trade-off between efficiency and
size in this case.
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MIC23451


V
V
2
PDISS = IOUT  RDSON_P × OUT + RDSON_N × 1 − OUT  

VIN
VIN  


Eq. 9
Thermal Considerations
Most applications will not require 2A continuous current
from all outputs at all times, so it is useful to know what
the thermal limits are for various loading profiles.
where:
RDSON_P = Maximum RDSON of the high-side, P-Channel
switch at TJMAX
RDSON_N = Maximum RDSON of the low-side, N-Channel
switch at TJMAX
VOUT = Output voltage
VIN = Input voltage
The allowable overall package dissipation is limited by
the intrinsic thermal resistance of the package (Rθ(J-C))
and the area of copper used to spread heat from the
package case to the ambient surrounding temperature
(Rθ(C-A)). The composite of these two thermal resistances
is Rθ(J-A), which represents the package thermal
resistance with at least 1 square inch of copper ground
plane. From this figure, which for the MIC23451 is
20°C/W, we can calculate maximum internal power
dissipation, as shown in Equation 7:
PD MAX =
TJMAX − TAMB
Rθ (J− A)
Because ripple current and switching losses are small
with respect to resistive losses at maximum output
current, they can be considered negligible for the purpose
of this method, but could be included if required.
Eq. 7
Using the function describing PDISS in terms of IOUT,
substitute PDISS with Equation 7 to form the function of
maximum output current IOUTMAX vs. ambient temperature
TAMB (Equation 10):
where:
TJMAX = Maximum junction temp (125°C)
TAMB = Ambient temperature
TJMAX − TAMB
Rθ (J− A)
Rθ(J-A) = 20°C/W
I OUTMAX =
The allowable dissipation tends towards zero as the
ambient temperature increases towards the maximum
operating junction temperature.
R DSON_P ×
The graph of PDMAX vs. ambient temperature could be
drawn quite simply using this equation. However, a more
useful measure is the maximum output current per
regulator vs. ambient temperature. This requires creating
an ‘exchange rate’ between power dissipation per
regulator (PDISS) and its output current (IOUT).
The curves shown in the “Typical Characteristics” section
are plots of this function adjusted to account for 1, 2, or 3
regulators running simultaneously.
HyperLight Load Mode
Each regulator in the MIC23451 uses a minimum on and
off time proprietary control loop (patented by Micrel).
When the output voltage falls below the regulation
threshold, the error comparator begins a switching cycle
that turns the PMOS on and keeps it on for the duration
of the minimum-on-time. This increases the output
voltage. If the output voltage is over the regulation
threshold, then the error comparator turns the PMOS off
for a minimum-off-time until the output drops below the
threshold. The NMOS acts as an ideal rectifier that
conducts when the PMOS is off. Using an NMOS switch
instead of a diode allows for lower voltage drop across
the switching device when it is on. The asynchronous
switching combination between the PMOS and the
NMOS allows the control loop to work in discontinuous
mode for light load operations. In discontinuous mode,
the MIC23451 works in pulse-frequency modulation
(PFM) to regulate the output. As the output current
increases, the off-time decreases, which provides more
energy to the output. This switching scheme improves the
efficiency of MIC23451 during light load currents by
switching only when it is needed. As the load current
An accurate measure of this function can use the
efficiency curve, as illustrated in Equation 8:
η=
POUT
POUT + PLOSS
PLOSS =
POUT (1 − η)
η
Eq. 8
where:
η = Efficiency
POUT = IOUT.VOUT
To arrive at the internal package dissipation PDISS,
remove the inductor loss PDCR, which is not dissipated
within the package. This does not give a worst case
figure because efficiency is typically measured on a
nominal part at nominal temperatures. The IOUT to PDISS
function used in this case is a synthesized PDISS, which
accounts for worst case values at maximum operating
temperature, as shown in Equation 9.
November 5, 2013


VOUT
V
+ R DSON_N × 1 − OUT 
VIN
VIN 

Eq. 10
15
Revision 1.2
Micrel, Inc.
MIC23451
Multiple Sources
The MIC23451 provides all the pins necessary to operate
the three regulators from independent sources. This can
be useful in partitioning power within a multi-rail system.
For example, two supplies may be available within a
system: 3.3V and 5V. The MIC23451 can be connected
to use the 3.3V supply to provide two, low-voltage
outputs (for example, 1.2V and 1.8V) and use the 5V rail
to provide a higher output (for example, 2.5V), resulting in
the power blocks shown in Figure 5.
increases, the MIC23451 goes into continuous
conduction mode (CCM) and switches at a frequency
centered at 3MHz. The equation to calculate the load
when the MIC23451 goes into continuous conduction
mode is approximated in Equation 11.
 (V − VOUT ) × D 

ILOAD >  IN
2L × f


Eq. 11
As shown in Equation 11, the load at which the
MIC23451 transitions from HyperLight Load mode to
PWM mode is a function of the input voltage (VIN), output
voltage (VOUT), duty cycle (D), inductance (L), and
frequency (f). Figure 4 shows that as the output current
increases, the switching frequency also increases until
the MIC23451 goes from HyperLight Load mode to PWM
mode at approximately 120mA. The MIC23451 will switch
at a relatively constant frequency around 3MHz after the
output current is over 120mA.
Switching Frequency
vs. Load Current
10000
FREQUENCY (kHz)
1000
VIN = 3.6V
100
VIN = 3V
VIN = 5V
10
Figure 5. Multi-Source Power Block Diagram
1
VOUT = 1.8V
0.1
0.0001
0.001
0.01
0.1
1
10
OUTPUT CURRENT (A)
Figure 4. SW Frequency vs. Output Current
November 5, 2013
16
Revision 1.2
Micrel, Inc.
MIC23451
Typical Application Schematic
Bill of Materials
Item
C1, C2, C3
C4, C5, C6, C7
Part Number
GRM188R60J106KE19D
Manufacturer
Murata
(1)
TDK
GRM188R60J475KE19D
Murata
EEUFR1A221
R1, R2, R3, R4,
R5, R6
CRCW060310K0FKEA
R7
CRCW0603301K0FKEA
R8
Qty.
Capacitor, 10µF, Size 0603
3
Capacitor, 4.7µF, Size 0603
4
(2)
C1608X5R0J475K
C8
Description
Panasonic
(3)
(4)
Electrolytic Capacitor, 220µF, 10V, Size 6.3mm
Resistor, 10KΩ, Size 0603
6
Vishay
Resistor, 301KΩ, Size 0603
1
CRCW0603158K0FKEA
Vishay
Resistor, 158KΩ, Size 0603
1
R9
CRCW0603316K0FKEA
Vishay
Resistor, 316Ω, Size 0603
1
R10
CRCW0603331K0FKEA
Vishay
Resistor, 331KΩ, Size 0603
1
R11
CRCW0603294K0FKEA
Vishay
Resistor, 294KΩ, Size 0603
1
R12
CRCW0603274K0FKEA
Vishay
Resistor, 274KΩ, Size 0603
1
L1, L2, L3
U1
VLS3012ST-1R0N1R9
LQH44PN1R0NJ0
MIC23451-AAAYFL
Vishay
TDK
1µH, 2A, 60mΩ, L3.0mm x W3.0mm x H1.0mm
Murata
3
1µH, 2.8A, 50mΩ, L4.0mm x W4.0mm x H1.2mm
(5)
Micrel, Inc.
3MHz PWM 2A Buck Regulator with HyperLight
Load
®
1
Notes:
1. TDK: www.tdk.com.
2. Murata Tel: www.murata.com.
3. Panasonic: www.panasonic.com.
4. Vishay Tel: www.vishay.com.
5. Micrel, Inc.: www.micrel.com.
November 5, 2013
17
Revision 1.2
Micrel, Inc.
MIC23451
PCB Layout Recommendations
Top Layer
Mid Layer 1
November 5, 2013
18
Revision 1.2
Micrel, Inc.
MIC23451
Mid Layer 2
Bottom Layer
November 5, 2013
19
Revision 1.2
Micrel, Inc.
MIC23451
Package Information(1)
26-Pin 4mm × 4mm QFN (FL)
Note:
1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
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whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
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indemnify Micrel for any damages resulting from such use or sale.
© 2013 Micrel, Incorporated.
November 5, 2013
20
Revision 1.2