MICREL MIC23156

MIC23156
1.5A, 3MHz Synchronous Buck Regulator
with HyperLight Load® and I2C Control for
Dynamic Voltage Scaling
General Description
Features
The MIC23156 is a high-efficiency 1.5A synchronous buck
®
regulator with HyperLight Load mode and dynamic
2
voltage scaling control through I C. HyperLight Load
provides very high efficiency at light loads and ultra-fast
transient response. The ability to dynamically change the
output voltage and maintain high output voltage accuracy
make the MIC23156 perfectly suited for supplying
processor core voltages. An additional benefit of this
proprietary architecture is very low output ripple voltage
throughout the entire load range with the use of small
2
output capacitors. Fast mode plus I C provides output
2
voltage and chip enable/disable control from standard I C
2
bus with I C clock rates of 100kHz, 400kHz, and 1MHz.
• Input voltage: 2.7V to 5.5V
• Up to 1.5A output current
2
• 1MHz I C-controlled adjustable output
− VOUT = 0.7 to 2.4V in 10mV steps
• High output voltage accuracy (±1.5% over temperature)
• Fast pin–selectable output voltage
• Programmable soft-start using external capacitor
• Ultra-low quiescent current of 30µA when not switching
• Thermal-shutdown and current-limit protection
• Safe startup in to pre-biased output
• Stable with 1µH output inductor and 2.2µF ceramic
capacitor
• Up to 93% peak efficiency
• −40°C to +125°C junction temperature range
The MIC23156 is designed for use with 1µH, and an
output capacitor as small as 2.2µF that enables a total
solution size, less than 1mm in height.
The MIC23156 is available in both 16-ball, 0.4mm Pitch,
1.81mm x 1.71mm wafer level chip scale (WLCSP), and
®
17-pin 2.8mm x 2.5mm MLF packages with an operating
junction temperature range of –40°C to +125°C.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Applications
•
•
•
•
Mobile handsets
Solid state drives (SSD)
WiFi/WiMx/WiBro modules
Portable applications
Typical Application
HyperLight Load is a registered trademark of Micrel, Inc.
MLF and MicroLead Frame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 22, 2013
Revision 1.0
Micrel, Inc.
MIC23156
Ordering Information
Part Number
Marking
Code
MIC23156-0YCS
JA
MIC23156-0YML
JQA
Default Output Voltage
VSEL = LOW
VSEL = HIGH
Junction
Temperature Range
1.0V
0.8V
–40°C to +125°C
Package
16-Ball 1.81mm × 1.71mm WLCSP
17-Pin 2.8mm × 2.5mm MLF
(1)
Note:
1. MLF is a Green, RoHS-compliant package. Lead finish is NiPdAu. Mold is Halogen free..
Pin Configuration
1.81mm × 1.71mm WLCSP (CS) Adjustable Output Voltage
(Top View)
2.8mm × 2.5mm MLF (ML) Adjustable Output Voltage
(Top View)
April 22, 2013
2
Revision 1.0
Micrel, Inc.
MIC23156
Pin Description
Ball
Number
Pin
Number
WLCSP
MLF
A1
2
SCL
Fast-Mode Plus 1MHz I²C Clock Input Pin.
A2
3
SDA
Fast-Mode Plus 1MHz I²C Data Input/Output Pin.
A3
4
SNS
Sense: Connect to VOUT, close to output cap to sense VOUT.
A4
5
SS
B1
1
VI2C
Power Connection for I C Bus Voltage: Connect this pin to the voltage domain of the I C bus
supply. Do not leave floating.
B2
11
VSEL
Pin Selectable: Output voltage of either of two I C voltage registers. Do not leave floating.
B3
7
PGOOD
B4
8
AVIN
C1, C2
16, 17
SW
C3, D3
12, 13
PVIN
Input Voltage to Power Switches: Connect decoupling capacitor to ground.
C4
9
AGND
Analog Ground: Connect to central ground point where all high-current paths meet (CIN, COUT,
and PGND) for best operation.
D1, D2
14, 15
PGND
Power Ground Connection.
D4
10
EN
Enable: Logic high enables operation of voltage regulator. Logic low shuts down the device. Do
not leave floating.
−
6
NC
No Connect.
Pin
Name
Pin Function
Programmable Soft Start: Connect capacitor to AGND.
2
April 22, 2013
2
2
Power Good Indicator: Use an external pull-up resistor to supply.
Input Voltage to Power Analog Functions: Connect decoupling capacitor to ground.
Switch Connection: Internal power MOSFET output switches.
3
Revision 1.0
Micrel, Inc.
MIC23156
Absolute Maximum Ratings(1)
Operating Ratings(2)
Input Supply Voltage (AVIN, PVIN, VI2C) ....... −0.3V to +6V
Switch Voltage (SW) ..................................... −0.3V to AVIN
Logic Voltage (EN, PGOOD)......................... −0.3V to AVIN
Logic Voltage (VSEL, SCL, SDA) .................. −0.3V to VI2C
Analog Input Voltage (SNS, SS) ................... −0.3V to AVIN
Power Dissipation (TA = +70°C) ................ Internally Limited
Storage Temperature (TS) ......................... −65°C to +150°C
Lead Temperature (soldering, 10s) .......................... +260°C
(3)
ESD Rating .................................................................. 2kV
Input Supply Voltage (AVIN, PVIN, VI2C).... +2.7V to +5.5V
Switch Voltage (SW) .......................................... 0V to AVIN
Logic Voltage (EN, PGOOD) ............................. 0V to AVIN
Logic Voltage (VSEL, SCL, SDA) ....................... 0V to VI2C
Analog Input Voltage (SNS, SS) ........................ 0V to AVIN
Junction Temperature Range (TJ).......–40°C ≤ TJ ≤ +125°C
Thermal Resistance
1.81mm × 1.71mm WLCSP-16 (θJA) ............... 150°C/W
2.8mm × 2.5mm MLF-17 (θJA) ........................... 89°C/W
Electrical Characteristics(4)
TA = 25°C, AVIN = PVIN = VEN = VVI2C = 3.6V; L = 1.0µH; COUT = 2.2µF, unless otherwise specified.
Bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted.
Parameter
Condition
Min.
Typ.
2.7
Supply Voltage Range
Enable Logic Pin Low Threshold
Logic Low
Enable Logic Pin High Threshold
Logic High
VSEL Logic Pin Low Threshold
Logic Low
VSEL Logic Pin High Threshold
Logic High
Logic Pin Input Current
Pins: EN and VSEL
Undervoltage Lockout Threshold
Rising
Undervoltage Lockout Hysteresis
Falling
Max.
Units
5.5
V
0.5
V
1.2
V
0.3 × VI2C
V
0.1
2
µA
2.55
2.65
V
0.7 × VI2C
2.45
V
75
mV
Shutdown Temperature
160
°C
Shutdown Temperature Hysteresis
20
°C
Shutdown Current
VEN = 0V
0.1
5
µA
+1.5
%
50
µA
2.4
V
DC-to-DC Converter
−1.5
Output Voltage Accuracy
VOUT = 1V, IOUT = 10mA
Quiescent Current
IOUT = 0mA, VFB > 1.2*VOUT
Output Voltage Range
30
0.7
Output Voltage Line Regulation
3.0V < VAVIN < 4.5, ILOAD = 10mA
0.02
%/V
Output Voltage Load Regulation
20mA < IOUT < 1A
0.04
%
Notes:
1. Exceeding the absolute maximum ratings may damage the device.
2. The device is not guaranteed to function outside its operating ratings.
3. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5k in series with 100pF.
4. Specification for packaged product only.
April 22, 2013
4
Revision 1.0
Micrel, Inc.
MIC23156
Electrical Characteristics(4) (Continued)
TA = 25°C, AVIN = PVIN = VEN = VVI2C = 3.6V; L = 1.0µH; COUT = 2.2µF, unless otherwise specified.
Bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted.
Parameter
Switch On-Resistance
Condition
Min.
Typ.
ISW = +100mA, High-Side Switch PMOS (MLF)
ISW = +100mA, High-Side Switch PMOS (WLCSP)
0.17
0.15
ISW = −100mA, Low-Side Switch NMOS (MLF)
0.15
0.13
ISW = −100mA, Low-Side Switch NMOS (WLCSP)
Current Limit (DC Value)
VOUT = 1V
1.7
Frequency = 3MHz
5.1
A
3
MHz
10
mV
250
µs
80
%
DVS Step Size
Soft-Start Time
Units
Ω
2.9
Frequency
Maximum Duty Cycle
Max.
VOUT = 90%, CSS = 120pF
2
I C Interface (Assuming 550pF Total Bus Capacitance)
2
I C Address
Read (Binary, Hex)
10110111, 0xB7
Write (Binary, Hex)
10110110, 0xB6
0.3 × VI2C
LOW-Level Input Voltage
SCL, SDA
HIGH-Level Input Voltage
SCL, SDA
SDA Pull-Down Resistance
Open drain pull-down on SDA during read back,
ISDA = 500µA
20
Ω
PGOOD Output Low
VOUT < 80% VNOM, IPGOOD = −500µA
100
mV
PGOOD Output Leakage
VOUT = VNOM
PGOOD Threshold
% of VOUT < VNOM
VOUT ramping up
0.7 × VI2C
V
V
Power Good
86
PGOOD hysteresis
April 22, 2013
5
5
5
µA
96
%
%
Revision 1.0
Micrel, Inc.
MIC23156
Typical Characteristics
Efficiency (VOUT = 2.4V)
vs. Output Current
Efficiency (VOUT = 1.0V)
vs. Output Current
Efficiency (VOUT = 1.8V)
vs. Output Current
100
90
90
80
80
VIN = 3.6V
70
VIN = 5V
60
VIN = 4.2V
50
40
30
20
80
VIN = 5V
70
VIN = 4.2V
VIN = 3.6V
EFFICIENCY (%)
EFFICIENCY (%)
100
90
EFFICIENCY (%)
100
VIN = 2.7V
60
50
40
30
COUT = 2.2µF
L = 1µH
COUT = 2.2µF
L = 1µH
10
0
100
1000
10000
VIN = 5V
40
30
COUT = 2.2µF
L = 1µH
10
100
1000
10
10000
1000000
3.1
3.1
1000
CURRENT LIMIT (A)
3.2
CURRENT LIMIT (A)
3.2
3.0
2.9
2.8
2.7
2.6
VOUT = 1.0V
COUT = 2.2µF
10
10000
100000
1000000
2.5
3
CSS (pF)
SHUTDOWN CURRENT (nA)
QUIESCENT CURRENT (µA)
3.5
4
4.5
5
125°C
25°C
35
30
25
-40°C
20
NO SWITCHING
VOUT > VOUTNOM * 1.2
COUT = 2.2µF
10
3.5
4.0
4.5
INPUT VOLTAGE (V)
April 22, 2013
-20
0
5.0
5.5
20
40
60
80
100
120
TEMPERATURE (°C)
Line Regulation
(CCM)
1.9
1.875
25
20
15
10
5
VOUT = 0V
COUT = 2.2µF
1.85
IOUT = 1.5A
1.825
IOUT = 1A
1.8
1.775
IOUT = 300mA
1.75
VOUTNOM = 1.8V
COUT = 2.2µF
1.725
1.7
0
3.0
VIN = 3.6V
VOUT = 1.0V
-40
5.5
30
2.5
2.7
Shutdown Current
vs. Input Voltage
45
15
2.8
INPUT VOLTAGE (V)
Quiescent Current
vs. Input Voltage
40
2.9
2.5
2.5
1000
10000
3.0
2.6
TA = 25°C
VOUT = 1.0V
OUTPUT VOLTAGE (V)
RISE TIME (µs)
10000000
10000
1000
Current Limit
vs. Temperature
Current Limit
vs. Input Voltage
VOUT Rise Time
vs. CSS
100
100
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
100000
VIN = 2.7V
0
OUTPUT CURRENT (mA)
100
VIN = 3.6V
50
10
0
10
60
20
20
10
70
2.5
3
3.5
4
4.5
INPUT VOLTAGE (V)
6
5
5.5
2.5
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE (V)
Revision 1.0
Micrel, Inc.
MIC23156
Typical Characteristics (Continued)
Load Regulation
Line Regulation
(HLL)
OUTPUT VOLTAGE (V)
IOUT = 20mA
1.825
1.8
1.775
IOUT = 120mA
1.75
VOUTNOM = 1.8V
COUT = 2.2µF
1.725
1.020
1.875
1.015
1.85
1.825
1.8
1.775
1.75
VIN = 3.6V
VOUTNOM = 1.8V
COUT = 2.2µF
1.725
1.7
1.7
2.5
3
3.5
4
4.5
5
5.5
250
500
1000
1250
1500
ENABLE RISING
1
0.9
ENABLE FALLING
0.8
0.7
0.5
5
PGOOD RISING
90%
85%
PGOOD FALLING
80%
3.5
3
4
4.5
5
50
75
100
125
DAC VOLTAGE CODE
April 22, 2013
150
SWITCHING FREQUENCY (MHZ)
175
120
1.8
1.4
0
25
50
75
100
125
150
175
DAC VOLTAGE CODE
Switching Frequency
vs. Output Current
4.0
4
3
2
VIN = 3.6V
VOUTNOM = 1.0V
COUT = 2.2µF
1
0
25
100
2.2
5.5
5
9
80
0.6
2.5
Switching Frequency
vs. Temperature
IOUT = 250mA
COUT = 2.2µF
60
IOUT = 250mA
COUT = 2.2µF
Δ Output Voltage
vs. DAC DNL
9.5
40
1
75%
INPUT VOLTAGE (V)
10
20
2.6
INPUT VOLTAGE (V)
10.5
0
Output Voltage
vs. DAC Linearity
95%
5.5
11
0
-20
TEMPERATURE (°C)
70%
4.5
VIN = 3.6V
VOUT = 1.0V
IOUT = 10mA
-40
OUTPUT VOLTAGE (V)
PGOOD THRESHOLD (%)
ENABLE THRESHOLD (V)
1.1
0.6
Δ OUTPUT VOLTAGE (mV)
750
100%
4
0.990
PGOOD Threshold
vs. Input Voltage
1.2
3.5
1.000
0.995
OUTPUT CURRENT (mA)
Enable Threshold
vs. Input Voltage
3
1.005
0.980
0
INPUT VOLTAGE (V)
2.5
1.010
0.985
SWITCHING FREQUENCY (MHz)
OUTPUT VOLTAGE (V)
IOUT = 1mA
1.85
1.9
OUTPUT VOLTAGE (V)
1.9
1.875
Output Voltage
vs. Temperature
3.5
3.0
2.5
1.0µH
2.0
2.2µH
1.5
1.0
VOUT = 1.8V
COUT = 2.2µF
0.5
0.0
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
7
100
120
10
100
1000
10000
OUTPUT CURRENT (mA)
Revision 1.0
Micrel, Inc.
MIC23156
Functional Characteristics
April 22, 2013
8
Revision 1.0
Micrel, Inc.
MIC23156
Functional Characteristics (Continued)
April 22, 2013
9
Revision 1.0
Micrel, Inc.
MIC23156
Functional Characteristics (Continued)
April 22, 2013
10
Revision 1.0
Micrel, Inc.
MIC23156
Functional Block Diagram
Figure 1. Simplified MIC23156 Functional Block Diagram
April 22, 2013
11
Revision 1.0
Micrel, Inc.
MIC23156
Functional Description
PVIN
The input supply (PVIN) provides power to the internal
MOSFETs for the switch mode regulator section. The
PVIN operating range is 2.7V to 5.5V so an input
capacitor with a minimum voltage rating of 6.3V is
recommended. Due to the high switching speed, a
minimum 2.2µF bypass capacitor placed close to PVIN
and the power ground (PGND) pin is required. Refer to
PCB Layout Recommendations (MLF Package) for more
details.
(PGND) loop. Refer to PCB Layout Recommendations
(MLF Package) for more details.
PGND
The power ground (PGND) pin is the ground path for the
high current in PWM mode. The current loop for the
power ground should be as small as possible and
separate from the analog ground (AGND) loop as
applicable. Refer to PCB Layout Recommendations (MLF
Package) for more details.
AVIN
Analog VIN (AVIN) provides power to the internal control
and analog supply circuitry. AVIN must be tied to PVIN
through a 10Ω RC filter. Careful layout should be
considered to ensure that any high-frequency switching
noise caused by PVIN is reduced before reaching AVIN.
A 2.2µF capacitor as close to AVIN as possible is
recommended. Refer to PCB Layout Recommendations
(MLF Package) for more details.
PGOOD
The power good (PGOOD) pin is an open drain output
which indicates logic high when the output voltage is
typically above 90% of its steady state voltage. A pull-up
resistor of more than 5kΩ should be connected from
PGOOD to VOUT.
SS
The soft-start (SS) pin is used to control the output
voltage ramp up time. The approximate equation for the
ramp time in seconds is 820 × 103 × ln(10) × CSS. For
example, for a CSS = 120pF, TRISE ≈ 230µs. Refer to the
SS
“VOUT Rise Time vs. C ” graph in the Typical
Characteristics section. The minimum recommended
value for CSS is 120pF.
EN
A logic high signal on the enable pin activates the output
voltage of the device. A logic low signal on the enable pin
deactivates the output and reduces supply current to
0.1µA. Do not leave the EN pin floating. MIC23156
features external soft-start circuitry via the soft start (SS)
pin that reduces in-rush current and prevents the output
voltage from overshooting when EN is driven logic high.
Do not leave the EN pin floating.
VI2C
2
Power connection for I C bus voltage. Connect this pin to
2
the voltage domain of the I C bus supply.
SW
The switch (SW) connects directly to one end of the
inductor and provides the current path during switching
cycles. The other end of the inductor is connected to the
SNS pin, output capacitor and the load. Due to the high
speed switching on this pin, the switch node should be
routed away from sensitive nodes whenever possible.
VSEL
Selectable output voltage of either of two I2C voltage
registers. A logic low selects buck register 1 and logic
2
high selects buck register 2. If no I C programming is
used the output voltages will be as per the default voltage
register values. Do not leave floating.
SCL
2
The I C clock input pin provides a reference clock for
clocking in the data signal. This is a fast-mode plus 1MHz
input pin, and requires a 4.7KΩ pull-up resistor.
SNS
The sense (SNS) pin is connected to the output of the
device to provide feedback to the control circuitry. The
SNS connection should be placed close to the output
capacitor. Refer to PCB Layout Recommendations (MLF
Package) for more details.
SDA
2
The I C data input/output pin allows for data to be written
to and read from the MIC23156. This is a fast-mode plus
2
1MHz I C pin, and requires a 4.7KΩ pull-up resistor.
AGND
The analog ground (AGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the power ground
April 22, 2013
12
Revision 1.0
Micrel, Inc.
MIC23156
Application Information
The MIC23156 is a high-performance DC-to-DC stepdown regulator offering a small solution size and
supporting up to 1.5A in a 2.8mm × 2.5mm MLF and
1.81mm × 1.71mm WLCSP package. Using the
HyperLight Load switching scheme, the MIC23156 is able
to maintain high efficiency and exceptional voltage
accuracy throughout the entire load range while providing
ultra-fast load transient response. Another beneficial
feature is the ability to dynamically change the output
voltage in steps of 10mV. The following subsections
provide additional device application information.
Ensure the inductor selected can handle the maximum
operating current. When saturation current is specified,
make sure that there is enough margin so that the peak
current does not cause the inductor to saturate. Peak
current can be calculated as noted in Equation 1:

 1 − VOUT / VIN 
IPEAK = IOUT + VOUT 

2× f ×L



Input Capacitor
A 2.2µF (or larger) ceramic capacitor should be placed as
close as possible to the PVIN and AVIN pins with short
trace for good noise performance. X5R or X7R type
ceramic capacitors are recommended for better tolerance
over temperature. The Y5V and Z5U type temperature
rating ceramic capacitors are not recommended due to
their large reduction in capacitance over temperature and
increased resistance at high frequencies. These reduce
their ability to filter out high-frequency noise. The rated
voltage of the input capacitor should be at least 20%
higher than the maximum operating input voltage over
the operating temperature range.
Eq. 1
As shown by Equation 1, the peak inductor current is
inversely proportional to the switching frequency and the
inductance. The lower the switching frequency or the
inductance, the higher the peak current. As input voltage
increases, the peak current also increases.
The size of the inductor depends upon the requirements
of the application. Refer to the Typical Application and Bill
of Materials for details.
DC resistance (DCR) is also important. While DCR is
inversely proportional to size, DCR can represent a
significant efficiency loss. Refer to Efficiency
Considerations.
Output Capacitor
Output capacitor selection is also a trade-off between
performance, size, and cost. Increasing output capacitor
will lead to an improved transient response, however, the
size and cost also increase. The MIC23156 is designed
for use with a 2.2µF or greater ceramic output capacitor.
A low equivalent series resistance (ESR) ceramic output
capacitor is recommended based upon performance, size
and cost. Both the X7R or X5R temperature rating
capacitors are recommended. Refer to Table 1 for
additional information.
The transition between continuous-conduction mode
(CCM) to HyperLight Load mode is determined by the
inductor ripple current and the load current.
Figure 2 shows the signals for high-side switch drive
(HSD) for TON control, the Inductor current and the low
side switch drive (LSD) for TOFF control.
Inductor Selection
Inductor selection is a balance between efficiency,
stability, cost, size, and rated current. Since the
MIC23156 is compensated internally, the recommended
inductance of L is limited from 0.47µH to 2.2µH to ensure
system stability.
For faster transient response, a 0.47µH inductor will yield
the best result. For lower output ripple, a 2.2µH inductor
is recommended.
Maximum current ratings of the inductor are generally
given in two methods; permissible DC current, and
saturation current. Permissible DC current can be rated
either for a 40°C temperature rise or a 10% to 30% loss
in inductance.
April 22, 2013
Figure 2. HSD Signals for TON Control, Inductor Current,
and LSD for TOFF Control
13
Revision 1.0
Micrel, Inc.
MIC23156
In HLL mode, the inductor is charged with a fixed Ton
pulse on the high-side switch (HSD). After this, the LDS
is switched on and current falls at a rate VOUT/L. The
controller remains in HLL mode while the inductor falling
current is detected to cross approximately 200mA. When
the LSD (or TOFF) time reaches its minimum and the
inductor falling current is no longer able to reach this
200mA threshold, the part is in CCM mode and switching
at a virtually constant frequency.
Efficiency (VOUT = 1.8V)
vs. Output Current
100
90
EFFICIENCY (%)
80
Table 1 optimizes the inductor to output capacitor
combination for maintaining a minimum phase margin of
45°.
VIN = 5V
70
VIN = 4.2V
VIN = 3.6V
60
VIN = 2.7V
50
40
30
20
COUT = 2.2µF
L = 1µH
10
0
10
100
1000
10000
OUTPUT CURRENT (mA)
Table 1. Maximum COUT vs. Inductor
Inductor
Minimum
COUT
Recommended
COUT
Maximum
COUT
0.47µH
2.2µF
4.7µF
25µF
1.0µH
2.2µF
2.2µF
15µF
2.2µH
2.2µF
2.2µF
6.8µF
Figure 3. Efficiency under Load
Figure 3 shows an efficiency curve. From 10mA load to
1.5A, efficiency losses are dominated by quiescent
current losses, gate drive and transition losses. By using
the HyperLight Load mode, the MIC23156 is able to
maintain high efficiency at low output currents.
Over 200mA, efficiency loss is dominated by MOSFET
RDSON and inductor losses. Higher input supply voltages
will increase the gate-to-source threshold on the internal
MOSFETs, thereby reducing the internal RDSON. This
improves efficiency by reducing DC losses in the device.
All but the inductor losses are inherent to the device. In
which case, inductor selection becomes increasingly
critical in efficiency calculations. As the inductors are
reduced in size, the DC resistance (DCR) can become
quite significant. The DCR losses can be calculated as in
Equation 3:
Duty Cycle
The typical maximum duty cycle of the MIC23156 is 80%.
Thermal Shutdown
When the internal die temperature of MIC23156 reaches
160°C, the internal driver is disabled until the die
temperature falls below 140°C.
Efficiency Considerations
Efficiency is defined as the amount of useful output
power, divided by the amount of power supplied, as
shown in Equation 2:
2
PDCR = IOUT x DCR
V
×I
Efficiency% =  OUT OUT
 VIN × IIN

 × 100

Eq. 3
Eq. 2
From that, the loss in efficiency due to inductor resistance
can be calculated as in Equation 4:
There are two types of losses in switching converters: DC
losses and switching losses. DC losses are simply the
2
power dissipation of I R. Power is dissipated in the highside switch during the on cycle. Power loss is equal to the
high side MOSFET RDSON multiplied by the switch current
squared. During the off cycle, the low side N-channel
MOSFET conducts, also dissipating power. Device
operating current also reduces efficiency. The product of
the quiescent (operating) current and the supply voltage
represents another DC loss. The current required driving
the gates on and off at a constant 3MHz frequency and
the switching transitions make up the switching losses.
April 22, 2013
 
VOUT × IOUT
Efficiency Loss = 1 − 
V
  OUT × IOUT × PDCR

 × 100

Eq. 4
Efficiency loss due to DCR is minimal at light loads and
gains significance as the load is increased. Inductor
selection becomes a tradeoff between efficiency and size
in this case.
14
Revision 1.0
Micrel, Inc.
MIC23156
HyperLight Load Mode
The MIC23156 uses a minimum on and off time
proprietary control loop (patented by Micrel). When the
output voltage falls below the regulation threshold, the
error comparator begins a switching cycle that turns the
PMOS on and keeps it on for the duration of the
minimum-on-time. This increases the output voltage. If
the output voltage is over the regulation threshold, then
the error comparator turns the PMOS off for a minimumoff-time until the output drops below the threshold. The
NMOS acts as an ideal rectifier that conducts when the
PMOS is off. Using an NMOS switch instead of a diode
allows for lower voltage drop across the switching device
when it is on. The synchronous switching combination
between the PMOS and the NMOS allows the control
loop to work in discontinuous mode for light load
operations. In discontinuous mode, the MIC23156 works
in HyperLight Load to regulate the output. As the output
current increases, the off time decreases, thus providing
more energy to the output. This switching scheme
improves the efficiency of MIC23156 during light load
currents by only switching when it is needed. As the load
current increases, the MIC23156 goes into continuous
conduction mode (CCM) and switches at a frequency
centered at 3MHz. The equation to calculate the load
when the MIC23156 goes into continuous conduction
mode may be approximated by Equation 5:
 (V − VOUT ) × D 
ILOAD >  IN

2L × f


Switching Frequency
vs. Output Current
SWITCHING FREQUENCY (MHz)
4.0
3.5
3.0
2.5
1.0µH
2.0
2.2µH
1.5
1.0
0.5
VOUT = 1.8V
COUT = 2.2µF
0.0
10
100
1000
10000
OUTPUT CURRENT (mA)
Figure 4. SW Frequency vs. Output Current
Output Voltage Setting
The MIC23156 features dynamic voltage scaling and
setting hardware that allow the output voltage of the buck
regulator to be changed on the fly in increments of 10mV.
The output voltage is set according to one of two
registers that behave identically; BUCK_OUT1 when
VSEL = 0 and BUCK_OUT2 when VSEL = 1. If the
BUCK_OUT value is changed while the VSEL is selected
and regulator is enabled, then the output voltage will
immediately change to the new value using dynamic
voltage scaling (DVS). Equation 6 describes the
relationship between the register value and the output
voltage:
Eq. 5
VOUT = 0.7 + (0.01 × REGBUCK_OUT)
As shown in Equation 5, the load at which the MIC23156
transitions from HyperLight Load mode to PWM mode is
a function of the input voltage (VIN), output voltage (VOUT),
duty cycle (D), inductance (L) and frequency (f). As
shown in Figure 4, as the output current increases, the
switching frequency also increases until the MIC23156
goes from HyperLight Load mode to PWM mode at
approximately 200mA. The MIC23156 will switch at a
relatively constant frequency around 3MHz once the
output current is over 200mA.
Eq. 6
Note that the maximum output voltage is 2.4V
corresponding to a register setting of 170 (0b10101010,
0XAA). An example of this calculation is demonstrated in
the Calculating DAC Voltage Code sub-section.
2
I C Interface
Figure 5 shows the communications required for write
2
and read operations via the I C interface. The black lines
show master communications and the red lines show the
slave communications. During a write operation, the
master must drive SDA and SCL for all stages except the
acknowledgement (A) shown in red, which are provided
by the slave (MIC23156).
The read operation begins first with a data-less write to
select the register address from which to read. A restart
sequence is issued followed by a read command and a
data read.
April 22, 2013
15
Revision 1.0
Micrel, Inc.
MIC23156
Enable/Status Register (001b/01h)
Enable/Status register is written to enable the output
regulator (BUCK_EN) and soft start extension mode
(SSL). It is read to interrogate the status of thermal
shutdown (TSD), undervoltage lockout (UVLO), and
power good (PGOOD) status of the regulator. See Table
3 for additional information.
The MIC23156 responds to a slave address of hex 0xB6
and 0xB7 for write and read operations respectively, or
binary 1011011X (where X is the read/write bit, 0 = write,
1 = read).
The register address is eight bits wide and carries the
address of the MIC23156 register to be operated upon.
Only the lower three bits are used.
Buck Register 1 (010b/02h) and Buck Register 2
(011b/03h)
These registers are written to set the output voltage to
any one of 170 levels in 10mV steps. Values above
decimal 170 are equivalent to setting the register to 170.
The two registers correspond to one of two states, which
is selectable by the VSEL input pin, which allow the
regulator to be quickly switched between two voltage
levels (e.g. enabled and standby). When VSEL = 0, the
output voltage is controlled by BUCK_OUT1 (REG2).
When VSEL = 1, then the output voltage is controlled by
BUCK_OUT2 (REG3). See Table 4 and Table 5 for
additional information.
Figure 5. Required Communications for Read/Write
2
Operations via I C Interface
2
I C Register Summary
2
There are three I C read/write registers of 8-bit length. All
registers are reset to a zero state whenever EN ≤ 0.5V
and set (reset) to their default values on the transition of
2
EN ≥ 1.5V. All registers are accessible by I C.
Table 2. Register Bit Field Map
Reg.
D7
1
D6
D5
D4
TSD
UVLO
PGOOD
2
BUCK_OUT1
3
BUCK_OUT2
Reg.
1
D3
D2
D1
D0
SSL
BUCK_EN
2
BUCK_OUT1
3
BUCK_OUT2
April 22, 2013
16
Revision 1.0
Micrel, Inc.
MIC23156
Table 3. Enable and Status Register (REG1) Bit Field Description
Bits
Name
R/W
POR
Description
7
Reserved
R
0
6
TSD
R
0
Thermal shutdown status bit. This register bit will be set by internal hardware if a thermal
shutdown event is triggered by the die temperature exceeding shutdown temperature.
5
UVLO
R
0
Undervoltage lockout status bit. This register bit will be set by internal hardware when the
under voltage lockout circuit is active, and cleared when VIN exceeds the UVLO threshold.
4
PGOOD
R
0
Power good status bit. This register will be set when the buck regulator output voltage is >
nominally 10% of the output voltage set points as specified by VSEL, BUCK_OUT1 and
BUCK_OUT2. This regulator has the same function as the PGOOD output pin.
3:2
Reserved
R/W
00
1
SSL
R/W
0
Long soft-start enable bit. If this bit is set, then the internal soft start resistor is increased and
the soft start time will be extended.
0
BUCK_EN
R/W
1
Buck regulator enable bit. Setting this bit will enable and turn on the buck regulator output.
Clearing this bit will disable the buck regulator output.
Table 4. BUCK_OUT1 (REG2) Bit Field Description
Bits
7:0
Name
R/W
BUCK_OUT1
R/W
POR
Description
0X1E
Buck output voltage 1 setting for VSEL = 0. Setting this register value will change the
output regulation point for the buck regulator when VSEL = 0. If the buck is enabled and
VSEL = 0, changing the value will immediately cause the output voltage to transition to
the new set point.
Table 5. BUCK_OUT2 (REG3) Bit Field Description
Bits
7:0
Name
R/W
BUCK_OUT2
R/W
POR
Description
0X0A
Buck output voltage 2 setting for VSEL = 1. Setting this register value will change the
output regulation point for the buck regulator when VSEL = 1. If the buck is enabled and
VSEL = 1, changing the value will immediately cause the output voltage to transition to
the new set point .
Calculating DAC Voltage Code
If the desired output voltage is 1.8V, then using Equation 6:
(
)
VOUT = 0.7 + 0.01× REGBUCK _ OUT → REGBUCK _ OUT =
(1.8 − 0.7)
0.01
→ REGBUCK_OUT = 110 in decimal, 6E in hex, or 0110 1110 in binary
April 22, 2013
17
Revision 1.0
Micrel, Inc.
MIC23156
Evaluation Board Schematic − MIC23156-0YML
April 22, 2013
18
Revision 1.0
Micrel, Inc.
MIC23156
Bill of Materials
Item
Part Name
06036D225KAT2A
C1, C5
GRM188R60J225KE19D
C1608X5R0J225KT
06036D106MAT2A
C2
GRM188R60J106ME47D
C1608X5R0J106M
C3
ECA-1AHG221
06035A121JAT2A
C4
GRM1885C1H121JA01D
C1608C0G1H121JT
L1
CDRH4D28CLDNP-1R0P
LQH44PN1R0NJ0
Manufacturer
Description
Qty.
(1)
AVX
Murata
(2)
2.2µF, 6.3V, X5R, 0603
2
10µF, 6.3V, X5R, 0603
1
Aluminum capacitor, 220µF, 10V, 20%, radial
1
120pF, 50V, 0603
1
(3)
TDK
AVX
Murata
TDK
Panasonic
(4)
AVX
Murata
TDK
Sumida
1µH, 3.0A, 14mΩ, L5.1mm × W5.1mm × H3.0mm
(5)
1
1µH, 2.0A, 48mΩ, L4.0mm × W4.0mm × H1.1mm
Murata
4.7KΩ, 1%, 1/10W, 0603
2
Vishay/Dale
100KΩ, 1%, 1/10W, 0603
1
CRCW06030000Z0EA
Vishay/Dale
0Ω, 1/10W, 0603
1
R5
CRCW060310R0FKEA
Vishay/Dale
10Ω, 1%, 1/10W, 0603
1
U1
MIC23156-0YML
1.5A, 3MHz Synchronous Buck Regulator with
2
HyperLight Load and I C Control for Dynamic Voltage
Scaling
1
R1, R2
CRCW06034K70FKEA
R3
CRCW06031003FKEA
R4
Vishay/Dale
(6)
(7)
Micrel, Inc.
Notes:
1. AVX: www.avx.com.
2. Murata: www.murata.com.
3. TDK: www.tdk.com.
4. Panasonic: www.industrial.panasonic.com.
5. Sumida: www.sumida.com.
6. Vishay: www.vishay.com.
7. Micrel, Inc.: www.micrel.com.
April 22, 2013
19
Revision 1.0
Micrel, Inc.
MIC23156
PCB Layout Recommendations (MLF Package)
Top Layer
Bottom Layer
April 22, 2013
20
Revision 1.0
Micrel, Inc.
MIC23156
Package Information(1) and Recommended Landing Pattern (MLF Package)
17-Pin 2.8mm × 2.5mm MLF
Note:
1. Package information is correct as of the publication date. For updates and the most current information, go to www.micrel.com.
April 22, 2013
21
Revision 1.0
Micrel, Inc.
MIC23156
Package Information(1) and Recommended Landing Pattern (WLCSP Package)
16-Ball 1.81mm × 1.71mm WLCSP
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2013 Micrel, Incorporated.
April 22, 2013
22
Revision 1.0