MIC4600 - Micrel

MIC4600
28V Half Bridge MOSFET Driver
Revision 1.0
General Description
The Micrel MIC4600 is a 28V half bridge MOSFET driver
targeted for cost sensitive applications requiring high
performance such as set-top boxes, gateways, routers,
computing
peripherals,
telecom
and
networking
equipment.
The MIC4600 operates over a supply range of 4.5V to
28V. It has an internal linear regulator which provides a
regulated 5V to power the MOSFET gate drive and
operates up to 1.5MHz switching frequency.
The MIC4600 uses an adjustable dead time circuit to
prevent shoot-through in the external high and low-side
MOSFETs.
The MIC4600 is available in a small 3mm × 3mm QFN
package with a junction temperature range of –40°C to
125°C
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Adjustable dead time circuitry
Anti-shoot-through protection
Internal LDO for Single Supply Operation
Input voltage range: 4.5V to 28V
Fast propagation delay – 20ns
Up to 1.5 MHz operation
Low voltage logic level inputs for µC or FPGA driven
power solutions
Independent inputs for low and high side drivers
2Ω gate drive capable of driving 3000pF load with 15ns
rise and fall times
Low 450uA typical quiescent current
3mm × 3mm QFN package
–40°C to +125°C junction temperature range
Applications
•
•
•
•
•
Distributed power systems
Communications/networking infrastructure
Set-top box, gateways and routers
Printers and scanners
µP and FPGA controlled DC-DC regulator
Typical Application
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 26, 2015
Revision 1.0
Micrel, Inc.
MIC4600
Ordering Information
Part Number
Junction Temp. Range
Package
MIC4600YML
–40°C to +125°C
16 lead 3mm × 3mm QFN
Lead Finish
Pb-Free
Pin Configuration
16-lead 3mm × 3mm QFN (ML)
(Top View)
Pin Description
Pin Number
Pin Name
1
VIN
VIN Supply (Input): Input supply to the internal LDO. The VIN operating voltage range is from
4.5V to 28V. Connect a decoupling capacitor between this pin and PGND.
2
EN
Enable (Input): A logic level high allows normal operation. A logic level low on this pin shuts
down the drive in a low quiescent current state. The EN pin must not be left floating.
3
HSI
High side input (input): A logic level input that controls the high side gate drive.
4
LSI
Low side input (input): A logic level input that controls the low side gate drive.
5
NC
No Connect. Not internally connected.
6
FAULT
FAULT (Output). The active low, open drain output pulls low during an over-temperature fault. A
resistor to VDD is needed to pull this signal high.
7
DELAY
Delay (Output). Connect a resistor from this pin to ground to adjust the dead time (break before
make) .
8, 16
AGND
Analog ground. AGND must be connected directly to the ground planes. Do not route the AGND
pin to the PGND Pad on the top layer. Refer to the PCB layout guidelines for details.
9
PGND
Power Ground. PGND is the ground path for the MIC4600 output drivers. The PGND pin should
be connected to the source of low-side N-Channel MOSFET and the negative terminals of
decoupling capacitors.
10
DL
Drive Low (Output). Low side MOSFET gate driver.
11
SW
Switch Node (Output): Internal connection for the high-side MOSFET source and low-side
MOSFET drain. Due to the high speed switching on this pin, the SW pin should be routed away
from sensitive nodes.
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Pin Function
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Micrel, Inc.
MIC4600
Pin Description (Continued)
Pin Number
Pin Name
12
DH
Drive High (Output). High side MOSFET gate driver.
13
BST
Boost (output): Bootstrapped voltage to the high-side N-channel MOSFET driver. Connect a
Schottky diode between the VDD pin and the BST pin. Connect a boost capacitor between the
BST pin and the SW pin.
14
VDD
5V Internal Linear Regulator (Output): VDD supplies the power MOSFET gate drive supply
voltage. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD should be tied to VIN
pin. A 2.2µF ceramic capacitor from the VDD pin to ground plane on PCB is required for stability.
15
AVDD
5V Analog Input (Input): AVDD is the supply for the internal driver logic and control circuitry.
Connect the VDD output to the AVDD pin.
EPAD
EPAD
Exposed thermal pad. Connect to the ground plane for optimum thermal performance.
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Pin Function
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Micrel, Inc.
MIC4600
Absolute Maximum Ratings(1)
Operating Ratings(2)
VIN to PGND ................................................... -0.3V to +29V
VDD to PGND .................................................... -0.3V to +6V
VSW to PGND ......................................... -0.3V to (VIN +0.3V)
VBST to VSW ......................................................... -0.3V to 6V
VBST to PGND ................................................... -0.3V to 34V
VHSI, VLSI to PGND ............................... -0.3V to (VDD + 0.3V)
VFAULT to AGND .................................................. -0.3V to 6V
VEN to PGND ......................................... -0.3V to (VIN +0.3V)
PGND to AGND ............................................ -0.3V to +0.3V
Junction Temperature .............................................. +150°C
Storage Temperature (TS) .......................... -65°C to +150°C
Lead Temperature (soldering, 10sec) ........................ 260°C
ESD Ratings
HBM ......................................................................... 2kV
MM ......................................................................... 200V
Supply Voltage (VIN) ........................................ 4.5V to 28V
VDD Supply Voltage (VDD) ............................... 4.5V to 5.5V
Enable Input (VEN) .................................................. 0V to VIN
Junction Temperature (TJ) ......................... -40°C to +125°C
Maximum Power Dissipation ...................................... Note 4
Package Thermal Resistance(3)
3mm × 3mm QFN (θJA) ..................................... 59°C/W
Electrical Characteristics(4)
VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, CVIN=CVDD= 1μF unless noted. Bold values indicate -40°C ≤ TJ ≤ +125°C.
Parameter
Condition
Min.
Typ.
Max.
Units
28
V
450
750
µA
9
20
µA
Power Supply Input
Input Voltage Range (VIN)
4.5
Quiescent Supply Current
HSI=VDD, LSI=0V, RDELAY=124kΩ, non-switching
Shutdown Supply Current
VEN = 0V
VDD Supply Voltage
VDD Output Voltage
VIN = 7V to 26V, IDD = 25mA
4.8
5
5.4
V
VDD UVLO Threshold
VDD Rising
3.6
4.2
4.3
V
VDD UVLO Hysteresis
400
mV
Dropout Voltage (VIN – VDD)
IDD = 25mA, VIN= 5V
380
mV
VDD load regulation
IDD = 0 to 25mA
1.23
%
Enable Control
EN Logic Threshold
0.65
Rising
EN Hysteresis
EN Input Bias Current
1.25
1.4
69
mV
2
VEN = 12V
V
µA
Notes:
1. Exceeding the absolute maximum ratings may damage the device.
2. The device is not guaranteed to function outside its operating ratings.
3. PD(MAX) = (TJ(MAX) – TA)/ θJA, where θJA depends upon the printed circuit layout. See “Applications Information.”
4. Specification for packaged product only.
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MIC4600
Electrical Characteristics(4) (Continued)
Fault
Fault Over temperature
TJ Rising
Over Temperature Hysteresis
150
°C
23
°C
FAULT Logic Level Low
IFAULT=5mA
0.05
0.2
V
FAULT pin leakage current
VFAULT=5.5V
0.01
0.1
µA
Input Control
1.4
HSI Logic Level High
V
HSI Logic Level Low
HSI Bias Current
VHSI = 5V
0.01
V
0.1
µA
1.4
LSI Logic Level High
V
LSI Logic Level Low
LSI Bias Current
0.65
VLSI = 5V
0.01
RDELAY=105kΩ
18.7
0.65
V
0.1
µA
Timing
Dead Time
ns
1.5
Switching Frequency Range
Minimum Allowable Pulse Width
MHz
32
ns
Rise Time (DH, DL)
CLOAD=3nF, 10%VDD to 90%VDD
15
ns
Fall Time (DH,DL)
CLOAD=3nF, 90%VDD to 10%VDD
13.5
ns
Propagation Delay,
Rising HSI to DH
GND to 10%xVDD
26
ns
Propagation Delay,
Rising LSI to DL
GND to 10%xVDD
18
ns
Propagation Delay,
Falling HSI to DH
VDD to 90%xVDD
55
ns
Propagation Delay,
Falling LSI to DL
VDD to 90%xVDD
14
ns
DH RDS(ON), High
IDH = 20mA
2
3
Ω
DH R DS(ON), Low
IDH = -20mA
1.5
3
Ω
DL R DS(ON), High
IDL = 20mA
2
3
Ω
DL R DS(ON), Low
IDL = -20mA
1
2
Ω
MOSFET Drivers
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MIC4600
Timing Diagrams
Figure 1. MIC4600 Timing Waveforms
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MIC4600
Typical Characteristics (VIN=12V unless noted)
VIN Quiescent Current
vs. Input Voltage
550
500
450
400
350
-40°C
25°C
300
HSI = VDD
LSI = 0V
SW = 0V
250
200
50
530
VIN = 12V
510
VIN = 28V
490
470
450
430
410
VIN = 4.5V
390
370
8
12
16
20
24
28
-50
-25
20
10
0
25
50
75
100
125
4
VIN OPERATING CURRENT (mA)
EN = 0V
SW = 0V
40
VIN = 12V
SW = 0V
CLOAD=0nF
-40ºC
VIN = 12V
20
1
RDS(ON) (Ω)
1.5
VIN = 28V
125ºC
0.5
10
VIN = 4.5V
25ºC
0
0
-25
0
25
50
75
100
0
125
200
400
600
800
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
RDS(ON) vs. Temperature
1000 1200 1400
1.6
RDS(ON) (Ω)
1.5
1.4
1.3
VIN = 12V
1.1
2.4
VIN = 4.5V
2.2
2
0.9
1.6
0
25
50
75
TEMPERATURE (°C)
February 26, 2015
100
125
100
125
2
1.8
VIN = 12V
1.2
1
1.4
-25
75
1.4
VIN = 12V
0.8
0.7
50
VIN = 4.5V
2.2
1.6
1.8
1
25
SW = 0V
HSI = LSI = VDD
IDH = -50mA
2.6
2.4
-50
0
RDS(ON) vs. Temperature
SW = 0V
HSI = LSI = VDD
IDL = -50mA
2.6
1.2
-25
2.8
2.8
1.7
28
TEMPERATURE (°C)
RDS(ON) (Ω)
1.8
24
VIN = 12V
RDS(ON) vs. Temperature
SW = 0V
HSI = LSI = 0V
VIN = 4.5V
IDH = 50mA
2
20
VIN = 4.5V
-50
3
2.1
16
SW = 0V
HSI = LSI = 0V
IDL = 50mA
FREQUENCY (kHz)
TEMPERATURE (°C)
1.9
12
RDS(ON) vs. Temperature
2
-50
8
INPUT VOLTAGE (V)
VIN Operating Current
vs. Frequency
50
25ºC
-40ºC
TEMPERATURE (°C)
VIN Shutdown Current
vs. Temperature
30
125ºC
30
0
INPUT VOLTAGE (V)
VIN SHUTDOWN CURRENT (µA)
HSI = VDD
LSI = 0V
SW = 0V
EN = 0V
SW = 0V
40
350
4
RDS(ON) (Ω)
VIN SHUTDOWN CURRENT (µA)
550
125°C
VIN QUIESCENT CURRENT (µA)
VIN QUIESCENT CURRENT (µA)
600
VIN Shutdown Current
vs. Input Voltage
VIN Quiescent Current
vs. Temperature
-50
-25
0
25
50
75
TEMPERATURE (°C)
7
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
Revision 1.0
Micrel, Inc.
MIC4600
Typical Characteristics (Continued)
Propagation Delay
vs. Input Voltage
Propagation Delay
vs. Temperature
DH Rise Time
vs. Input Voltage
16
70
70
TEMP = 25°C
SW = 0V
60
tHPHL
60
SW = 0V
tHPHL
VIN = 12V
SW = 0V
14
-40°C
125°C
25°C
tLPLH
40
tLPHL
tHPLH
30
40
tLPHL
tr (ns)
50
DELAY (ns)
DELAY (ns)
50
12
tHPLH
30
10
tLPLH
20
20
10
8
10
4
8
12
16
20
24
28
-50
-25
VIN (V)
0
25
50
75
100
4
125
8
12
DH Fall Time
vs. Input Voltage
Deadtime vs. RDELAY for
DL↓ to DH↑
140
16
16
20
24
28
VIN (V)
TEMPERATURE (°C)
Deadtime vs. RDELAY for
DH↓ to DL↑
160
SW = 0V
-40°C
140
120
125°C
25°C
14
120
12
TDEAD (ns)
TDEAD (ns)
tf (ns)
100
80
60
40
10
100
80
60
40
4.5Vin
20
4.5Vin
20
12Vin
12Vin
0
0
8
4
8
12
16
20
24
28
0
200
400
600
VIN (V)
800 1,000 1,200 1,400
RDELAY (kΩ)
0
200
400
600
800 1,000 1,200 1,400
RDELAY (kΩ)
Deadtime Delay
vs. Temperature
110
105
TDEAD (ns)
DL↓ to DH↑
100
95
90
DH↓ to DL↑
85
80
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
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Micrel, Inc.
MIC4600
Functional Diagram
increase in MOSFET power dissipation, circuit noise and
interference with power circuit operation. A resistor on the
DELAY pin sets the break-before-make delay time
between the high and low-side MOSFETs . See the
Applications section for additional information.
Functional Description
The MIC4600 is a 28V half-bridge MOSFET driver with
integrated LDO. It is designed to independently drive
both high-side and low-side N-Channel MOSFETs. The
LDO eliminates the need for a second VDD supply
voltage by generating the gate drive voltage from the
input supply. The MIC4600 offers a wide 4.5V to 28V
operating supply range. Refer to the MIC4600 Block
Diagram above.
Input Stage
Both the HSI and LSI pins are referenced to the AGND
pin. The voltage state of the input signal does not change
the quiescent current draw of the driver.
The MIC4600 has a TTL-compatible input range and can
be used with input signals with amplitude less than or
equal to the VDD voltage. A small amount of hysteresis
improves the noise immunity of the driver inputs.
The high and low-side drivers contain an input buffer with
hysteresis and an output buffer. The high-side output
buffer includes a high-speed level-shifting circuit that is
referenced to the HS pin. An external diode is used to
supply VDD to the bootstrap circuit that provides the drive
voltage for the high-side output.
Low-Side Driver
Figure 2 shows a block diagram of the low-side driver.
The low-side driver is designed to drive a ground (PGND
pin) referenced N-channel MOSFET. The low-side gate
drive voltage equals VDD, which is typically 5V.
Startup and UVLO
The UVLO circuit monitors VDD and inhibits both drivers in
a low state when the supply voltage is below the UVLO
threshold. Hysteresis in the UVLO circuit prevents noise
and circuit impedance from causing chatter during turnon.
A low driver impedance allows the external MOSFET to
be turned on and off quickly. The rail-to-rail drive
capability of the output ensures a low RDSON from the
external MOSFET.
Enable Input
A logic high on the enable pin (EN) allows normal
operation to occur. Conversely, when a logic low is
applied on the enable pin, the high and low-side driver
outputs turn-off and the driver enters a low supply current
shutdown mode. Do not leave floaing.
A high level applied to LSI pin causes the upper driver
MOSFET to turn on and VDD voltage is applied to the
gate of the external MOSFET. A low level on the LSI pin
turns off the upper driver and turns on the low side driver
to ground the gate of the external MOSFET.
Dead-Time Delay
Shoot-through occurs in a half-bridge or synchronous
buck topology when both the high and low side
MOSFETs conduct at the same time. This condition is
caused by driver propagation delay variation and
MOSFET turn on/off times. Shoot-through causes an
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MIC4600
The bootstrap circuit consists of an external diode and
external capacitor, CB. In a typical application, such as
the synchronous buck converter shown in Figure 4, the
SW pin is at ground potential while the low-side MOSFET
is on. During this time, the diode allows capacitor CB to
charge up to VDD-VF (where VF is the forward voltage
drop of the diode). After the low-side MOSFET is turned
off and the DH pin goes high, the voltage across
capacitor CB is applied to the gate of the upper external
MOSFET. As the upper MOSFET turns on, voltage on
the SW pin rises with the source of the high-side
MOSFET until it reaches VIN. As the SW and BST pins
rise, the diode is reverse biased preventing capacitor CB
from discharging.
Figure 2. Low-Side Driver Circuit
High-Side Driver and Bootstrap Circuit
A block diagram of the high-side driver and bootstrap
circuit is shown in Figure 3. This driver is designed to
drive a floating N-channel MOSFET, whose source
terminal is referenced to the SW pin. The output voltage
of the DH pin equals VDD minus the external bootstrap
diode forward voltage drop. The high-side gate drive
voltage is typically 4.5V.
A low-power, high-speed, level-shifting circuit isolates the
low side (AGND pin) referenced circuitry from the highside (SW pin) referenced driver. Power to the high-side
driver is supplied by the bootstrap circuit.
Figure 4. MIC4600 Driving a Synchronous Buck Converter
Thermal Shutdown
Thermal shutdown protects the driver from damage due
to excessive die temperature. If the die exceeds the high
temperature threshold, the output drive is inhibited and
the FAULT pin is asserted low. The driver automatically
resumes operation, and the FAULT pin is de-asserted,
when the die temperature cools below the lower
threshold, set by the circuit’s hysteresis. If resumed
operation results in reheating of the die above the high
threshold, another shutdown cycle occurs. The switch
continues thermal cycling until the condition has been
resolved.
Fault Pin
The FAULT signal is an N-channel open drain output,
which is asserted low when the MIC4600 enters thermal
shutdown.
Figure 3. High-Side Driver and Bootstrap Circuit
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MIC4600
Power dissipation in the bootstrap diode can be
calculated using the following equations. The average
current drawn by repeated charging of the high-side
MOSFET is calculated by:
Application Information
Adjustable Dead Time
Dead-time control prevents shoot-through current from
flowing through the external power MOSFETs during
switching transitions. The delay allows enough time for
the high-side driver to turn off before the low-side driver
turns on. It also prevents the high-side driver from
turning on before the low-side driver has turned off.
IF( AVE ) = Q gate × f S
where;
Qgate = total gate charge at VDD
fs = gate drive switching frequency
The dead-time between the high and low-side MOSFETs
can be adjusted with a resistor on the DELAY pin. The
dead-time can be approximated with the formula below.
See the Typical Characteristic graphs for a more precise
determination of RDELAY vs. TDEAD.
TDEAD = 12 × 10 −9 + R DELAY × 0.9 × 10 −10
Eq. 2
The average power dissipated by the forward voltage
drop of the diode equals:
Pdiode fwd = IF( AVE ) × VF
Eq. 1
Eq. 3
where; VF = diode forward voltage drop
Where:
The value of VF should be taken at the peak current
through the diode; however, this current is difficult to
calculate because of differences in source impedances.
The peak current can either be measured or the value of
VF at the average current can be used, which will yield a
good approximation of diode power dissipation.
TDEAD is the break-before-make delay between the highside and low-side gate drive signals
RDELAY is the DELAY pin resistance in kΩ.
Other Timing Considerations
Make sure the input signal pulse width is greater than the
minimum specified pulse width. An input signal that is
less than the minimum pulse width may result in no
output pulse or an output pulse whose width is
significantly less than the input.
The voltage on the bootstrap capacitor drops each time it
delivers charge to turn on the MOSFET. The voltage drop
depends on the gate charge required by the MOSFET.
Most MOSFET specifications specify gate charge versus
VGS voltage. Based on this information and a suggested
capacitor voltage drop of less than 0.1V, the minimum
value of bootstrap capacitance is:
The maximum duty cycle (ratio of high side on-time to
switching period) is controlled by the minimum pulse
width of the low side and by the time required for the CB
capacitor to charge during the off-time. Adequate time
must be allowed for the CB capacitor to charge up before
the high-side driver is turned on.
CB ≥
Single Input Operation
Both outputs can be controlled from a single input signal
by pulling the LSI input high to VDD and applying the
input signal to the HSI pin. In this configuration, the deadtime between the DH and DL transitions is set by the
resistor value connected to the DELAY pin.
Eq. 4
Where:
QGATE = Total gate charge at VDD
∆VBST = Voltage drop at the BST pin
When the HSI pin goes from a low to a high, the DL pin
goes low and the DH pin goes high after the dead time
delay. When the HSI pin changes from a high to a low,
the DH pin goes lowAfter the delay time, the DL pin goes
high.
Power Dissipation Considerations
Power dissipation in the driver can be separated into two
areas:
• Quiescent current dissipation
• Internal driver dissipation
Bootstrap Diode and Capacitor
The gate drive voltage of the high-side driver equals the
VDD voltage minus the voltage drop across the bootstrap
diode. A Schottky diode is recommended due to the
lower forward voltage drop.
February 26, 2015
QGATE
∆VBST
Quiescent Current Power Dissipation
Power is dissipated in the MIC4600 even if nothing is
being driven. The quiescent current is drawn by the bias
for the internal circuitry and the level shifting circuitry. The
quiescent current is proportional to operating frequency.
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MIC4600
The typical characteristic graphs show how quiescent
current varies with switching frequency.
E=
The power dissipated due to quiescent current is
calculated in
but
PDISS _ IQ = VDD × I DD
so
1
× CISS × VGS 2 ,
2
Q = C × V,
Eq. 5
E=
Gate Driver Power Dissipation
Power dissipation in the output driver stage is mainly
caused by charging and discharging the gate to source
and gate to drain capacitance of the external MOSFET.
Figure 5 shows a simplified equivalent circuit of the
MIC4600 driving an external high-side MOSFET.
1
× Q G × VGS
2
Eq. 6
Where:
CISS = Total gate capacitance of the MOSFET
Figure 5. MIC4600 Driving an External MOSFET
Figure 6. Typical Gate Charge vs. VGS
Dissipation during the External MOSFET Turn-On
Energy from capacitor CB is used to charge up the input
capacitance of the MOSFET (CGD and CGS). The energy
delivered to the MOSFET is dissipated in the three
resistive components, RON, RG and RG_FET. RON is the on
resistance of the upper driver MOSFET in the MIC4600.
RG is the series resistor (if any) between the driver IC and
the MOSFET. RG_FET is the gate resistance of the
MOSFET. RG_FET is usually listed in the power MOSFET’s
specifications. The ESR of capacitor CB and the
resistance of the connecting etch can be ignored since
they are much less than RON and RG_FET.
The same energy is dissipated by ROFF, RG, and RG_FET
when the driver IC turns the MOSFET off. Assuming Ron
is approximately equal to ROFF, the total energy and
power dissipated by the resistive drive elements is
illustrated in Equation 7:
The effective capacitances of CGD and CGS are difficult to
calculate because they vary non-linearly with Id, VGS, and
VDS. Fortunately, most power MOSFET specifications
include a typical graph of total gate charge vs. VGS.
Figure 6 is a typical gate charge curve for a power
MOSFET. This chart shows that for a gate voltage of
4.5V, the MOSFET gate is charged up to 25nC of total
gate charge. The energy dissipated by the resistive
components of the gate drive circuit during turn-on is
calculated as noted in
Where:
February 26, 2015
E DRIVER = QG ×VGS
and
PDRIVER = QG ×VGS × f S
Eq. 7
EDRIVER = Energy dissipated per switching cycle
PDRIVER = Power dissipated per switching cycle
QG = Total gate charge at VGS
VGS = Gate to source voltage on the MOSFET
fS = Switching frequency of the gate drive circuit
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Micrel, Inc.
MIC4600
The power dissipated inside the driver is equal to the
ratio of RON and ROFF to the external resistive losses in RG
and RG_FET. Letting RON = ROFF, the power dissipated in
the MIC4600 due to driving the external MOSFET is
illustrated in Equation 8:
PDISSDRIVER = PDRIVER
R ON
R ON + R G + R G _ FET
etch connections must be short, wide, and direct. The
use of a ground plane to minimize connection impedance
is recommended (refer to the Grounding, Component
Placement, and Circuit Layout section for more
information).
Grounding, Component Placement, and Circuit
Layout
Nanosecond switching speeds and ampere peak currents
in and around the MIC4600 drivers require proper
placement and trace routing of all components. Improper
placement may cause degraded noise immunity, false
switching, excessive ringing, or circuit latch-up.
Eq. 8
Total Power Dissipation and Thermal Considerations
Total power dissipation in the MIC4600 is equal to the
power dissipation caused by driving the external
MOSFETs and the Quiescent current.
PDISS TOTAL = PDISS IQ + PDISS DRIVE
Figure 7 shows the critical current paths when the driver
outputs go high and turn on the external MOSFETs. It
also helps demonstrate the need for a low impedance
ground plane. Charge needed to turn-on the MOSFET
gates comes from the decoupling capacitors CVDD and
CB. Current in the low-side gate driver flows from CVDD
through the internal driver, into the MOSFET gate, and
out the source. The return connection back to the
decoupling capacitor is made through the ground plane.
Any inductance or resistance in the ground return path
causes a voltage spike or ringing to appear on the source
of the MOSFET. This voltage works against the gate
drive voltage and can either slow down or turn off the
MOSFET during the period when it should be turned on.
Eq. 9
The die temperature can be calculated after the total
power dissipation is known, as in Equation 10:
TJ = TA + PDISS TOTAL × θ JA
Eq. 10
Where:
Current in the high-side driver is sourced from capacitor
CB and flows into the BST pin and out the DH pin, into the
gate of the high side MOSFET. The return path for the
current is from the source of the MOSFET and back to
capacitor CB. The high-side circuit return path usually
does not have a low-impedance ground plane so the etch
connections in this critical path should be short and wide
to minimize parasitic inductance. As with the low-side
circuit, impedance between the MOSFET source and the
decoupling capacitor causes negative voltage feedback
that fights the turn-on of the MOSFET.
TA = Maximum ambient temperature
TJ = Junction temperature (°C)
PDISS TOTAL = Power dissipation of the MIC4600
θJA = Thermal resistance from junction to ambient air
Decoupling and Bootstrap Capacitor Selection
Decoupling capacitors are required for both the low side
(VDD) and high side (BST) supply pins. These capacitors
supply the charge necessary to drive the external
MOSFETs and also minimize the voltage ripple on these
pins. The capacitor from BST to SW has two functions: it
provides decoupling for the high-side driver and is the
supply voltage to the high-side circuit while the external
MOSFET is on. Ceramic capacitors are recommended
because of their low impedance and small size. Z5U type
ceramic capacitor dielectrics are not recommended
because of the large change in capacitance over
temperature and voltage. A minimum value of 0.1µF is
required for each of the capacitors, regardless of the
MOSFETs being driven. Larger MOSFETs may require
larger capacitance values for proper operation.
It is important to note that capacitor CB must be placed
close to the BST and SW pins. This capacitor not only
provides all the energy for turn-on but it must also keep
HB pin noise and ripple low for proper operation of the
high-side drive circuitry.
Placement of the decoupling capacitors is critical. The
bypass capacitor for VDD should be placed as close as
possible between the VDD and PGND pins. The bypass
capacitor (CB) for the BST supply pin must be located as
close as possible between the BST and SW pins. The
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MIC4600
Figure 7. Turn-On Current Paths
Figure 8 shows the critical current paths when the driver
outputs go low and turn off the external MOSFETs. Short,
low-impedance connections are important during turn-off
for the same reasons given in the turn-on explanation.
Current flowing through the internal diode replenishes
charge in the bootstrap capacitor, CBST
Figure 8. Turn-Off Current Paths
Use a ground plane to minimize parasitic inductance and
impedance of the return paths. The MIC4600 is capable
of greater than 1A peak currents and any impedance
between the MIC4600, the decoupling capacitors, and
the external MOSFET will degrade the performance of
the driver.
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Micrel, Inc.
MIC4600
Typical Application Schematic
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Micrel, Inc.
MIC4600
Bill of Materials
Item
C1, C8
C2
Part Number
06036D105MAT2A
C1608X5R1V225M080AC
Manufacturer
Description
(5)
AVX
(6)
TDK
C3
EEU-FM1H101B
Panasonic
C4
06033D107MAT2A
AVX
(7)
C5, C7, C12
Qty.
1µF, 6.3V, X5R, Ceramic Capacitor
2
2.2µF, 50V, X5R, Ceramic capacitor
1
100µf, 50V, Al. El.
1
0.1uF, 25V, X5R, ceramic capacitor
1
0603 size capacitor, not fitted
0
C6
C3216X5R0J107M160AB
TDK
100µF, 6.3V, x5R, ceramic
1
C9
C1608X5R1E105M080AC
TDK
1µF, 25V, X5R, ceramic
1
C10
06033A101JAT2A
AVX
100pF, 25V, NPO, ceramic
1
C11
06033A221JAT2A
AVX
220pF, 25V, NPO, ceramic
1
C13
06033C682MAT2A
AVX
6.8nF, 25V, X7R ceramic
1
(8)
R1, R2
CRCW06031002FRT1
Vishay Dale
10kΩ (0603 size), 1%
2
R3
CRCW06031053FRT1
Vishay Dale
105kΩ (0603 size), 1%
1
R4
CRCW06032R20JNEA
Vishay Dale
2.2Ω (0603 size), 5%
1
R5, R8
CRCW0600000FRT1
Vishay Dale
0Ω (0603 size)
2
R6
CRCW06031782FRT1
Vishay Dale
17.8kΩ (0603 size), 1%
1
R7
CRCW06036341FRT1
Vishay Dale
6.34kΩ (0603 size), 1%
1
R9
CRCW06032002FRT1
Vishay Dale
20kΩ (0603 size), 1%
1
R11
CRCW06032742FRT1
Vishay Dale
27.4kΩ (0603 size), 1%
1
R12
CRCW06031001FRT1
Vishay Dale
1kΩ (0603 size), 1%
1
40V, 0.1A, schottky, SOD323
1
MOSFET
2
60V, 500mA, NPN, SOT-23
1
10kΩ, 10 turn trim pot
1
1.2ΩH, 21A, inductor
1
28V Half-Bridge MOSFET Driver
1
PWM Controller
1
D1
RB500V-40-TP
(10)
MCC
(9)
Q1, Q2
FDS6612A
Fairchild
Q3
MBTA55-TP
MCC
RV1
L1
67YR10KLF
CDEP105MENP-1R2PC
(11)
TT Electronics
(12)
Sumida
U1
MIC4600YML
Micrel
U2
MIC3808YM
Micrel
(13)
Notes:
5. AVX: www.avx.com.
6. TDK: www.tdk.com.
7. Panasonic: www.panasonic.com.
8. Vishay: www.vishay.com.
9. Fairchild: www.fairchild.com.
10. MCC: www.mccsemi.com.
11. TT Electronics: www.bitechnologies.com.
12. Sumida: www.sumida.com.
13. Micrel, Inc.: www.micrel.com.
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MIC4600
PCB Layout Recommendations
Top Layer
Bottom Layer
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MIC4600
Package Information(11)
3mm × 3mm QFN 16-Pin Package (ML)
Note:
14. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
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Micrel, Inc.
MIC4600
Recommended Landing Pattern
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Micrel, Inc.
MIC4600
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications
markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock
management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company
customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products.
Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and
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of distributors and reps worldwide.
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
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implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
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© 2015 Micrel, Incorporated.
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