STF701 T-Filter with TVS Diode Array For EMI Filtering and ESD Protection PROTECTION PRODUCTS Description Features The STF701 is a low pass T-filter with integrated TVS diodes. It is designed to provide bi-directional filtering of unwanted EMI/RFI signals and electrostatic discharge (ESD) protection in portable electronic equipment. Each device will provide filtering and protection for two I/O lines. The STF701 is constructed using thin-film-on-silicon technology. The device has very low insertion loss in the pass band (to approximately 10MHz) and good attenuation at high frequencies (approximately 100MHz to 1GHz). Each line features two stages of TVS diode protection. The TVS diodes provide effective suppression of ESD voltages in excess of ±15kV (air discharge) and ±8kV (contact discharge) per IEC 61000-4-2, level 4. The clamping characteristics of the device are optimized by the use of two TVS diodes. The TVS diodes serve a dual purpose of protecting the internal capacitor and the sensitive IC connected to the line. The voltage divider action of the circuit means the voltage across the protected IC will be very close to the breakdown voltage (VBR) of the second TVS. The small size and integrated feature of the STF701 minimizes required board space and increases system reliability. The STF701 is suitable for use in portable communications devices such as cellular handsets and accessory kits. Bidirectional EMI/RFI filtering with integrated ESD protection ESD protection to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) Filtering and ESD protection for two data lines Low insertion loss to 10MHz Good attenuation of high frequency signals Low TVS operating voltage (5V) Low clamping voltage Low leakage current Thin-film-on-silicon technology Mechanical Characteristics EIAJ SC70-5L package Molding compound flammability rating: UL 94V-0 Marking : 701 Packaging : Tape and Reel per EIA 481 Applications Circuit Diagram Cell phone handsets Cell phone accessories RF Communications equipment Laptop Computers Two-way pagers GPS Devices Schematic & PIN Configuration SC70-5L (Top View) Revision 04/18/03 1 www.semtech.com STF701 PROTECTION PRODUCTS Absolute Maximum Rating Rating Symbol Value Units Steady-State Power Pp k 100 mW ESD Air Discharge per IEC 61000-4-2 ESD Contact Discharge per IEC 61000-4-2 VESD 15 8 kV Lead Soldering Temperature TL 260 (10 sec.) °C Operating Temperature TJ -20 to +125 °C TSTG -55 to +150 °C Storage Temperature Electrical Characteristics STF701 Parameter Symbol Conditions Minimum Typical Maximum Units 5 V T VS Reverse Stand-Of f Voltage VRWM T VS Reverse Breakdown Voltage VBR It = 1mA T VS Reverse Leakage Current IR VRWM = 5V, T=25°C 5 µA T VS Reverse Leakage Current IR VRWM = 3.3V, T=25°C 1 µA T VS Junction Capacitance Cj Between I/O pins and Ground, each device VR = 0V, f = 1MHz Total Series Resistance R Each Line Capacitor C Each Line 100 pF CTOT Between Input and Output, each Line VR = 0V, f = 1MHz 230 pF Total Capacitance 2003 Semtech Corp. 2 6 V 65 45 50 pF 55 Ω www.semtech.com STF701 PROTECTION PRODUCTS Typical Characteristics Normalized Resistance vs. Temperature 1.1 1.1 1.05 1.05 |R| |VBR| Normalized Breakdown Voltage vs. Temperature 1 0.95 1 0.95 0.9 0.9 -40 10 60 110 -40 O Attenuation 100MHz -10.75dB 1GHz -14.71dB 60 110 Temperature ( C) ESD Clamping (8kV Contact per IEC 61000-4-2) Typical Insertion Loss Frequency 10 O Temperature ( C) Measurement taken with Hewlett Packard Model 8753E Network Analyzer 2003 Semtech Corp. 3 www.semtech.com STF701 PROTECTION PRODUCTS Applications Information Device Connection for Protection of Two Data Lines Figure 1 - STF701 Circuit Diagram The STF701 is designed to provide EMI filtering and ESD protection for two I/O lines. The equivalent circuit diagram is shown in Figure 1. The device is connected as follows: 1. Line 1 is connected at pins 1 & 5 and line 2 is connected at pins 3 & 4 (Figure 2). The device is symmetrical so input & output connections can be made on either side of the device. Pin 2 is connected to ground. The ground connection should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Figure 2 - STF701 Connection Diagram Voltage Clamping Characteristics. The clamping characteristics of the STF701 are optimized by the use of two TVS diodes in the protection circuit (Figure 3). An ESD strike on the protected line will be initially suppressed by the first TVS diode. The voltage across the TVS will be the clamping voltage of the device (VC1) given by: VC1 = Vbr + RD * IPP where Vbr = Breakdown voltage of the TVS RD = Dynamic resistance of the TVS IPP = Peak pulse (ESD) current Figure 3 - STF701 Clamping Characteristics The dynamic resistance of the TVS is very small, typically < 0.5Ω. The second TVS will be subjected to VC1 through the voltage divider formed by the series resistor (R) and the dynamic resistance of the TVS. Since R >> RD then by the voltage divider theorem, the voltage seen by the protected IC will be a few millivolts above the breakdown voltage (Vbr) of the second TVS. 2003 Semtech Corp. 4 www.semtech.com STF701 PROTECTION PRODUCTS Outline Drawing - SC70-5L Land Pattern - SC70-5L 2003 Semtech Corp. 5 www.semtech.com STF701 PROTECTION PRODUCTS Marking Codes Part Number Marking Code STF701 701 Ordering Information Part Number Working Voltage Qty per R eel R eel Size STF701.TC 5V 3,000 7 Inch STF701.TG 5V 10,000 13 Inch Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2003 Semtech Corp. 6 www.semtech.com