PBSS4350SPN 50 V, 2.7 A NPN/PNP low V_CEsat

PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Rev. 01 — 5 April 2007
Product data sheet
1. Product profile
1.1 General description
NPN/PNP double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium
power Surface-Mounted Device (SMD) plastic package.
Table 1.
Product overview
Type number
PBSS4350SPN
Package
NXP
Name
NPN/NPN
complement
SOT96-1
SO8
PBSS4350SS
PNP/PNP
complement
PBSS5350SS
1.2 Features
n
n
n
n
n
Low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High collector current gain (hFE) at high IC
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
n
n
n
n
Complementary MOSFET driver
Half and full bridge motor drivers
Dual low power switches (e.g. motors, fans)
Automotive
1.4 Quick reference data
Table 2.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
50
V
-
-
2.7
A
-
-
5
A
-
90
130
mΩ
TR1; NPN low VCEsat transistor
VCEO
collector-emitter voltage
IC
collector current
ICM
peak collector current
single pulse;
tp ≤ 1 ms
RCEsat
collector-emitter
saturation resistance
IC = 2 A;
IB = 200 mA
[1]
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Table 2.
Quick reference data …continued
Symbol Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
−50
V
-
-
−2.7
A
-
-
−5
A
-
95
140
mΩ
TR2; PNP low VCEsat transistor
VCEO
collector-emitter voltage
IC
collector current
ICM
peak collector current
single pulse;
tp ≤ 1 ms
RCEsat
collector-emitter
saturation resistance
IC = −2 A;
IB = −200 mA
[1]
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
2. Pinning information
Table 3.
Pinning
Pin
Description
1
emitter TR1
2
base TR1
3
emitter TR2
4
base TR2
5
collector TR2
6
collector TR2
7
collector TR1
8
collector TR1
Simplified outline
8
Symbol
8
5
7
TR1
1
4
1
6
5
TR2
2
3
4
006aaa985
3. Ordering information
Table 4.
Ordering information
Type number
PBSS4350SPN
Package
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width
3.9 mm
SOT96-1
4. Marking
Table 5.
Marking codes
Type number
Marking code
PBSS4350SPN
4350SPN
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
2 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
5
V
IC
collector current
-
2.7
A
ICM
peak collector current
-
5
A
IB
base current
total power dissipation
Ptot
single pulse;
tp ≤ 1 ms
Tamb ≤ 25 °C
-
0.5
A
[1]
-
0.55
W
[2]
-
0.87
W
[3]
-
1.43
W
[1]
-
0.75
W
[2]
-
1.2
W
[3]
-
2
W
Per device
total power dissipation
Ptot
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
3 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa967
2.5
Ptot
(W)
(1)
2.0
1.5
(2)
1.0
(3)
0.5
0
−75
−25
25
75
125
175
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Per device: Power derating curves
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
4 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
6. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
[1]
-
-
227
K/W
[2]
-
-
144
K/W
[3]
-
-
87
K/W
-
-
40
K/W
[1]
-
-
167
K/W
[2]
-
-
104
K/W
[3]
-
-
63
K/W
Per transistor
thermal resistance from
junction to ambient
Rth(j-a)
in free air
thermal resistance from
junction to solder point
Rth(j-sp)
Per device
Rth(j-a)
thermal resistance from
junction to ambient
in free air
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aaa809
103
duty cycle =
Zth(j-a)
(K/W)
102
1.0
0.75
0.5
0.33
0.2
10
0.05
0.1
0.02
0.01
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
5 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa810
103
duty cycle =
Zth(j-a)
(K/W)
1.0
0.75
0.5
0.33
0.2
102
0.1
10
0.05
0.02
0.01
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa811
103
Zth(j-a)
(K/W)
duty cycle =
102
1.0
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
6 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
collector-base cut-off VCB = 50 V; IE = 0 A
current
VCB = 50 V; IE = 0 A;
Tj = 150 °C
-
-
100
nA
-
-
50
µA
ICES
collector-emitter
cut-off current
VCE = 50 V; VBE = 0 V
-
-
100
nA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
100
nA
hFE
DC current gain
VCE = 2 V; IC = 100 mA
TR1; NPN low VCEsat transistor
ICBO
VCEsat
collector-emitter
saturation voltage
300
520
-
VCE = 2 V; IC = 500 mA
[1]
300
500
-
VCE = 2 V; IC = 1 A
[1]
300
470
-
VCE = 2 V; IC = 2 A
[1]
200
340
-
VCE = 2 V; IC = 2.7 A
[1]
120
180
-
IC = 0.5 A; IB = 50 mA
-
50
80
mV
IC = 1 A; IB = 50 mA
-
100
160
mV
IC = 2 A; IB = 100 mA
-
190
280
mV
IC = 2 A; IB = 200 mA
-
180
260
mV
IC = 2.7 A; IB = 270 mA
-
240
340
mV
-
90
130
mΩ
-
0.95
1.1
V
-
1.1
1.2
V
-
0.8
1.2
V
-
8
-
ns
-
96
-
ns
-
104
-
ns
[1]
RCEsat
collector-emitter
IC = 2 A; IB = 200 mA
saturation resistance
[1]
VBEsat
base-emitter
saturation voltage
[1]
IC = 2 A; IB = 100 mA
IC = 2.7 A; IB = 270 mA
VBEon
base-emitter turn-on VCE = 2 V; IC = 1 A
voltage
td
delay time
tr
rise time
ton
turn-on time
ts
storage time
-
355
-
ns
tf
fall time
-
165
-
ns
toff
turn-off time
-
520
-
ns
Cc
collector capacitance VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
-
18
25
pF
VCC = 10 V; IC = 2 A;
IBon = 100 mA;
IBoff = −100 mA
PBSS4350SPN_1
Product data sheet
[1]
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
7 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Table 8.
Characteristics …continued
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
-
-
−100
nA
-
-
−50
µA
TR2; PNP low VCEsat transistor
ICBO
collector-base cut-off VCB = −50 V; IE = 0 A
current
VCB = −50 V; IE = 0 A;
Tj = 150 °C
ICES
collector-emitter
cut-off current
VCE = −50 V; VBE = 0 V
-
-
−100
nA
IEBO
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
-
-
−100
nA
hFE
DC current gain
VCE = −2 V; IC = −100 mA
VCEsat
collector-emitter
saturation voltage
200
340
-
VCE = −2 V; IC = −500 mA
[1]
200
290
-
VCE = −2 V; IC = −1 A
[1]
180
250
-
VCE = −2 V; IC = −2 A
[1]
130
180
-
VCE = −2 V; IC = −2.7 A
[1]
95
135
-
[1]
IC = −0.5 A; IB = −50 mA
-
−60
−90
mV
IC = −1 A; IB = −50 mA
-
−125
−180
mV
IC = −2 A; IB = −100 mA
-
−225
−320
mV
IC = −2 A; IB = −200 mA
-
−190
−280
mV
-
−255
−370
mV
-
95
140
mΩ
IC = −2.7 A; IB = −270 mA
RCEsat
collector-emitter
IC = −2 A; IB = −200 mA
saturation resistance
[1]
VBEsat
base-emitter
saturation voltage
[1]
IC = −2 A; IB = −100 mA
-
−0.95
−1.1
V
IC = −2.7 A; IB = −270 mA
-
−1
−1.2
V
-
−0.8
−1.2
V
VBEon
base-emitter turn-on VCE = −2 V; IC = −1 A
voltage
td
delay time
tr
rise time
ton
turn-on time
ts
VCC = −10 V; IC = −2 A;
IBon = −100 mA;
IBoff = 100 mA
-
9
-
ns
-
54
-
ns
-
63
-
ns
storage time
-
190
-
ns
tf
fall time
-
50
-
ns
toff
turn-off time
-
240
-
ns
Cc
collector capacitance VCB = −10 V; IE = ie = 0 A;
f = 1 MHz
-
25
35
pF
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBSS4350SPN_1
Product data sheet
[1]
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
8 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa968
1000
006aaa969
5
hFE
IB (mA) = 100
IC
(A)
(1)
800
80
4
(2)
600
90
60
70
50
40
30
3
20
10
400
2
(3)
200
0
10−1
1
1
10
102
103
104
IC (mA)
0
0
0.4
0.8
1.2
1.6
2.0
VCE (V)
Tamb = 25 °C
VCE = 2 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5. TR1 (NPN): DC current gain as a function of
collector current; typical values
006aaa970
1.2
Fig 6. TR1 (NPN): Collector current as a function of
collector-emitter voltage; typical values
006aaa971
1.4
VBE
(V)
VBEsat
(V)
0.8
1.0
(1)
(2)
(1)
(3)
0.4
(2)
0.6
(3)
0
10−1
1
10
102
103
104
IC (mA)
0.2
10−1
1
VCE = 2 V
IC/IB = 20
(1) Tamb = −55 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 7. TR1 (NPN): Base-emitter voltage as a function
of collector current; typical values
102
103
104
IC (mA)
Fig 8. TR1 (NPN): Base-emitter saturation voltage as a
function of collector current; typical values
PBSS4350SPN_1
Product data sheet
10
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
9 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa972
1
006aaa973
1
VCEsat
(V)
VCEsat
(V)
10−1
10−1
(1)
(2)
(3)
(1)
(2)
10−2
10−2
(3)
10−3
10−1
1
10
102
103
104
IC (mA)
10−3
10−1
1
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 9. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values
006aaa974
103
103
104
IC (mA)
Fig 10. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values
RCEsat
(Ω)
102
102
10
10
(1)
(2)
(3)
1
006aaa975
103
RCEsat
(Ω)
(1)
(2)
(3)
1
10−1
10−1
1
10
102
103
104
IC (mA)
10−2
10−1
1
10
102
103
104
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 11. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4350SPN_1
Product data sheet
102
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
10−2
10−1
10
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
10 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa977
600
006aaa978
−5
IB (mA) = −140
−126
−112
−98
−84
−70
−56
IC
(A)
hFE
(1)
−4
400
−3
(2)
−42
−28
−14
−2
200
(3)
−1
0
−10−1
−1
−10
−102
−103
−104
IC (mA)
VCE = −2 V
0
0
−0.4
−0.8
−1.2
−1.6
−2.0
VCE (V)
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 13. TR2 (PNP): DC current gain as a function of
collector current; typical values
006aaa979
−1.2
Fig 14. TR2 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa980
−1.4
VBE
(V)
VBEsat
(V)
−0.8
−1.0
(1)
(1)
(2)
(3)
−0.4
(2)
−0.6
(3)
0
−10−1
−1
−10
−102
−103
−104
IC (mA)
VCE = −2 V
−0.2
−10−1
−1
−102
−103
−104
IC (mA)
IC/IB = 20
(1) Tamb = −55 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 15. TR2 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 16. TR2 (PNP): Base-emitter saturation voltage as a
function of collector current; typical values
PBSS4350SPN_1
Product data sheet
−10
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
11 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
006aaa981
−1
006aaa982
−1
VCEsat
(V)
VCEsat
(V)
−10−1
−10−1
(1)
(1)
(2)
(3)
(2)
−10−2
−10−3
−10−1
−10−2
−1
−10
−102
−103
−104
IC (mA)
−10−3
−10−1
(3)
−1
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 17. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values
006aaa983
103
−103
−104
IC (mA)
Fig 18. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values
RCEsat
(Ω)
102
102
10
10
(1)
(2)
(3)
1
006aaa984
103
RCEsat
(Ω)
(1)
(2)
(3)
1
10−1
10−1
−1
−10
−102
−103
−104
IC (mA)
10−2
−10−1
−1
−10
−102
−103
−104
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 19. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 20. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4350SPN_1
Product data sheet
−102
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
10−2
−10−1
−10
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
12 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
8. Test information
IB
input pulse
(idealized waveform)
90 %
IBon (100 %)
10 %
IBoff
output pulse
(idealized waveform)
IC
90 %
IC (100 %)
10 %
t
td
ts
tr
ton
tf
toff
006aaa003
Fig 21. TR1 (NPN): BISS transistor switching time definition
VBB
RB
VCC
RC
Vo
(probe)
oscilloscope
450 Ω
(probe)
450 Ω
oscilloscope
R2
VI
DUT
R1
mlb826
VCC = 10 V; IC = 2 A; IBon = 100 mA; IBoff = −100 mA
Fig 22. TR1 (NPN): Test circuit for switching times
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
13 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
− IB
input pulse
(idealized waveform)
90 %
− I Bon (100 %)
10 %
− I Boff
output pulse
(idealized waveform)
− IC
90 %
− I C (100 %)
10 %
t
td
ts
tr
t on
tf
t off
006aaa266
Fig 23. TR2 (PNP): BISS transistor switching time definition
VBB
RB
VCC
RC
Vo
(probe)
oscilloscope
450 Ω
(probe)
450 Ω
oscilloscope
R2
VI
DUT
R1
mgd624
VCC = −10 V; IC = −2 A; IBon = −100 mA; IBoff = 100 mA
Fig 24. TR2 (PNP): Test circuit for switching times
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
14 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
9. Package outline
5.0
4.8
1.75
1.0
0.4
6.2
5.8
4.0
3.8
pin 1 index
1.27
0.49
0.36
Dimensions in mm
0.25
0.19
03-02-18
Fig 25. Package outline SOT96-1 (SO8)
10. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PBSS4350SPN
[1]
Package
SOT96-1
Description
8 mm pitch, 12 mm tape and reel
1000
2500
-115
-118
For further information and the availability of packing methods, see Section 14.
PBSS4350SPN_1
Product data sheet
Packing quantity
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
15 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
11. Soldering
5.50
0.60 (8×)
1.30
4.00
6.60
7.00
1.27 (6×)
solder lands
occupied area
placement accuracy ± 0.25
Dimensions in mm
sot096-1_fr
Fig 26. Reflow soldering footprint SOT96-1 (SO8)
1.20 (2×)
0.60 (6×)
enlarged solder land
0.3 (2×)
1.30
4.00
6.60
7.00
1.27 (6×)
5.50
board direction
solder lands
occupied area
solder resist
placement accurracy ± 0.25
Dimensions in mm
sot096-1_fw
Fig 27. Wave soldering footprint SOT96-1 (SO8)
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
16 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
12. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBSS4350SPN_1
20070405
Product data sheet
-
-
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
17 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
PBSS4350SPN_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 5 April 2007
18 of 19
PBSS4350SPN
NXP Semiconductors
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
15. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test information . . . . . . . . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Packing information. . . . . . . . . . . . . . . . . . . . . 15
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 5 April 2007
Document identifier: PBSS4350SPN_1