UM805/811/812 4-Pin μP Voltage Monitors with Manual Reset Input UM805/811/812 SOT143 General Description The UM805/811/812 are low-power microprocessor (μP) supervisory circuits used to monitor power supplies in μP and digital systems. They provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5V-powered or 3V-powered circuits. The UM805/811/812 also provide a debounced manual reset input. These devices perform a single function: They assert a reset signal whenever the VCC supply voltage falls below a preset threshold, keeping it asserted for at least 140ms after VCC has risen above the reset threshold. Reset thresholds are available for operation with a variety of supply voltages. The UM805 has an open-drain output stage, while the UM811/812 have push-pull outputs. The _____________ UM805’s open-drain RESET output requires a pull-up resistor that can be connected to a voltage _____________ higher than VCC. The UM805/811 have an active-low RESET output, while the UM812 has an active-high RESET output. The reset comparator is designed to ignore fast transients on VCC, and the outputs are guaranteed to be in the correct logic state for VCC down to 1V. Low supply current makes the UM805/811/812 ideal for use in portable equipments. The devices come in a 4-pin SOT143 package. Applications Features Computers Controllers Portable/Battery-Powered Equipments Intelligent Instruments Critical μP and μC Power Monitoring No External Components VCC Transient Immunity Correct Logic Output Guaranteed to VCC=1.0V Precision VCC Monitoring of 3.0V, 3.3V and 5.0V Supplies 2μA Supply Current 140ms Minimum Power-On Reset Pulse Width Guaranteed Over Temperature Available in 3 Output Configurations: __________ Open-Drain Active-Low RESET Output(UM805) __________ Push-Pull Active-Low RESET Output(UM811) Push-Pull Active-High RESET Output(UM812) 4-Pin SOT143 Package Wide Operation Temperature: -40°C to +85°C ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 1/14 UM805/811/812 Pin Configurations 4 1 4 VCC 3 XXX 1 RESET 2 (RESET) 3 M GND Top View 2 MR M: Month Code UM805/811/812 SOT143 ( ) are for UM812 Ordering Information UM8 XX Z P XX: Output Type =05 Open-Drain Active Low =11 Push-Pull Active Low =12 Push-Pull Active High Z: Reset Threshold (V) =L 4.63 =M 4.38 =J 4.00 =T 3.08 =S 2.93 =R 2.63 =Z 2.32 P: Package Type =E SOT143 Typical Operating Circuit VCC VCC VCC UM805 UM811 UM812 RESET (RESET) Rpullup* μP RESET INPUT MR GND GND PUSHBUTTON SWITCH *UM805 ONLY ( ) are for UM812 ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 2/14 UM805/811/812 Pin Description Pin Number Pin Name 1 GND Function Ground _____________ Active-Low Reset Output. RESET remains low while VCC is below _______ ______________ RESET (UM805/811) 2 the reset threshold or while M R is held low. It remains low for the Reset Active Timeout Period (tRP) after the reset conditions are terminated. See Figure 1. UM811: CMOS push-pull output (sources and sinks current) UM805: Open-drain, active low, NMOS output (sinks current only). Connect a ______________ pull-up resistor from RESET to any supply voltage up to 6V. Active-High Reset Output. RESET remains high while VCC is below RESET (UM812) _______ the reset threshold or while MR is held low. RESET remains high for Reset Active Timeout Period (tRP) after the reset conditions are terminated. _______ Manual Reset Input. A logic low on M R asserts reset. Reset remains _______ 3 4 _______ MR VCC _______ asserted as long as M R is low and for 240ms after M R returns high. This active-low input has an internal 20kΩ pull-up resistor. It can be driven from a TTL or CMOS-logic line, or shorted to ground with a switch. Leave open if unused. See Figure 2. +5V, +3.3V, or +3V Supply Voltage Absolute Maximum Ratings (Note 1) Symbol VCC Parameter Supply Voltage RESET, RESET (push-pull) _____________ PD TA TSTG -0.3 to (VCC+0.3) V -0.3 to +6.0 RESET (open-drain) IO Unit -0.3 to +6.0 _____________ ICC Value _______ Input Current, VCC, M R _____________ 20 mA 20 mA Output Current, RESET, RESET Continuous Power Dissipation (Derate 4mW/°C above 70°C) Operating Temperature Range 320 mW -40 to +105 °C Storage Temperature Range -65 to +160 °C Lead Temperature (soldering, 10s) +300 °C Note 1: Stresses beyond those listed under “Absolute maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 3/14 UM805/811/812 Electrical Characteristics (VCC = 5V for L/M/J versions, VCC = 3.3V for T/S versions, VCC = 3V for R version, and VCC = 2.5V for Z version, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) Symbol Parameter Conditions Min VCC Supply Voltage Range TA=0°C to +70°C 1.0 ICC Supply Current L version M version J version VTH+ Reset Threshold T version S version R version Z version TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ TA=+25℃ TA=-40℃ to + 85℃ 4.56 4.50 4.31 4.25 3.93 3.89 3.04 3.00 2.89 2.85 2.59 2.55 2.28 2.25 Reset Threshold Tempco VCC to Reset Delay (Note 3) tRP Reset Active Timeout Period 140 Typ Max Unit 5.5 V 2.0 5.0 μA 4.63 4.70 4.75 4.45 4.50 4.06 4.10 3.11 3.15 2.96 3.00 2.66 2.70 2.35 2.38 V 4.38 4.00 3.08 2.93 2.63 2.32 150 ppm/°C 10 μs 240 560 ______ tMR MR Minimum Pulse Width ______ MR Glitch Immunity (Note 4) μs 10 100 ns 0.5 μs ______ tMD MR to Reset Propagation Delay VIH VIL VIH VCC > VTH(MAX) UM805/811/812LE/ME/JE 2.3 0.8 ______ MR Input Threshold V VCC > VTH(MAX) UM805/811/812TE/SE/RE/ZE VIL ms 0.7×VCC 0.25×VCC ______ MR Pull-Up Resistance 10 20 30 kΩ ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 4/14 UM805/811/812 Electrical Characteristics (Continued) (VCC = 5V for L/M/J versions, VCC = 3.3V for T/S versions, VCC = 3V for R version, and VCC = 2.5V for Z version, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) Symbol Parameter VOH RESET Output Voltage VOL VOH ____________ RESET Output Voltage VOL Conditions ISOURCE=150μA, 1.8V<VCC<VTH(MIN) UM812LE/ME/JE/TE/SE/RE/ZE ISINK=1.2mA UM812TE/SE/RE/ZE ISINK=3.2mA UM812LE/ME/JE ISOURCE=500μA, VCC>VTH(MAX) UM811TE/SE/RE/ZE ISOURCE=800μA, VCC>VTH(MAX) UM811LE/ME/JE ISINK=1.2mA, VCC=VTH(MIN) UM805/811TE/SE/RE/ZE ISINK=3.2mA, VCC=VTH(MIN) UM805/811LE/ME/JE ISINK=50μA, VCC>1.0V Min Typ Max Unit 0.3 V 0.8×VCC 0.4 0.8×VCC VCC-1.5 0.3 V 0.4 0.3 Note 2: Production _____________ testing done at TA = +25°C; limits over temperature guaranteed by design only. Note 3: RESET output for UM805/811; RESET output for UM812. Note 4: “Glitches” of 100ns or less typically will not generate a reset pulse. ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 5/14 UM805/811/812 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) Supply Current vs. Temperature (UM811RE) Power-down RESET Delay vs. Temperature (UM811RE) VCC=3.3V Power-up RESET Timeout vs. Temperature ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 6/14 UM805/811/812 Detailed Description RESET Timing The reset signal is asserted LOW for the UM811 and HIGH for the UM812 when the power supply voltage falls below the threshold trip voltage and remains asserted for at least 140ms after the power supply voltage has risen above the threshold. 5V VTH VCC VTH 0V tRP 5V RESET 0V 5V RESET 0V Figure 1. RESET vs. VCC Timing Diagram _______ The reset signal is asserted LOW for the UM811 and HIGH for the UM812 when M R is low and _______ remains asserted for at least 140ms after M R is high. HIGH tMR MR LOW tRP tMD VCC RESET 0V VCC RESET 0V _______ Figure 2. RESET vs. MR Timing Diagram Reset Output A microprocessor’s (µP’s) reset input starts the µP in a known state. These μP supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. _____________ RESET is guaranteed to be a logic low for VCC > 1V. Once VCC exceeds the reset threshold, an _____________ _____________ internal timer keeps RESET low for the reset timeout period; after this interval, RESET goes ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 7/14 UM805/811/812 high. _____________ If a brownout condition occurs (VCC dips below the reset threshold), RESET goes low. Any time _____________ VCC goes below the reset threshold, the internal timer resets to zero, and RESET goes low. The _____________ internal timer starts after VCC returns above the reset threshold, and RESET remains low for the reset timeout period. _______ The manual reset input (M R ) can also initiate a reset. See the Manual Reset Input section. _____________ The UM812 has an active-high RESET output that is the inverse of the UM805/811’s RESET output. The UM805 uses an open-drain output, and the UM811/812 have a push-pull output stage. _____________ Connect a pull-up resistor on the UM805’s RESET output to any supply between 0 and 6V. Manual Reset Input Many μP-based products require manual reset capability, allowing the operator, a test technician, or _______ external logic circuitry to initiate a reset. A logic low on M R asserts reset. Reset remains asserted _______ _______ while M R is low, and for the Reset Active Timeout Period (tRP) after M R returns high. This input _______ has an internal 20kΩ pull-up resistor, so it can be left open if it is not used. M R can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open _______ momentary switch from M R to GND to create a manual-reset function; external debounce _______ circuitry is not required. If M R is driven from long cables or if the device is used in a noisy _______ environment, connecting a 0.1μF capacitor from M R to ground provides additional noise immunity. Reset Threshold Accuracy The UM805/811/812 are ideal for systems using a 5V±5% or 3V±5% power supply with ICs specified for 5V±10% or 3V±10%, respectively. They are designed to meet worst-case specifications over temperature. The reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range for the system ICs. The thresholds are pre-trimmed and exhibit tight distribution, reducing the range over which an undesirable reset may occur. ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 8/14 UM805/811/812 Applications Information Negative-Going VCC Transients In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, the UM805/811/812 are relatively immune to short-duration negative-going VCC transients (glitches). Figure 3 shows typical transient duration vs. reset comparator overdrive, for which the UM805/811/812 do not generate a reset pulse. The graph was generated using a negative-going pulse applied to VCC, starting above the actual reset threshold and ending below it by the magnitude indicated (reset comparator overdrive). The graph indicates the typical maximum pulse width a negative-going VCC transient may have without causing a reset pulse to be issued. As the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, for the UM8_ _LE/ME/JE, a VCC transient that goes 125mV below the reset threshold and lasts 40µs or less will not cause a reset pulse to be issued. A 0.1µF capacitor mounted as close as possible to the VCC provides additional transient immunity. UM8_ _LE/ME/JE UM8_ _TE/SE/RE/ZE Figure 3. Maximum Transient Duration without Causing a Reset Pulse vs. Reset Comparator Overdrive ______________ Ensuring a Valid RESET Output Down to VCC = 0V _____________ When VCC falls below 1V, the UM811 RESET output no longer sinks current—it becomes an open _____________ circuit. Therefore, high-impedance CMOS-logic inputs connected to RESET can drift to undetermined voltages. This presents no problem in most applications since most µP and other _____________ circuitry is inoperative with VCC below 1V. However, in applications where RESET must be valid _____________ down to 0V, adding a pull-down resistor to RESET pin will causes any stray leakage currents to _____________ flow to ground, holding RESET low (Figure 4). R1’s value is not critical; 100kΩ is large enough _____________ _____________ not to load RESET and small enough to pull RESET to ground. A 100kΩ pull-up resistor to VCC is also recommended for the UM812 if RESET is required to remain valid for VCC < 1V. ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 9/14 UM805/811/812 ____________ Figure 4. RESET Valid to VCC = Ground Circuit Interfacing to μPs with Bidirectional Reset Pins μPs with bidirectional reset pins (such as the Motorola68HC11 series) can contend with the ______________ UM811/812 reset outputs. If, for example, the UM811 RESET output is asserted high and the μP wants to pull it low, indeterminate logic levels may result. To correct such cases, connect a 4.7kΩ ______________ resistor between the UM811 RESET (or UM812 RESET) output and the μP reset I/O (Figure 5). Buffer the reset output to other system components. BUFFER Buffered RESET to Other System Components VCC VCC VCC UM811 RESET GND µP 4.7k RESET GND Figure 5. Interfacing to μPs with Bidirectional Reset I/O ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 10/14 UM805/811/812 ______________ UM805 Open-Drain RESET Output Allows Use with Multiple Supplies Generally, the pull-up connected to the UM805 will connect to the supply voltage that is being monitored at the IC’s VCC pin. However, some systems may use the open-drain output to level-shift from the monitored supply to reset circuitry powered by some other supply (Figure 6). Note that as ______________ the UM805’s VCC decreases below 1V, so does the IC’s ability to sink current at RESET . Also, ______________ with any pull-up, RESET will be pulled high as VCC decays toward 0. The voltage where this occurs depends on the pull-up resistor value and the voltage to which it is connected. 5.0V 3.3V VCC Rpull-up VCC 5V System UM805 RESET RESET GND GND ______________ Figure 6. UM805 Open-Drain RESET Output Allows Use with Multiple Supplies ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 11/14 UM805/811/812 Package Information UM805/811/812 SOT143 Outline Drawing e C L1 Symbol 3 1 2 L E E1 4 e1 Top View End View A1 A A2 D b2 b Side View A A1 A2 b b2 C D E E1 e e1 L1 L DIMENSIONS MILLIMETERS Min Max 0.763 1.220 0.013 0.150 0.750 1.070 0.300 0.510 0.760 0.930 0.080 0.200 2.800 3.040 2.200 2.640 1.200 1.400 1.920BSC 0.200BSC 0.540REF 0.400 0.600 INCHES Min Max 0.031 0.049 0.001 0.006 0.030 0.043 0.012 0.020 0.030 0.037 0.003 0.008 0.112 0.122 0.088 0.211 0.048 0.056 0.077BSC 0.008BSC 0.022 0.016 0.024 Land Pattern 1.92 0.80 0.20 0.90 0.50 NOTES: 1. Compound dimension: 2.90×1.30; 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. XXX M Tape and Reel Orientation ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 12/14 UM805/811/812 Selection Table Part Number RESET Timeout Threshold Period (V) (ms) UM805LE 4.63 240 UM805ME 4.38 240 UM805JE 4.00 240 UM805TE 3.08 240 UM805SE 2.93 240 UM805RE 2.63 240 UM805ZE 2.32 240 UM811LE 4.63 240 UM811ME 4.38 240 UM811JE 4.00 240 UM811TE 3.08 240 UM811SE 2.93 240 UM811RE 2.63 240 UM811ZE 2.32 240 UM812LE 4.63 240 UM812ME 4.38 240 UM812JE 4.00 240 UM812TE 3.08 240 UM812SE 2.93 240 UM812RE 2.63 240 UM812ZE 2.32 240 Output Type Open-Drain, Active Low Open-Drain, Active Low Open-Drain, Active Low Open-Drain, Active Low Open-Drain, Active Low Open-Drain, Active Low Open-Drain, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active Low Push-Pull, Active High Push-Pull, Active High Push-Pull, Active High Push-Pull, Active High Push-Pull, Active High Push-Pull, Active High Push-Pull, Active High Marking Code Package Type Shipping Qty SOT143 3000pcs/7Inch Tape & Reel 05L 05M 05J 05T 05S 05R 05Z 11L 11M 11J 11T 11S 11R 11Z 12L 12M 12J 12T 12S 12R 12Z ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 13/14 UM805/811/812 IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai 201210 Tel: 021-51093966 Fax: 021-51026018 Website: www.union-ic.com ________________________________________________________________________ http://www.union-ic.com Rev.01 Jan.2015 14/14