FAN4860 3 MHz, Synchronous TinyBoost™ Regulator Features Description Operates with Few External Components: 1 H Inductor and 0402 Case Size Input and Output Capacitors Input Voltage Range from 2.3 V to 5.4 V The FAN4860 is a low-power boost regulator designed to provide a regulated 3.3 V, 5.0 V or 5.4 V output from a single cell Lithium or Li-Ion battery. Output voltage options are fixed at 3.3 V, 5.0 V, or 5.4 V with a guaranteed maximum load current of 200 mA at VIN=2.3 V and 300 mA at VIN=3.3 V. Input current in Shutdown Mode is less than 1 µA, which maximizes battery life. Internal Synchronous Rectifier (No External Diode Needed) Thermal Shutdown and Overload Protection Fixed 3.3 V, 5.0 V, or 5.4 V Output Voltage Options Maximum Load Current >150 mA at VIN=2.3 V Maximum Load Current 300 mA at VIN=3.3 V, VOUT=5.4 V Maximum Load Current 300 mA at VIN=3.3 V, VOUT=5.0 V Maximum Load Current 300 mA at VIN=2.7 V, VOUT=3.3 V Light-load PFM operation is automatic and “glitch-free”. The regulator maintains output regulation at no-load with as low as 37 µA quiescent current. The combination of built-in power transistors, synchronous rectification, and low supply current make the FAN4860 ideal for battery powered applications. Up to 92% Efficient Low Operating Quiescent Current True Load Disconnect During Shutdown Variable On-time Pulse Frequency Modulation (PFM) with Light-Load Power-Saving Mode The FAN4860 is available in 6-bump 0.4 mm pitch WaferLevel Chip Scale Package (WLCSP) and a 6-lead 2x2 mm ultra-thin MLP package. 6-Pin 2 x 2 mm UMLP 6-Bump WLCSP, 0.4 mm Pitch Applications USB “On the Go” 5 V Supply 5 V Supply – HDMI, H-Bridge Motor Drivers Figure 1. Typical Application Powering 3.3 V Core Rails PDAs, Portable Media Players Cell Phones, Smart Phones, Portable Instruments Ordering Information Part Number Operating Temperature Range Package Packing Method FAN4860UC5X -40°C to 85°C WLCSP, 0.4 mm Pitch Tape and Reel FAN4860UMP5X -40°C to 85°C UMLP-6, 2 x 2 mm Tape and Reel FAN4860UC33X -40°C to 85°C WLCSP, 0.4 mm Pitch Tape and Reel FAN4860UC54X -40°C to 85°C WLCSP, 0.4 mm Pitch Tape and Reel © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator February 2014 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Block Diagrams Figure 2. IC Block Diagram Pin Configurations Figure 3. WLCSP (Top View) Figure 4. WLCSP (Bottom View) Figure 5. 2x2 mm UMLP (Top View) Pin Definitions Pin # Name Description WLCSP UMLP A1 6 VIN Input Voltage. Connect to Li-Ion battery input power source and input capacitor (CIN). B1 5 SW Switching Node. Connect to inductor. C1 4 EN Enable. When this pin is HIGH, the circuit is enabled. This pin should not be left floating. C2 3 FB B2 2 VOUT Output Voltage. This pin is both the output voltage terminal as well as an IC bias supply. A2 1, P1 GND Ground. Power and signal ground reference for the IC. All voltages are measured with respect to this pin. © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 Feedback. Output voltage sense point for VOUT. Connect to output capacitor (COUT). www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN Parameter VIN Pin Min. Max. Units -0.3 5.5 V VOUT VOUT Pin –2 6 V VFB FB Pin –2 6 V VSW SW Node DC -0.3 5.5 Transient: 10 ns, 3 MHz -1.0 6.5 VEN EN Pin -0.3 5.5 ESD Electrostatic Discharge Protection Level Human Body Model per JESD22-A114 2 Charged Device Model per JESD22-C101 1 V V kV TJ Junction Temperature –40 +150 °C TSTG Storage Temperature –65 +150 °C +260 °C TL Lead Soldering Temperature, 10 Seconds Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VIN IOUT Parameter Supply Voltage Min. Max. 5.4 VOUT 2.3 4.5 5.0 VOUT 2.3 4.5 3.3 VOUT 2.3 3.2 Output Current 200 Units V mA TA Ambient Temperature –40 +85 °C TJ Junction Temperature –40 +125 °C Thermal Properties Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 2s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA. Symbol JA Parameter Junction-to-Ambient Thermal Resistance © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 Typical Units WLCSP 130 °C/W UMLP 57 °C/W www.fairchildsemi.com 3 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Absolute Maximum Ratings Minimum and maximum values are at VIN=VEN=2.3 V to 4.5 V (2.5 to 3.2 VIN for 3.3 VOUT option), TA=-40°C to +85°C; circuit of Figure 1, unless otherwise noted. Typical values are at T A=25°C, VIN=VEN=3.6 V for VOUT=5.0 V / 5.4 V, and VIN=VEN=2.7 V for VOUT=3.3 V. Symbol Parameter 5.4 VOUT IIN VIN Input Current 5.0 VOUT 3.3 VOUT ILK_OUT VOUT Leakage Current ILK_RVSR VOUT to VIN Reverse Leakage Conditions Min. Typ. Max. Quiescent: VIN=3.6 V, IOUT=0, EN=VIN 37 45 Shutdown: EN=0, VIN=3.6 V 0.5 1.5 Quiescent: VIN=3.6 V, IOUT=0, EN=VIN 37 45 Shutdown: EN=0, VIN=3.6 V 0.5 1.5 Quiescent: VIN=2.7 V, IOUT=0, EN=VIN 50 65 Shutdown: EN=0, VIN=2.7 V 0.5 1.5 VOUT=0, EN=0, VIN≥3 V 10 Units A nA VOUT=5.4 V, VIN=3.6 V, EN=0 VOUT=5.0 V, VIN=3.6 V, EN=0 2.5 A 2.3 V VOUT=3.3 V, VIN=3.0 V, EN=0 VUVLO VUVLO_HY S Under-Voltage Lockout VIN Rising Under-Voltage Lockout Hysteresis VENH Enable HIGH Voltage VENL Enable LOW Voltage ILK_EN Enable Input Leakage Current Output Voltage (1) Accuracy 5.0 VOUT 3.3 VOUT VREF tOFF 190 Reference Accuracy Off Time 5.4 VOUT Maximum Output (1) Current 5.0 VOUT ISW SW Peak Current Limit V A 0.01 1.00 5.15 5.40 5.50 VIN from 2.7 V to 4.5 V, IOUT≤200 mA 5.20 5.40 5.50 VIN from 3.3 V to 4.5 V, IOUT≤300 mA 5.15 5.40 5.50 VIN from 2.3 V to 4.5 V, IOUT≤200 mA 4.80 5.05 5.15 VIN from 2.7 V to 4.5 V, IOUT≤200 mA 4.85 5.05 5.15 VIN from 3.3 V to 4.5 V, IOUT≤300 mA 4.85 5.05 5.15 VIN from 2.5 V to 3.2 V, IOUT≤200 mA 3.17 3.33 3.41 Referred to VOUT=5.4 V 5.325 5.400 5.475 Referred to VOUT=5.0 V 4.975 5.050 5.125 Referred to VOUT=3.3 V 3.280 3.330 3.380 VIN=3.6 V, VOUT=5.4 V, IOUT=200 mA 185 230 255 VIN=3.6 V, VOUT=5.0 V, IOUT=200 mA 195 240 265 290 350 VIN=2.7 V, VOUT=3.3 V, IOUT=200 mA 240 VIN=2.3 V 200 VIN=3.3 V 300 V V ns 400 VIN=2.3 V 200 VIN=3.3 V 300 VIN=3.6 V 3.3 VOUT V 0.4 VIN from 2.3 V to 4.5 V, IOUT≤200 mA VIN=3.6 V IOUT mV 1.05 5.4 VOUT VOUT 2.2 mA 400 VIN=2.5 V 250 VIN=2.7 V 300 5.4 VOUT VIN=3.6 V, VOUT>VIN 1000 1400 1500 5.0 VOUT VIN=3.6 V, VOUT>VIN 930 1100 1320 3.3 VOUT VIN=2.7 V, VOUT>VIN 650 800 950 mA Continued on the following page… © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 4 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Electrical Specifications Minimum and maximum values are at VIN=VEN=2.3 V to 4.5 V (2.5 to 3.2 VIN for 3.3 VOUT option), TA=-40°C to +85°C; circuit of Figure 1, unless otherwise noted. Typical values are at T A=25°C, VIN=VEN=3.6 V for VOUT=5.0 V / 5.4 V, and VIN=VEN=2.7 V for VOUT=3.3 V. Symbol ISS tSS Parameter 5.4 VOUT Soft-Start Input Peak 5.0 VOUT (2) Current Limit 3.3 VOUT Soft-Start Time(3) TTSD Min. Typ. VIN=3.6 V, VOUT < VIN 900 VIN=3.6 V, VOUT < VIN 850 VIN=2.7 V, VOUT < VIN 700 Max. Units mA 5.4 VOUT VIN=3.6 V, IOUT=200 mA 270 400 5.0 VOUT VIN=3.6 V, IOUT=200 mA 100 300 750 3.3 VOUT RDS(ON) Conditions s VIN=2.7 V, IOUT=200 mA 250 N-Channel Boost Switch VIN=3.6 V 300 P-Channel Sync Rectifier VIN=3.6 V 400 Thermal Shutdown ILOAD=10 mA 150 °C 30 °C TTSD_HYS Thermal Shutdown Hysteresis mΩ Notes: 1. ILOAD from 0 to IOUT; also includes load transient response. VOUT measured from mid-point of output voltage ripple. Effective capacitance of COUT > 1.5 F. 2. Guaranteed by design and characterization; not tested in production. 3. Elapsed time from rising EN until regulated VOUT. © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 5 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Electrical Specifications Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. 94.00% 96.00% 92.00% 94.00% 90.00% Efficiency (%) Efficiency (%) 92.00% 90.00% 88.00% 88.00% 86.00% 86.00% +25Ԩ 4.5Vin 3.6Vin 3.2Vin 2.5Vin 84.00% 82.00% ‐40Ԩ 84.00% 82.00% 80.00% 0 0 50 100 150 200 Load Current (mA) 250 5.42 90 Quiescent current （μA) 100 5.4 5.38 5.36 5.34 5.32 Iout (mA) @Vin=4.5V Iout (mA) @Vin=3.6V 5.28 100 150 200 Load Current (mA) 250 300 Figure 7. Efficiency vs. Temperature, 3.6 VIN 5.44 5.3 50 300 Figure 6. Efficiency vs. VIN Vout(V) +85Ԩ ‐40Ԩ 80 25Ԩ 70 85Ԩ 60 50 40 30 Iout (mA) @Vin=3.2V 5.26 Iout (mA) @ Vin=2.5V 20 5.24 0 50 100 150 200 250 2 300 2.5 3 3.5 4 4.5 5 Input voltage (V) Iload(mA) Figure 8. Line and Load Regulation Figure 9. Quiescent Current 1800 900 1700 800 1600 Peak Inductor Current (mA) Load Current, max, (mA) 1000 700 85Ԩ 600 ‐40Ԩ 500 25Ԩ 400 1500 1400 1300 1200 1100 300 25Ԩ 1000 2 2.5 200 2 2.5 3 3.5 4 3 3.5 4 4.5 Input Voltage (V) 4.5 Input voltage (V) Figure 10. Maximum DC Load Current © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 Figure 11. Peak Inductor Current www.fairchildsemi.com 6 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 5.4 VOUT Typical Characteristics FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 5.4 VOUT Typical Characteristics Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. Figure 12. 0-50 mA Load Transient, 100 ns Step Figure 13. 50-200 mA Load Transient, 100 ns Step Figure 14. Line Transient, 5 mA Load, 10 µs Step Figure 15. Line Transient, 200 mA Load, 10 µs Step 5.0 VOUT Typical Characteristics 100 95 95 92 Efficiency (%) Efficiency (%) Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. 90 85 2.5 Vin 3.3 Vin 3.6 Vin 4.5 Vin 80 75 0 50 100 150 200 250 86 83 -40C +25C +85C 80 0 300 Load Current (mA) 50 100 150 200 250 300 Load Current (mA) Figure 16. Efficiency vs. VIN © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 89 Figure 17. Efficiency vs. Temperature, 3.6 VIN www.fairchildsemi.com 7 Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. 50 50 2.5 Vin 3.3 Vin 3.6 Vin 4.5 Vin -40C +25C 25 VOUT - 5.05V (mV) VOUT - 5.05V (mV) 25 0 -25 -50 -75 +85C 0 -25 -50 -75 -100 -100 0 50 100 150 200 250 300 0 50 Load Current (mA) 100 150 200 250 300 Load Current (mA) Figure 18. Line and Load Regulation Figure 19. Load Regulation vs. Temperature, 3.6 VIN 4000 50 -40C +25C +85C 45 Quiescent Current (uA) Frequency (KHz) 3200 2400 1600 2.5 Vin 800 40 35 30 3.6 Vin 4.5 Vin 25 0 2.0 0 50 100 150 200 250 300 2.5 3.0 3.5 4.0 4.5 5.0 Input Voltage(V) Load Current (mA) Figure 20. Switching Frequency Figure 21. Quiescent Current Figure 22. Maximum DC Load Current Figure 23. Peak Inductor Current © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 8 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 5.0 VOUT Typical Characteristics Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. Figure 24. Output Ripple, 10 mA PFM Load Figure 25. Output Ripple, 200 mA PWM Load Figure 26. 0-50 mA Load Transient, 100 ns Step Figure 27. 50-200 mA Load Transient, 100 ns Step Figure 28. Line Transient, 5 mA Load, 10 µs Step Figure 29. Line Transient, 200 mA Load, 10 µs Step © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 9 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 5.0 VOUT Typical Characteristics Unless otherwise specified; circuit per Figure 1, 3.6 VIN, and TA=25°C. Figure 30. Startup, No Load Figure 31. Startup, 33 Load Figure 32. Shutdown, 1 k Load Figure 33. Shutdown, 33 Load Figure 34. Overload Protection Figure 35. Short-Circuit Response © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 10 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 5.0 VOUT Typical Characteristics 100 98 95 95 90 92 Efficiency (%) Efficiency (%) Unless otherwise specified; circuit per Figure 1, 3.0 VIN, and TA=25°C. 85 2.5 Vin 2.7 Vin 3.0 Vin 3.2 Vin 80 75 0 50 100 150 200 250 89 86 -40C +25C +85C 83 300 0 50 100 Load Current (mA) 250 300 Figure 37. Efficiency vs. Temperature, 3.0 VIN 40 40 2.5 Vin 2.7 Vin 3.0 Vin 3.2 Vin -40C +25C 20 VOUT - 3.33V (mV) 20 VOUT - 3.33V (mV) 200 Load Current (mA) Figure 36. Efficiency vs. VIN 0 -20 -40 -60 +85C 0 -20 -40 -60 -80 -80 0 50 100 150 200 250 300 0 50 Load Current (mA) 100 150 200 250 300 Load Current (mA) Figure 38. Line and Load Regulation Figure 39. Load Regulation vs. Temperature, 3.0 VIN 700 Maximum DC Load Current (mA) 55 50 Quiescent Current (uA) 150 45 40 -40C 35 600 500 400 -40C 300 +25C +25C +85C +85C 30 200 2.0 2.3 2.6 2.9 3.2 3.5 2.0 Input Voltage(V) 2.6 2.9 3.2 3.5 Input Voltage(V) Figure 40. Quiescent Current © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 2.3 Figure 41. Maximum DC Load Current www.fairchildsemi.com 11 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 3.3 VOUT Typical Characteristics Unless otherwise specified; circuit per Figure 1, 3.0 VIN, and TA=25°C. Figure 42. Output Ripple, 10 mA PFM Load Figure 43. Output Ripple, 200 mA PWM Load Figure 44. Startup, No Load Figure 45. Startup, 22 Load © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 12 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator 3.3 VOUT Typical Characteristics Circuit Description PFM Mode The FAN4860 is a synchronous boost regulator, typically operating at 3 MHz in Continuous Conduction Mode (CCM), which occurs at moderate to heavy load current and low VIN voltages. If VOUT > VREF when the minimum off-time has ended, the regulator enters PFM Mode. Boost pulses are inhibited until VOUT < VREF. The minimum on-time is increased to enable the output to pump up sufficiently with each PFM boost pulse. Therefore, the regulator behaves like a constant ontime regulator, with the bottom of its output voltage ripple at 5.05 V in PFM Mode. At light-load currents, the converter switches automatically to power-saving PFM Mode. The regulator automatically and smoothly transitions between quasi-fixed-frequency continuous conduction PWM Mode and variable-frequency PFM Mode to maintain the highest possible efficiency over the full range of load current and input voltage. Table 1. Mode PWM Mode Regulation The FAN4860 uses a minimum on-time and computed minimum off-time to regulate VOUT. The regulator achieves excellent transient response by employing current mode modulation. This technique causes the regulator output to exhibit a load line. During PWM Mode, the output voltage drops slightly as the input current rises. With a constant VIN, this appears as a constant output resistance. Invoked When: LIN Linear Startup VIN > VOUT SS Boost Soft-Start VOUT < VREG BST Boost Operating Mode VOUT=VREG If EN is LOW, all bias circuits are off and the regulator is in Shutdown Mode. During shutdown, true load disconnect between battery and load prevents current flow from VIN to VOUT, as well as reverse flow from VOUT to VIN. LIN State When EN rises, if VIN > UVLO, the regulator first attempts to bring VOUT within about 1V of VIN by using the internal fixed current source from VIN (ILIN1). The current is limited to about 630 mA during LIN1 Mode. 700 3.3 Vout Output Resistance (m) Description Shutdown and Startup The “droop” caused by the output resistance when a load is applied allows the regulator to respond smoothly to load transients with negligible overshoot. 5.0 Vout 600 Operating States If VOUT reaches VIN-1V during LIN1 Mode, the SS state is initiated. Otherwise, LIN1 times out after 16 clock counts and the LIN2 Mode is entered. 500 In LIN2 Mode, the current source is incremented to 850 mA. If VOUT fails to reach VIN-1 V after 64 clock counts, a fault condition is declared. 400 300 SS State 200 Upon the successful completion of the LIN state (VOUT>VIN1 V), the regulator begins switching with boost pulses current limited to about 50% of nominal level, incrementing to full scale over a period of 32 clock counts. 100 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Input Voltage (V) Figure 46. Output Resistance (ROUT) If the output fails to achieve 90% of its set point within 96 clock counts at full-scale current limit, a fault condition is declared. When the regulator is in PWM CCM Mode and the target VOUT = 5.05 V, VOUT is a function of ILOAD and can be computed as: VOUT 5.05 R OUT ILOAD BST State This is the normal operating mode of the regulator. The regulator uses a minimum tOFF-minimum tON modulation (1) VIN scheme. Minimum tOFF is proportional to VOUT , which keeps the regulator’s switching frequency reasonably constant in CCM. tON(MIN) is proportional to VIN and is higher if the inductor current reaches 0 before tOFF(MIN) during the prior cycle. For example, at VIN=3.3 V, and ILOAD=200 mA, VOUT drops to: VOUT 5.05 0.38 0.2 4.974 V (1A) To ensure that VOUT does not pump significantly above the regulation point, the boost switch remains off as long as FB > VREF. At VIN=2.3 V, and ILOAD=200 mA, VOUT drops to: VOUT 5.05 0.68 0.2 4.914 V © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 (1B) www.fairchildsemi.com 13 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Functional Description The regulator enters the FAULT state under any of the following conditions: VOUT fails to achieve the voltage required to advance from LIN state to SS state. VOUT fails to achieve the voltage required to advance from SS state to BST state. Sustained (32 CLK counts) pulse-by-pulse current limit during the BST state. The regulator moves from BST to LIN state due to a short circuit or output overload (VOUT < VIN-1 V). Once a fault is triggered, the regulator stops switching and presents a high-impedance path between VIN and VOUT. After waiting 480 CLK counts, a restart is attempted. Figure 49. LIN Mode Current vs. VIN Soft-Start and Fault Timing The soft-start timing for each state, and the fault times, are determined by the fault clock, whose period is inversely proportional to VIN. This allows the regulator more time to charge larger values of COUT when VIN is lower. With higher VIN, this also reduces power delivered to VOUT during each cycle in current limit. Over-Temperature Protection (OTP) The number of clock counts for each state is illustrated in Figure 47. Over-Current Protection (OCP) The regulator shuts down when the thermal shutdown threshold is reached. Restart, with soft-start, occurs when the IC has cooled by about 30°C. During Boost Mode, the FAN4860 employs a cycle-by-cycle peak current limit to protect switching elements. Sustained current limit, for 32 consecutive fault clock counts, initiates a fault condition. During an overload condition, as VOUT collapses to approximately VIN-1 V, the synchronous rectifier is immediately switched off and a fault condition is declared. Automatic restart occurs once the overload/short is removed and the fault timer completes counting. Figure 47. Fault Response into Short Circuit The fault clock period as a function of VIN is shown in Figure 48. Figure 48. Fault Clock Period vs. VIN © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 14 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator The VIN-dependent LIN Mode charging current is illustrated in Figure 49. Fault State CEFF varies with manufacturer, dielectric material, case size, and temperature. Some manufacturers may be able to provide an X5R capacitor in 0402 case size that retains CEFF >1.5 F with 5V bias; others may not. If this CEFF cannot be economically obtained and 0402 case size is required, the IC can work with the 0402 capacitor as long as the minimum VIN is restricted to >2.7 V. For best performance, a 10 V-rated 0603 output capacitor is recommended (Kemet C0603C475K8PAC, or equivalent). Since it retains greater CEFF under bias and over temperature, output ripple can is reduced and transient capability enhanced. External Component Selection Table 2 shows the recommended external components for the FAN4860: Table 2. External Components REF Description Manufacturer L1 1.0 µH, 0.8 A, 190 m, 0805 Murata LQM21PN1R0MC0, or equivalent CIN 2.2 µF, 6.3 V, X5R, 0402 Murata GRM155R60J225M COUT 4.7 µF, 10 V, X5R, 0603(4) Kemet C0603C475K8PAC TDK C1005X5R0J225M Output Voltage Ripple TDK C1608X5R1A475K Output voltage ripple is inversely proportional to COUT. During tON, when the boost switch is on, all load current is supplied by COUT. Note: 4. A 6.3 V-rated 0603 capacitor may be used for COUT, such as Murata GRM188R60J225M. All datasheet parameters are valid with the 6.3 V-rated capacitor. Due to DC bias effects, the 10 V capacitor offers a performance enhancement; particularly output ripple and transient response, without any size increase. VRIPPLE(P P) t ON ILOAD COUT (2) and Output Capacitance (COUT) Stability The effective capacitance (CEFF) of small, high-value, ceramic capacitors decrease as their bias voltage increases, as shown in Figure 50. V t ON t SW D t SW 1 IN V OUT Therefore: V VRIPPLE (P P ) t SW 1 IN VOUT ILOAD C OUT (3) (4) where: t SW 1 fSW (5) As can be seen from Equation 4, the maximum VRIPPLE occurs when VIN is minimum and ILOAD is maximum. Startup Input current limiting is in effect during soft-start, which limits the current available to charge COUT. If the output fails to achieve regulation within the time period described in the soft-start section above; a FAULT occurs, causing the circuit to shut down, then restart after a significant time period. If COUT is a very high value, the circuit may not start on the first attempt, but eventually achieves regulation if no load is present. If a high-current load and high capacitance are both present during soft-start, the circuit may fail to achieve regulation and continually attempt soft-start, only to have COUT discharged by the load when in the FAULT state. The circuit can start with higher values of COUT under full load if VIN is higher, since: Figure 50. CEFF for 4.7 F, 0603, X5R, 6.3 V (Murata GRM188R60J475K) FAN4860 is guaranteed for stable operation with the minimum value of CEFF (CEFF(MIN)) outlined in Table 3. Table 3. I V IOUT ILIM(PK ) RIPPLE IN 2 VOUT Minimum CEFF Required for Stability Operating Conditions CEFF(MIN) (F) VIN (V) ILOAD (mA) 2.3 to 4.5 0 to 200 1.5 2.7 to 4.5 0 to 200 1.0 2.3 to 4.5 0 to 150 1.0 © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 (6) Generally, the limitation occurs in BST Mode. www.fairchildsemi.com 15 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Application Information Table 4. Layout Guideline Maximum CEFF for First-Pass Startup Operating Conditions VIN (V) CEFF(MAX) (F) RLOAD(MIN) (Ω) 5.4 VOUT 5.0 VOUT 3.3 VOUT > 2.3 27 25 16 10 > 2.7 27 25 16 15 > 2.7 37 33 20 22 CEFF values shown in Table 4 typically apply to the lowest VIN. The presence of higher VIN enhances ability to start into larger CEFF at full load. Transient Protection Figure 52. WLCSP Suggested Layout (Top View) TVS To protect against external voltage transients caused by ESD discharge events, or improper external connections, some applications employ an external transient voltage suppressor (TVS) and Schottky diode (D1 in Figure 51). Figure 51. FAN4860 with External Transient Protection The TVS is designed to clamp the FB line (system VOUT) to +10 V or –2 V during external transient events. The Schottky diode protects the output devices from the positive excursion. The FB pin can tolerate up to 14 V of positive excursion, while both the FB and VOUT pins can tolerate negative voltages. Figure 53. UMLP Suggested Layout (Top View) The FAN4860 includes a circuit to detect a missing or defective D1 by comparing VOUT to FB. If VOUT – FB > about 0.7 V, the IC shuts down. The IC remains shut down until VOUT < UVLO and VIN < UVLO+0.7 or EN is toggled. COUT2 may be necessary to preserve load transient response when the Schottky is used. When a load is applied at the FB pin, the forward voltage of the D1 rapidly increases before the regulator can respond or the inductor current can change. This causes an immediate drop of up to 300 mV, depending on D1’s characteristics if COUT2 is absent. COUT2 supplies instantaneous current to the load while the regulator adjusts the inductor current. A value of at least half of the minimum value of COUT should be used for COUT2. COUT2 needs to withstand the maximum voltage at the FB pin as the TVS is clamping. The maximum DC output current available is reduced with this circuit, due to the additional dissipation of D1. © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 16 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator The FAN4860 starts on the first pass (without triggering a FAULT) under the following conditions for CEFF(MAX): FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Physical Dimensions 0.03 C F E 2X A B BALL A1 INDEX AREA 0.40 A1 D (Ø0.20) Cu Pad 0.40 F (Ø0.30) Solder Mask Opening 0.03 C 2X TOP VIEW RECOMMENDED LAND PATTERN (NSMD PAD TYPE) 0.06 C 0.625 0.547 0.05 C 0.378±0.018 0.208±0.021 E SEATING PLANE C D SIDE VIEWS Ø0.260±0.010 6X 0.40 0.005 C A B A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C B A 0.40 NOTES: C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M, 1994. (Y) +/-0.018 D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. F 1 2 (X) +/-0.018 E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS ±39 MICRONS (547-625 MICRONS). BOTTOM VIEW F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILENAME: UC006ACrev4. Figure 54. 6-Lead, 0.4 mm Pitch, WLCSP Package Product-Specific Dimensions Product FAN4860UC5X FAN4860UC33X D E X Y 1.230mm ±0.030 mm 0.880 mm ±0.030 mm 0.240 mm 0.215 mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/UC/UC006AC.pdf. © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 17 0.10 C A 2.0 2X B 1.45 2.0 PIN1 IDENT (0.25) 0.10 C 0.80 1.80 2X 6X 0.50 TOP VIEW 6X 0.35 0.55 MAX 0.65 A 0.10 C RECOMMENDED LAND PATTERN (0.15) 0.08 C 0.05 0.00 C SEATING PLANE SIDE VIEW NOTES: A. PACKAGE CONFORMS TO JEDEC MO-229 EXCEPT WHERE NOTED. 1.35 1.45 PIN1 IDENT 1 3 B. DIMENSIONS ARE IN MILLIMETERS. 6X 0.35 0.25 0.10 C A B 0.05 C C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 0.70 0.80 6 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP06Erev2. 4 0.65 0.35 6X 0.25 BOTTOM VIEW Figure 55. 6-Lead, UMLP Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/UM/UMLP06E.pdf. © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 18 FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator Physical Dimensions FAN4860 — 3MHz, Synchronous TinyBoost™ Regulator © 2010 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.1.1 www.fairchildsemi.com 19