VIB0010TFJ PRELIMINARY DATASHEET S C NRTL US BCM DC to DC Bus Converter Module TM FEATURES DESCRIPTION The V•I Chip Bus Converter Module is a high efficiency (>95%) Sine Amplitude Converter (SAC)TM operating from a 330 to 365 Vdc primary bus to deliver an isolated 11.79 – 13.04 V nominal, unregulated secondary. The SAC offers a low AC impedance beyond the bandwidth of most downstream regulators, meaning that input capacitance normally located at the input of a regulator can be located at the input to the SAC. Since the K factor of the VIB0010TFJ is 1/28, that capacitance value can be reduced by a factor of 784x, resulting in savings of board area, materials and total system cost. • 352 Vdc – 12.5 Vdc 300 W Bus Converter Module • High efficiency (>95%) reduces system power consumption • High power density (>1000 W/in3) reduces power system footprint by >40% • “Full Chip” V•I Chip package enables surface mount, low impedance interconnect to system board • Contains built-in protection features: undervoltage, overvoltage lockout, overcurrent protection, short circuit protection, overtemperature protection. • Provides enable/disable control, internal temperature monitoring • ZVS/ZCS Resonant Sine Amplitude Converter topology • Can be paralleled to create multi-kW arrays The VIB0010TFJ is provided in a V•I Chip package compatible with standard pick-and-place and surface mount assembly processes. The V•I Chip package provides flexible thermal management through its low junction-to-case and junction-toboard thermal resistance. With high conversion efficiency the VIB0010TFJ increases overall system efficiency and lowers operating costs compared to conventional approaches. TYPICAL APPLICATIONS VIN = 330 – 365 V POUT = 300 W(NOM) • High End Computing Systems • Automated Test Equipment • High Density Power Supplies • • VOUT = 11.79 – 13.04 V (NO LOAD) K = 1/28 TYPICAL APPLICATION PC TM enable / disable switch POL POL BCM SW1 F1 +In VIN C1 POL +Out VOUT 1 µF -In POL (8) -Out V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 1 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET ABSOLUTE MAXIMUM RATINGS CONTROL PIN SPECIFICATIONS +IN to –IN . . . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc – +400 Vdc PC to –IN . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +20 Vdc TM to –IN . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +7 Vdc +IN/-IN to +OUT/-OUT . . . . . . . . . . . . . . . . . . . 4242 V (Hi Pot) +IN/-IN to +OUT/-OUT . . . . . . . . . . . . . . . . . . . 500 V (working) +OUT to –OUT . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc - +16 Vdc Temperature during reflow . . . . . . . . . . . . . . . . . 225°C (MSL5) See section 5.0 for further application details and guidelines. PC (V•I Chip BCM Primary Control) The PC pin can enable and disable the BCM. When held below VPC_DIS the BCM shall be disabled. When allowed to float with an impedance to –IN of greater than 50 kΩ the module will start. When connected to another BCM PC pin, the BCMs will start simultaneously when enabled. The PC pin is capable of being driven high by an either external logic signal or internal pull up to 5 V (operating). PACKAGE ORDERING INFORMATION 4 3 2 +Out B B C C D D +In E E -Out 1 A A F G H TM (V•I Chip BCM Temperature Monitor) The TM pin monitors the internal temperature of the BCM within an accuracy of +5/-5°C. It has a room temperature setpoint of ~3.0 V and an approximate gain of 10 mV/°C. It can source up to 100 µA and may also be used as a “Power Good” flag to verify that the BCM is operating. TM H J RSV J K PC K +Out -Out L L M M N N P P R R -In T T Bottom View Signal Name +In –In TM RSV PC +Out –Out Designation A1-E1, A2-E2 L1-T1, L2-T2 H1, H2 J1, J2 K1, K2 A3-D3, A4-D4, J3-M3, J4-M4 E3-H3, E4-H4, N3-T3, N4-T4 PART NUMBER DESCRIPTION VIB0010TFJ -40°C – 125°C TJ, J lead V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 2 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 1.0 ELECTRICAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted ATTRIBUTE SYMBOL Voltage range dV/dt Quiescent power VIN dVIN /dt PQ No load power dissipation PNL Inrush Current Peak IINR_P DC Input Current IIN_DC K Factor ( ) VOUT CONDITIONS / NOTES MIN TYP MAX UNIT 330 352 365 1 370 10 15 Vdc V/µs mW 4.5 A 1 A 300 282 W 450 W 13.04 26 V A PC connected to -IN VIN = 352 V VIN = 330 to 365 V VIN = 365 V COUT = 1000 µF, POUT = 300 W POUT = 300 W 230 7.1 2 K VIN 1/28 Efficiency (Ambient) η Efficiency (Hot) Minimum Efficiency (Over Load Range) Output Resistance (Ambient) Output Resistance (Hot) Output Resistance (Cold) Load Capacitance Switching Frequency Ripple Frequency η VIN = 352 VDC; See Figure 14 VIN = 330 – 365 VDC; See Figure 14 VIN = 352 VDC Average POUT < = 300 W, Tpeak < 10 ms Section 3.0 No load Pout < = 300 W VIN = 352 V, POUT = 300 W VIN = 330 V to 365 V, POUT = 300 W VIN = 352 V, TJ = 100° C,POUT = 300 W η 60 W < POUT < 300 W Max 90 ROUT ROUT ROUT COUT FSW FSW_RP TJ = 25° C TJ = 125° C TJ = -40° C 10 14 7 12.5 16.5 10 2.13 4.26 Output Voltage Ripple VOUT_PP Output Power (Average) POUT Output Power (Peak) POUT_P Output Voltage Output Current (Average) VOUT IOUT VIN to VOUT (Application of VIN) TON1 PC PC Voltage (Operating) PC Voltage (Enable) PC Voltage (Disable) PC Source Current (Startup) PC Source Current (Operating) PC Internal Resistance PC Capacitance (Internal) PC Capacitance (External) External PC Resistance PC External Toggle Rate VPC VPC_EN VPC_DIS IPC_EN IPC_OP RPC_SNK CPC_INT CPC_EXT RPC FPC_TOG PC to VOUT with PC Released PC to VOUT, Disable PC Ton2 TPC_DIS W COUT = 0 µF, POUT = 300 W, VIN = 352 V, Section 8.0 VIN = 352 V, CPC = 0; See Figure 16 Internal pull down resistor Section 5.0 External capacitance delays PC enable time Connected to –VIN VIN = 352 V, Pre-applied CPC = 0, COUT = 0; See Figure 16 VIN = 352 V, Pre-applied CPC = 0, COUT = 0; See Figure 16 11.79 94.2 94 93.3 95.3 % 94.6 % % 2.25 4.5 18 25 14 1000 2.37 4.74 mΩ mΩ mΩ uF MHz MHz 200 400 mV 460 390 620 ms 4.7 2 5 2.5 50 2 50 100 3.5 150 5.3 3 <2 300 5 400 1000 1000 1 V V V uA mA kΩ pF pF kΩ Hz 100 150 µs 4 10 µs 50 50 V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 3 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 1.0 ELECTRICAL CHARACTERISTICS (CONT.) Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted ATTRIBUTE SYMBOL TM TM accuracy TM Gain TM Source Current TM Internal Resistance External TM Capacitance TM Voltage Ripple CONDITIONS / NOTES ACTM ATM ITM RTM_SNK CTM VTM_PP PROTECTION Negative going OVLO Positive going OVLO Negative going UVLO Positive going UVLO Output Overcurrent Trip Short Circuit Protection Trip Current Short Circuit Protection Response Time Thermal Shutdown Junction setpoint VIN_OVLOVIN_OVLO+ VIN_UVLOVIN_UVLO+ IOCP MIN TYP -5 +5 ºC mV/°C uA kΩ pF mV V V V V A 100 25 40 CTM = 0µF, VIN = 365 V, POUT = 300 W 50 100 50 50 200 VIN = 352 V, 25°C 366 380 270 295 32 383 387 295 310 42 390 400 325 325 52 60 A 1.2 us 130 135 °C 660 500 800 TSCP Agency Approvals/Standards UNIT 10 ISCP GENERAL SPECIFICATION Isolation Voltage (Hi-Pot) Working Voltage (IN – OUT) Isolation Capacitance Isolation Resistance MTBF MAX TJ_OTP 125 VHIPOT VWORKING CIN_OUT RIN_OUT 4242 Unpowered unit MIL HDBK 217F, 25° C, GB cTUVus CE Mark ROHS 6 of 6 500 10 4.2 V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 V V pF MΩ Mhrs Rev. 1.1 9/2009 Page 4 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 1.1 APPLICATION CHARACTERISTICS All specifications are at TJ = 25ºC unless otherwise noted. See associated figures for general trend data. ATTRIBUTE No Load Power Inrush Current Peak Efficiency (Ambient) Efficiency (Hot – 100°C) Output Resistance (-40°C) Output Resistance (25°C) Output Resistance (100°C) Output Voltage Ripple SYMBOL PNL INR_P η η ROUT ROUT ROUT VOUT_PP VOUT Transient (Positive) VOUT_TRAN+ VOUT Transient (Negative) VOUT_TRAN- Undervoltage Lockout Response Time Constant Output Overcurrent Response Time Constant Overvoltage Lockout Response Time Constant TM Voltage (Ambient) CONDITIONS / NOTES TYP UNIT VIN = 352 V, PC enabled; See Figure 1 COUT = 1000 µF, POUT = 300 W VIN = 352 V, POUT = 300 W VIN = 352 V, POUT = 300 W VIN = 352 V VIN = 352 V VIN = 352 V COUT = 0 uF, POUT = 300 W @ VIN = 352, VIN = 352 V IOUT_STEP = 0 TO 25 A, ISLEW >10 A/us; See Figure 11 IOUT_STEP = 25 A to 0 A, ISLEW > 10 A/us; See Figure 12 7.1 2 95.3 94.6 10 12.5 16.5 W A % % mΩ mΩ mΩ 200 mV 380 mV 380 mV 60 µs 4.62 ms 47 µs 3 V TUVLO TOCP 32 < IOCP < 52 A TOVLO VTM_AMB TJ ≅ 27°C V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 5 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET Full Load Efficiency vs. Temperature 96.0 10 95.5 Efficiency (%) 8 6 4 2 95.0 94.5 94.0 93.5 0 93.0 330 335 340 345 350 355 360 -40 365 -20 -40 25 Efficiency & Power Dissipation -40°C Case 17 15 PD 13 74 11 70 9 66 62 10 15 20 352 365 25 17 η 94 92 15 90 13 88 PD 86 9 82 7 80 5 0 5 10 352 330 365 96 19 17 Efficiency (%) 17 90 15 88 13 86 11 PD 9 82 80 7 78 5 10 15 20 25 352 365 330 352 365 330 352 365 15 14 13 12 11 10 9 8 -40 30 -20 0 20 40 60 80 100 Temperature (°C) Output Load (A) 330 30 16 Rout (mΩ) η Power Dissipation (W) 18 5 25 Rout vs. Case Temperature 21 0 20 Figure 4 – Efficiency and power dissipation at 25°C (case); VIN Efficiency & Power Dissipation 100°C Case 84 15 Output Load (A) 330 98 92 11 84 30 Figure 3 – Efficiency and power dissipation at -40°C (case); VIN 94 365 19 Output Load (A) 330 352 78 7 5 100 96 Efficiency (%) Efficiency (%) 19 86 0 80 98 Power Dissipation (W) η 78 60 Efficiency & Power Dissipation 25°C Case 21 82 40 Figure 2 – Full load efficiency vs. temperature; VIN 98 90 20 330 100 Figure 1 – No load power dissipation vs. VIN; TCASE 94 0 Case Temperature (°C) Input Voltage (V) Power Dissipation (W) Power Dissipation (W) No Load Power Dissipation 12 352 Figure 5 – Efficiency and power dissipation at 100°C (case); VIN 365 2.6 A 26 A Figure 6 – ROUT vs. temperature vs. IOUT V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 6 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET Output Voltage Ripple at 25°C vs. Iout 250 Vripple (mV) 200 150 100 50 0 0 5 10 15 20 25 30 Iout(A) Peak To Peak Figure 7 – Vripple vs. IOUT ; 352 Vin, no external capacitance Figure 8 – PC to VOUT startup waveform Figure 9 – VIN to VOUT startup waveform Figure 10 – Output voltage and input current ripple, 352 Vin, 300 W no COUT Figure 11 – Positive load transient (0 – 25 A) Figure 12 – Negative load transient (25 A – 0 A) V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 7 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET Output Power (W) Safe Operating Area 500 450 400 350 300 250 200 150 100 50 0 11.40 11.90 12.40 12.90 Output Voltage (V) Steady State Figure 13 – PC disable waveform, 352 VIN, 1000 µF COUT full load 450 W 10 mS Figure 14 – Safe Operating Area vs. VOUT 2.0 PACKAGE/MECHANICAL SPECIFICATIONS All specifications are at TJ = 25ºC unless otherwise noted. See associated figures for general trend data. ATTRIBUTE SYMBOL L W H Vol F No Heatsink No Heatsink Power Density PD No Heatsink Weight W Operating Temperature Storage Temperature Thermal Capacity Peak Compressive Force Applied to Case (Z-axis) Moisture Sensitivity Level TJ TST TYP MAX UNIT 32.5 / 1.28 22.0 / 0.87 6.73 / 0.265 4.81 / 0.295 7.3 / 1.1 1017 62 0.5/14 32.6 / 1.29 22.3 / 0.89 6.98 / 0.275 mm/in mm/in mm/in cm3/in3 cm2/in2 W/in3 W/cm3 oz/g µm -40 -40 125 125 °C °C Ws/°C 6 lbs 9 No J-lead support ESDHBM ESDMM ESD Rating Peak Temperature During Reflow Peak Time Above 183°C Peak Heating Rate During Reflow Peak Cooling Rate Post Reflow Thermal Impedance [b] MIN 32.4 / 1.27 21.7 / 0.85 6.48 / 0.255 Nickel (0.51-2.03 µm) Palladium (0.02-0.15 µm) Gold (0.003-0.05 µm) Lead Finish [a] CONDITIONS / NOTES Length Width Height Volume Footprint ØJC MSL Level 5 Human Body Model[a] Machine Model[b] Min Board Heatsinking 5 5 1500 400 VDC 1.5 1.5 1.1 225 150 3 6 1.5 °C s °C/s °C/s °CW JEDEC JESD 22-A114C.01 JEDED JESD 22-A115-A V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 8 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 2.1 MECHANICAL DRAWING BOTTOM VIEW TOP VIEW ( COMPONENT SIDE ) NOTES: mm 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] 3. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com 2.2 RECOMMENDED LAND PATTERN RECOMMENDED LAND PATTERN ( COMPONENT SIDE SH OWN ) NOTES: mm 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] 3. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 9 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 3.0 POWER, VOLTAGE, EFFICIENCY RELATIONSHIPS Because of the high frequency, fully resonant SAC topology, power dissipation and overall conversion efficiency of BCM converters can be estimated as shown below. OUTPUT POWER INPUT POWER Key relationships to be considered are the following: 1. Transfer Function P R OUT a. No load condition P NL VOUT = VIN • K Eq. 1 Figure 15 – Power transfer diagram Where K (transformer turns ratio) is constant for each part number b. Loaded condition VOUT = Vin • K – IOUT • ROUT Eq. 2 2. Dissipated Power The two main terms of power losses in the BCM module are: - No load power dissipation (PNL) defined as the power used to power up the module with an enabled power train at no load. - Resistive loss (ROUT) refers to the power loss across the BCM modeled as pure resistive impedance. ~ PNL + PR PDISSIPATED ~ OUT Eq. 3 Therefore, with reference to the diagram shown in Figure 15 POUT = PIN – PDISSIPATED = PIN – PNL – PROUT Eq. 4 Notice that ROUT is temperature and input voltage dependent and PNL is temperature dependent (See Figure 15). The above relations can be combined to calculate the overall module efficiency: η = POUT PIN = PIN – PNL – PROUT PIN = VIN • IIN – PNL – (IOUT)2 • ROUT VIN • IIN =1– ( PNL + (IOUT)2 • ROUT VIN • IIN V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 ) Eq. 5 Rev. 1.1 9/2009 Page 10 of 16 v i c o r p o w e r. c o m v i c o r p o w e r. c o m NL 5V 2.5 V 5V 3V PC VUVLO+ VUVLO– V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 1 A E: TON2 F: TOCP G: TPC–DIS H: TSSP** B D 1: Controller start 2: Controller turn off 3: PC release C *Min value switching off **From detection of error to power train shutdown A: TON1 B: TOVLO* C: Max recovery time D:TUVLO 0.4 V 3 V @ 27°C TM LL • K Vout C 500mS before retrial 3V VIN VOVLO+ VOVLO– 2 F 4: PC pulled low 5: PC released on output SC 6: SC removed IOCP ISSP IOUT E 3 G 4 Notes: H 5 – Timing and voltage is not to scale – Error pulse width is load dependent 6 VIB0010TFJ PRELIMINARY DATASHEET 4.0 OPERATING Figure 16 – Timing diagram Rev. 1.1 9/2009 Page 11 of 16 VIB0010TFJ 5.0 USING THE CONTROL SIGNALS TM AND PC The PC control pin can be used to accomplish the following functions: • Delayed start: At start-up, PC pin will source a constant 100 uA current to the internal RC network. Adding an external capacitor will allow further delay in reaching the 2.5 V threshold for module start. • Synchronized start up: In a parallel module array, PC pins shall be connected in order to ensure synchronous start of all the units. While every controller has a calibrated 2.5 V reference on PC comparator, many factors might cause different timing in turning on the 100 uA current source on each module, i.e.: – Different VIN slew rate – Statistical component value distribution By connecting all PC pins, the charging transient will be shared and all the modules will be enabled synchronously. • Auxiliary voltage source: Once enabled in regular operational conditions (no fault), each BCM PC provides a regulated 5 V, 2 mA voltage source. • Output Disable: PC pin can be actively pulled down in order to disable module operations. Pull down impedance shall be lower than 400 Ω and toggle rate lower than 1 Hz. • Fault detection flag: The PC 5 V voltage source is internally turned off as soon as a fault is detected. After a minimum disable time, the module tries to re-start, and PC voltage is re-enabled. For system monitoring purposes (microcontroller interface) faults are detected on falling edges of PC signal. It is important to notice that PC doesn’t have current sink capability (only 150 kΩ typical pull down is present), therefore, in an array, PC line will not be capable of disabling all the modules if a fault occurs on one of them. PRELIMINARY DATASHEET 6.0 FUSE SELECTION V•I Chips are not internally fused in order to provide flexibility in configuring power systems. Input line fusing of V•I Chips is recommended at system level, in order to provide thermal protection in case of catastrophic failure. The fuse shall be selected by closely matching system requirements with the following characteristics: • Current rating (usually greater than maximum BCM current) • Maximum voltage rating (usually greater than the maximum possible input voltage) • Ambient temperature • Nominal melting I2t • Recommended fuse: ≤2.5 A Bussmann PC-Tron or SOC type 36CFA. The temperature monitor (TM) pin provides a voltage proportional to the absolute temperature of the converter control IC. It can be used to accomplish the following functions: • Monitor the control IC temperature: The temperature in Kelvin is equal to the voltage on the TM pin scaled by x100. (i.e. 3.0 V = 300 K = 27ºC). It is important to remember that V•I chips are multi-chip modules, whose temperature distribution greatly vary for each part number as well with input/output conditions, thermal management and environmental conditions. Therefore, TM cannot be used to thermally protect the system. • Fault detection flag: The TM voltage source is internally turned off as soon as a fault is detected. After a minimum disable time, the module tries to re-start, and TM voltage is re-enabled. V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 12 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 7.0 CURRENT SHARING The SAC topology bases its performance on efficient transfer of energy through a transformer, without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with some resistive drop and positive temperature coefficient. This type of characteristic is close to the impedance characteristic of a DC power distribution system, both in behavior (AC dynamic) and absolute value (DC dynamic). When connected in an array (with same K factor), the BCM module will inherently share the load current with parallel units, according to the equivalent impedance divider that the system implements from the power source to the point of load. It is important to notice that, when successfully started, BCMs are capable of bidirectional operations (reverse power transfer is enabled if the BCM input falls within its operating range and the BCM is otherwise enabled). In parallel arrays, because of the resistive behavior, circulating currents are never experienced (energy conservation law). General recommendations to achieve matched array impedances are (see also AN016 for further details): • to dedicate common copper planes within the PCB to deliver and return the current to the modules • to make the PCB layout as symmetric as possible • to apply same input/output filters (if present) to each unit Figure 17 – BCM Array V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 13 of 16 v i c o r p o w e r. c o m VIB0010TFJ PRELIMINARY DATASHEET 8.0 INPUT AND OUTPUT FILTER DESIGN A major advantage of SAC systems versus conventional PWM converters is that the transformers do not require large functional filters. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current, and efficiently transfers charge through the isolation transformer. A small amount of capacitance, embedded in the input and output stages of the module, is sufficient for full functionality and is key to achieve power density. This paradigm shift requires system design to carefully evaluate external filters in order to: 1.Guarantee low source impedance: To take full advantage of the BCM dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5 MHz. The connection of the V•I Chip to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100 nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200 nH, the RC damper may be as high as 1 µF in series with 0.3 Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. Total load capacitance at the output of the BCM shall not exceed the specified maximum. Owing to the wide bandwidth and low output impedance of the BCM, low frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the input of the BCM. At frequencies <500 kHz the BCM appears as an impedance of ROUT between the source and load. Within this frequency range capacitance at the input appears as effective capacitance on the output per the relationship defined in Eq. 5. COUT = CIN K2 Eq. 6 This enables a reduction in the size and number of capacitors used in a typical system. 2.Further reduce input and/or output voltage ripple without sacrificing dynamic response: Given the wide bandwidth of the BCM, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the BCM multiplied by its K factor. This is illustrated in Figures 11 and 12. 3.Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures: The V•I Chip input/output voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating input range. Even during this condition, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. A criterion for protection is the maximum amount of energy that the input or output switches can tolerate if avalanched. V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 14 of 16 v i c o r p o w e r. c o m v i c o r p o w e r. c o m PC -VIN +VIN 1000 pF 2.5 V 100 µA 2.5 V 150 K 1.5 k PC Pull-Up & Source 18.5 V 2 mA 5V 320/540 ms One shot delay Wake-Up Power and Logic Adaptive Soft Start UVLO OVLO VIN Gate Drive Supply Start up & Fault Logic Enable Modulator Primary Current Sensing Primary Gate Drive Lr Cr C4 C3 Cr 2.50 V CS2 Q4 Q3 Q2 Q1 Over Temperature Protection Lr Primary Stage & C2 Resonant Tank C1 Lp2 Vref Secondary Gate Drive Over-Current Protection Temperature dependent voltage source Slow current limit Fast current limit Ls2 Ls1 Power Transformer Vref (125ºC) Lp1 Q5 Synchronous Rectification 40 K Q6 TM COUT -VOUT +VOUT VIB0010TFJ PRELIMINARY DATASHEET Figure 18 – BCM block diagram V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 15 of 16 VIB0010TFJ PRELIMINARY DATASHEET Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,166,898; 7,187,263; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965 Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: [email protected] Technical Support: [email protected] V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.1 9/2009 Page 16 of 16 v i c o r p o w e r. c o m