® RT9451 Switch-Mode Single Cell Li-ion Battery Charger with USB OTG General Description The RT9451 integrates a high efficiency USB friendly switch mode charger with On-The-Go (OTG) support for single cell Li-ion and Li-polymer batteries, D+D− detection, and a 50mA LDO regulator into a single chip. In OTG mode, the PWM controller boosts the battery voltage to 5V and provides up to 1.6A of current to the USB output. At very light load, the Boost operates in burst mode to optimize efficiency. OTG mode can be enabled either through I2C interface or GPIO control. The charger features a synchronous 375kHz PWM controller with integrated power MOSFETs, input current sensing and regulation, Minimum Input Voltage Regulation (MIVR), high accuracy charge current and voltage regulation, and charge termination. It charges the battery in three phases : low current pre-charge, constant current fast charge, and constant voltage trickle charge. The input current is automatically limited to the value set by the host. The charger can be configured to terminate charge based on user-selectable minimum current level and automatically restart the charge cycle if the battery voltage falls below the recharge threshold. A safety timer with reset control provides a safety backup for I2C interface. Applications z z z Mobile Phones and Smart Phones MP3 Players Handheld Devices Ordering Information RT9451 Package Type QW : WQFN-32L 4x4 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Note : The charger automatically enters sleep mode or high impedance mode when the input supply is removed. The charge status is reported to the host using the I2C interface and the STAT pin. The D+D− detection circuit allows automatic detection of a USB wall charger. If a wall charger is detected, the input current limit will automatically increase from 500mA to 975mA. Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Simplified Application Circuit RT9451 MID VIN VIN CIN Control Inputs CMID SCL L LX SDA CSYSS VIO USB Charger Detection + Battery DP BATS DM GND Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9451 z z z z z z z z z z z z z z z z z z z z z Integrated Switching Charger and 50mA LDO in a Single Package Charges Faster Than Linear Chargers High Accuracy Voltage and Current Regulation ` Charge Voltage Regulation Accuracy : ±1% ` Charge Current Regulation Accuracy : ±5% Minimum Input Voltage Regulation : 4.2V to 4.76V with Step of 80mV Bad Adaptor Detection and Rejection Safety Limit Register for Maximum Charge Voltage and Current Limiting High Efficiency Mini-USB/AC Battery Charger for Single Cell Li-Ion and Li-Polymer Battery Packs 28V Absolute Maximum Input Voltage Rating 12V Maximum Operating Input Voltage Built-In Input Current Sensing and Limiting Integrated Power FETs for Up to 4A Charge Rate Programmable Charge Parameters through I 2C Interface (up to 400 Kbps) : ` Input Current ` Fast Charge/Termination Current ` Charge Voltage (3.5V to 4.44V) ` Safety Timer ` Termination Enable Synchronous Fixed Frequency PWM Controller Operating at 375kHz With 0% to 99% Duty Cycle Automatic High Impedance Mode for Low Power Consumption Safety Timer with Reset Control Thermal Regulation and Protection Input/Output Over-Voltage Protections Status Output for Charging and Faults USB Friendly Boot-Up Sequence Automatic Charging Boost Mode Operation for USB OTG ` Input Voltage Range (BATS) : 2.5V to 4.5V ` Output Voltage for VIN : 4.425V to 5.506V RoHS Compliant and Halogen Free Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 0Q= : Product Code 0Q=YM DNN YMDNN : Date Code Pin Configurations (TOP VIEW) MID MID LX LX LX LX LX PGND z Marking Information 32 31 30 29 28 27 26 25 VIN VIN VIN VIN INT VIO DP DM 1 24 2 23 3 4 5 6 22 21 GND 20 33 7 19 18 8 17 PGND PGND PGND PGND GND VDDP BOOT MID_LDO 9 10 11 12 13 14 15 16 SCL SDA STAT OTG BATS ISENL ISENR LDO Features WQFN-32L 4x4 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Functional Pin Description Pin No. Pin Name Pin Function 1 to 4 VIN Power Input. Bypass to PGND with a 10μF ceramic capacitor. It also provides power to the load in boost mode. 5 INT Interrupt Pin (Open-Drain). This pin is pulled low when a fault occurs. 6 VIO I/O Reference Voltage. A VIO level above 0.6V disables automatic D+/D− detection. 7 DP USB Port D+ Input Connection. 8 DM USB Port D− Input Connection. 9 SCL I C Interface Clock Input. Open-drain output, connect a 10kΩ pull-up resistor. 10 SDA I C Interface Data Input. Open-drain output, connect a 10kΩ pull-up resistor. 11 STAT Charge Status Indicator. Pull low when charge is in progress. Open-drain for 2 other conditions. This pin can also be controlled through I C register. The STAT can be used to drive a LED or communicate with a host processor. 12 OTG Boost Mode Enable Control. Boost mode is turned on whenever this pin is active. 2 Polarity is user defined through I C register. The pin is disabled by default and 2 can be enabled through I C register bit. 13 BATS Auxiliary Power Supply. Connect to the battery pack to provide power in high impedance mode. Bypass to GND with a 1μF ceramic capacitor. 14 ISENL Charge Current Sense Input. Battery current is sensed via the voltage drop across an external sense resistor. A 0.1μF ceramic capacitor to PGND is required. 15 ISENR Battery Voltage and Current Sense Input. Bypass to PGND with a ceramic capacitor (minimum 0.1μF) if there are long inductive leads to battery. 16 LDO LDO Output. LDO is regulated to 4.9V and drives 60mA of current. Bypass LDO to GND with a minimum 1μF ceramic capacitor. LDO is enabled when VIN is above the VIN UVLO threshold. 17 MID_LDO LDO Input Voltage. Please connect to MID. 18 BOOT 19 VDDP 20, 33 (Exposed Pad) GND Pure Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum thermal dissipation. 21 to 25 PGND Power Ground. 26 to 30 LX Switch Node. 31, 32 MID Connection Point Between Reverse Blocking MOSFET and High-Side MOSFET. Bypass to PGND with a minimum of 10μF capacitor. No other circuits are recommended to connect at MID pin. 2 2 Bootstrap Supply for High-Side Gate Driver. Connect a 100nF ceramic capacitor (voltage rating above 10V) from BOOT pin to LX pin. Internal Bias Regulator Voltage for Driver. Connect a 1μF ceramic capacitor from this output to PGND. External loads on VDDP is not allowed. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9451 Function Block Diagram VIN MID_LDO LDO VDDP LDO MID VREF BASE IBIAS VIO DP LX D+/DDetection Switching Charger DM STAT PGND BOOT Protection ISENL ISENR BATS INT Logic 2 I C Interface SCL SDA GND OTG OSC Operation Base Circuits pulled low and pulled high when the charger is under abnormal condition or charge done. The INT pin indicates the fault condition. When any fault occurs, the INT is pulled low. Base circuits provide the internal power, VDD and reference voltage and bias current. LDO The RT9451 is designed for single cell Li-Ion battery charger in portable applications. Protection Circuits The protection circuits include the OVP, UVLO and OTP circuits. The protection circuits turn off the charging when the input power or die temperature is in abnormal level. Switching Charger The switching charger controls the operation during the charging process. The controller will make sure the battery is well charged in a suitable current, voltage, and die temperature. The RT9451 provides a 50mA LDO to support the peripheral circuits. The output voltage is regulated to 4.9V and the maximum output current is 120mA. OSC The oscillator runs at fixed 375kHz frequency for the PWM control of switching charger. I2C Interface The I2C interface is used to program battery voltage, charge current, termination current, MIVR level, and OTG voltage. Logic Circuits D+/D− − Detection The STAT and INT indicate the charger and interrupt condition. During the charging process, the STAT pin is The D+/D− detection can detect the devices which are inserted to the USB connector. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Absolute Maximum Ratings z z z z z z z z z z z z (Note 1) Supply Voltage VIN -------------------------------------------------------------------------------------------------------MID, BOOT to PGND -----------------------------------------------------------------------------------------------------Other Pins -------------------------------------------------------------------------------------------------------------------VISENL to VISENR -----------------------------------------------------------------------------------------------------------Output Current (average) LX --------------------------------------------------------------------------------------------Output Current (continuous) LDO -------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C −0.3V to 28V −0.3V to 28V −0.3V to 6V ±6V 4A 100mA WQFN-32L 4x4 ------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WQFN-32L 4x4, θJA -------------------------------------------------------------------------------------------------------WQFN-32L 4x4, θJC ------------------------------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ----------------------------------------------------------------------------------------------MM (Machine Model) ------------------------------------------------------------------------------------------------------ 3.59W Recommended Operating Conditions z z z 27.8°C/W 7°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage Range, VIN --------------------------------------------------------------------------------------- 4.3V to 12V Junction Temperature Range --------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range --------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VBATS = 3.6V ± 5%, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit High Impedance Mode, SDA = SCL = 0 -- 2 30 μA Charger PWM ON -- 10000 -- Charger PWM OFF -- -- 5000 Input Currents Battery Discharge Current in High Impedance Mode (ISENL, ISENR, LX, BATS Pins) IDISCHARGE VBATS = 4.2 V VIN Supply Current IQ VIN > VIN(MIN) μA Voltage Regulation Output Charge Voltage VOREG Operating in voltage regulation, programmable 3.5 -- 4.44 V Voltage Regulation Accuracy 0 to 85°C −1 -- 1 % Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9451 Parameter Symbol Test Conditions Min Typ Max 1000 -- 4000 Unit Current Regulation Fast Charge Output Charge Current ICHRG VSHORT ≤ VBATS < VOREG VIN > 5V, RSENSE = 20mΩ, LOW_CHG = 0, Programmable mA VBATS < VOREG , VIN > 5V, RSENSE = 20mΩ, LOW_CHG = 1 -- 150 -- VBATS > VOREG − VRECH, V IN > 5V, RSENSE = 20mΩ, Programmable 50 -- 400 mA Both Rising and Falling, 2mV Overdrive, tRISE, tFALL = 100ns -- 43 -- μs VSHORT ≤ VBATS < VOREG VIN > 5V, RSENSE = 20mΩ, LOW_CHG = 0, Programmable −1 -- 1 mV Bad adaptor detection, VIN falling 3.5 3.7 3.9 V -- 30 -- ms VIN Rising 100 -- 200 mV During bad adaptor detection 20 30 40 mA Input power source detection -- 2 -- s Charge Mode, Programmable 4.2 -- 4.76 V −2 -- 2 % AICR = 100mA 80 90 100 AICR = 500mA 400 450 500 2 -- 6 V -- 60 -- mA -- -- 6 V 100 130 160 mV -- 130 -- ms Charge Termination Detection Termination Charge Current IEOC Deglitch Time for Charge Termination Charge Current Accuracy Offset Voltage, Sense Voltage Amplifier BAD Adaptor Detection Input Voltage Lower Limit VIN(MIN) Rising voltage, 2mV over drive, tRISE = 100ns Deglitch Time for VIN Rising above VIN(MIN) Hysteresis for VIN(MIN) ΔVIN(MIN) Current Source to GND Detection Interval TINT Minimum Input Voltage Regulation Minimum Input Voltage Regulation Threshold VMIVR VMIVR Accuracy Active Input Current Regulation AICR mA VDDP Regulator Internal Bias Regulator Voltage VDDP VIN > VIN(min) or VBATS > VBATMIN, IVDDP = 1mA, CVDDP = 1μF VDDP Output Short Current Limit Voltage from BOOT to LX Pin During charge or boost operation Battery Recharge Threshold Recharge Threshold Voltage Deglitch Time VRECH Below VOREG VBATS decreasing below threshold, tFALL = 100ns, 10mV overdrive Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Parameter Symbol Stat Output Low Level Output Saturation Voltage High Level Leakage Current Test Conditions Min Typ Max Unit IO = 10mA, Sink Current -- -- 0.4 V Voltage on STAT pin is 5V -- -- 1 μA Reverse Protection Comparator Reverse Protection Threshold, VIN − VBATS VSLP 2.3V ≤ VBATS ≤ VOREG, VIN Falling 0 40 100 mV Reverse Protection Exit Hysteresis VSLP-EXIT 2.3V ≤ VBATS ≤ VOREG 40 100 200 mV Rising Voltage -- 30 -- ms Deglitch Time for VIN Rising above VSLP + VSLP−EXIT VIN UVLO Under-Voltage Lockout Threshold Under-Voltage Lockout Threshold Hysteresis VUVLO VIN Rising 3.05 3.3 3.55 V ΔVUVLO VIN falling from above VUVLO 120 150 -- mV PWM Internal N-MOSFET High-Side RDSON_UG AICR = None, from VIN to LX On-Resistance Low-Side RDSON_LG from LX to PGND -- 80 160 -- 60 120 Maximum Duty Cycle DMAX -- 99.5 -- % Minimum Duty Cycle DMIN 0 -- -- % 2.5V < VIN < 4.5V; Including line and load regulation over full temp range −5 -- 5 % VIN_B = 5V, 2.5V < VBATS < 4.5V 1600 -- -- mA VIN_B = 5V, 2.5V < VBATS < 4.5V 4 6 8 A 5.6 6 6.3 V -- 200 -- mV 4.5 4.75 5 V mV mΩ Boost Mode Operation for VIN Boost Output Voltage Accuracy Maximum Output Current for Boost Cycle-by-Cycle Current Limit for Boost Over-Voltage Protection Threshold for Boost (VIN Pin) Over-Voltage Protection Hysteresis Maximum Battery Voltage for Boost Maximum Battery Voltage Hysteresis Minimum Battery Voltage for Boost (BATS pin) VIN_BOVP Threshold over VIN to turn off converter during boost ΔVIN_BOVP VIN falling from above VIN_BOVP VBATMAX VBATS rising edge during boost ΔVBATMAX VBATS falling from above VBATMAX -- 200 -- During Boosting -- 2.5 -- Before boost Starts -- 2.9 3.05 VBATMIN Copyright © 2013 Richtek Technology Corporation. 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DS9451-00 September 2013 V is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9451 Parameter Symbol Test Conditions Min Typ Max Unit Threshold over V IN to turn off converter during charge 11 12 13 V V IN falling from above V IN_OVP -- 140 -- mV 110 117 121 % Charger Protection Input VIN Threshold Voltage V IN_OVP VIN Hysteresis Battery OVP Threshold Voltage V OVP_BATS V BATS threshold over VOREG to turn off charger during charge (% V OREG ) OVP Hysteresis Δ OVP_BATS Lower limit for VBATS falling from > V OVP (% VOREG) -- 11 -- % Charge Mode Operation 5 7 9 A 1.9 2.1 2.2 V Cycle-by-Cycle Current Limit ILIMIT for Charge Trickle to Fast Charge V SHORT Threshold VSHORT Hysteresis Trickle Charge Charging Current Thermal Regulation Threshold Time Constant for the 32-Second Timer V BATS rising, VSHORT connected to V DDP ΔVSHORT V BATS falling from above V SHORT -- 100 -- mV ISHORT V BATS ≤ V SHORT 70 80 90 mA Charge current begins to taper down -- 120 -- °C T 32S 32 Second Mode -- 32 -- s V LDO V IN = 5.5V 4.8 4.9 5 V -- 60 -- dB 60 -- -- mA -- 100 250 mV 0.5 0.6 0.7 V 250 -- -- μA 50 100 150 μA DM Pin, Switch Open -- 4.5 5 DP Pin, Switch Open -- 4.5 5 DM Pin, Switch Open −1 -- 1 DP Pin, Switch Open −1 -- 1 V DP_LOW 0.8 -- -- V V DM_HIGH 0.8 -- -- V V DM_LOW -- -- 475 mV -- -- 0.4 V -- -- 0.4 V LDO LDO Output Voltage PSRR Maximum LDO Output Current Dropout Voltage f = 100Hz, CLDO = 1μF ILDO V DO V IN = 4.5V, I LDO = 50mA D+ / D− Detection D+ Voltage Source D+ Voltage Source Output Current V DP_SCR D− Current Sink IDM_SINK Input Capacitance CI Input Leakage DP Low Comparator Threshold DM High Comparator Threshold DM Low Comparator Threshold II pF μA Logic Levels and Timing Characteristics (SCL, SDA, INT) Output Low Threshold Level V OL IO = 3mA, Sink Current (SDA, INT) Input Low Threshold Level Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Parameter Symbol Test Conditions Input High Threshold Level Min Typ Max Unit 1.2 -- -- V -- -- 1 μA Input Bias Current (SCL, SDA, INT) I(bias) SCL Clock Frequency f SCL -- -- 400 kHz f OSC -- 375 -- kHz −10 -- 10 % VIO = 1.8V Oscillator Oscillator Frequency Frequency Accuracy Thermal Shutdown Thermal Shutdown Threshold TSD -- 165 -- °C Thermal Shutdown Hysteresis ΔT SD -- 10 -- °C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9451 Typical Application Circuit VIN 1 to 4 CIN 10µF CLDO 1µF LX CVDDP 1µF RSTAT RINT BOOT 18 16 LDO 19 VBAT RT9451 VIN VDDP ISENL 11 STAT 5 INT 6 VIO 7 DP ISENR 26 to 30 L 2.2µH System CSYS1 10µF RSENSE 20m CSYS2 10µF CBAT + Battery 2.2µF 14 CSENL 0.1µF 15 CSENR 0.1µF BATS 13 SCL 9 SDA 10 8 DM OTG 12 20, 33 (Exposed Pad) 17 GND MID_LDO 31, 32 21 to 25 MID PGND Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 CBOOT 100nF CMID 10µF CMID_LDO 1µF is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Typical Operating Characteristics Charge Mode Efficiency vs. Battery Voltage 100 95 95 90 90 ICHRG = ICHRG = ICHRG = ICHRG = ICHRG = ICHRG = 85 80 75 Efficiency (%) Efficiency (%) Efficiency vs. Battery Voltage 100 1A 1.4A 1.8A 2.2A 2.6A 3A 70 85 ICHRG = ICHRG = ICHRG = ICHRG = ICHRG = ICHRG = 80 75 70 65 1A 1.4A 1.8A 2.2A 2.6A 3A 65 VIN = 9V VIN = 5V 60 60 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 4.2 3.4 3.5 3.6 3.7 3.8 3.9 Battery Voltage (V) Battery Voltage (V) Adapter Insertion Battery Removal VIN (5V/Div) STAT (2V/Div) LX (10V/Div) STAT (2V/Div) I IN (200mA/Div) ILX (1A/Div) 4 4.1 4.2 LX (5V/Div) VBAT (1V/Div) VIN = 5V, VBAT = 3.7V VIN = 5V, VBAT = 3.7V, TERM_EN = 1 Time (10ms/Div) Time (5ms/Div) Bad Adapter Minimum Input Voltage Regulation No AICR VIN (5V/Div) INT (5V/Div) VIN (2V/Div) INT (5V/Div) I IN (20mA/Div) I IN (1A/Div) VIN = 5V/10mA, VBAT = 3.7V Time (10ms/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 VIN = 5V/1A, ICHRG = 2A, VMIVR = 4.76V, VBAT = 3.7V Time (250μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9451 USB Charger Detection (DPDM Detection) SCL (2V/Div) I IN (500mA/Div) VIN = 5V, ICHRG = 2A USB100 Mode, Short DP and DM Set DPDM_EN Time (25ms/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Boost Mode Efficiency vs. Load Current 5.08 90 5.07 70 60 3.4V 3.6V 3.8V 4V 4.2V ILOAD = ILOAD = ILOAD = ILOAD = ILOAD = ILOAD = 5.06 Input Voltage (V) VBAT = VBAT = VBAT = VBAT = VBAT = 80 Efficiency (%) Line Regulation 100 50 40 30 20 5.05 5.04 0.1A 0.4A 0.7A 1A 1.3A 1.6A 5.03 5.02 5.01 5.00 10 VIN = 5V 0 4.99 VIN = 5V 4.98 0 200 400 600 800 1000 1200 1400 1600 1800 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 4.2 Load Current (mA) Battery Voltage (V) Load Regulation Battery Under-Voltage Protection 4.3 5.08 5.07 VIN (5V/Div) Input Voltage (V) 5.06 5.05 5.04 VBAT (2V/Div) INT (2V/Div) 5.03 VBAT = VBAT = VBAT = VBAT = VBAT = 5.02 5.01 5.00 3.4V 3.6V 3.8V 4V 4.2V ILX (1A/Div) 4.99 VIN = 5V, ILOAD = 500mA VIN = 5V 4.98 0 200 400 600 Time (5ms/Div) 800 1000 1200 1400 1600 1800 Load Current (mA) VIN Over-Voltage Protection Load Transient Response V IN_ac (100mV/Div) VIN (5V/Div) INT (5V/Div) ILX (1A/Div) I LOAD (500mA/Div) VIN = 5V, ILOAD = 0.5A, VBAT = 3.7V Time (25μs/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 VIN = 5V, VBAT = 3.7V ILOAD = 0.2A to 1A (30mA/μs) Time (250μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT9451 32-Second Safety Timer Without Timer Reset VIN (5V/Div) ILX (200mA/Div) VIN = 5V, VBAT = 3.7V, ILOAD = 0.2A Time (5s/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Application Information The RT9451 is an integrated solution of single-cell Li-ion and Li-polymer battery charger for portable applications. The part integrates a synchronous PWM controller with power MOSFETs to provide MIVR (Minimum Input Voltage Regulation), input current sensing, high accuracy current and voltage regulation, and charge termination in a small package for space limited devices. The part also features USB OTG (On-The-Go) function and USB charger detection (DPDM detection) function. In charge mode, the RT9451 integrates USB charger detection for input current limit of 500mA and 1A. The detection is automatically triggered after each POR. The detection result can be ignored by the host via I2C interface. The slave address for the RT9451 is“1001010”. I2C Interface Timing Diagram The RT9451 acts as an I2C -bus slave. The I2C-bus master configures the settings for charge mode and boost mode by sending command bytes to the RT9451 via the 2-wire I2C-bus. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The second byte selects the register to which the data will be written. The third byte contains data to the selected register. The RT9451 provides three operation modes : charge mode, boost mode (USB OTG), and high impedance mode. In charge mode, the RT9451 supports a precision charging system for single cell. In boost mode, the RT9451 works as a Boost converter and boosts the voltage from battery to VIN pin for sourcing the OTG devices. In high impedance mode, the RT9451 stops charging or boosting and operates in a mode with low quiescent current from VIN or battery to reduce the power consumption when the portable device is in standby mode. The 1st Byte (Slave Address, R/W) Start 1 0 0 1 0 1 0 R/W The 2nd Byte (Data Address, Data) The 3rd Byte (Data) B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 C2 C1 C0 Stop S P SCL SDA 0 1 2 3 4 5 6 7 A6 A5 A4 A3 A2 A1 A0 W ACK B7 8 9 1 2 3 4 5 6 7 8 9 1 2 B6 B5 B4 B3 B2 B1 B0 ACK C7 C6 C5 3 4 5 6 7 8 9 C4 C3 C2 C1 C0 ACK S = Start Condition W = Write (SDA = “0”) R = Read (SDA = “1”) ACK = Acknowledge P = Stop Condition Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT9451 I2C Information Slave Address : 1001010 Table 1. Register Address Map Register Address (Hex) Name Default Value 0 0 CONTROL 0000 1010 Enable control register 1 1 CONFIG_A 0000 0001 Charger current register 2 2 CONFIG_B 0001 1001 Charger voltage register 3 3 CONFIG_C 0000 0010 Special charger settings 4 4 CONFIG_D 0100 0000 Charger safety limits settings 6 6 STATUS_A 0000 0000 Status register A 7 7 STATUS_B 0000 0001 Status register B 8 8 INT1 0000 0000 Interrupt bits 9 9 INT2 0000 0000 Interrupt bits (charger) 10 0A INT3 0000 0000 Interrupt bits (boost) 11 0B MASK1 0000 0000 Interrupt masking bits 12 0C MASK2 0000 0000 Interrupt masking bits 13 0D MASK3 0000 0000 Interrupt masking bits 14 0E CHIPID 0000 0001 Chip ID register Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 Description is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Control Register (Control) Address - 0x00h Data Bit D7 D6 D5 D4 D3 D2 Not Used Not Used LDO_EN DPDM_EN D1 D0 Field Name STAT_EN [1:0] Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 0 0 0 0 1 0 1 0 Field Name CH_EN [1:0] Bit Definition STAT enable bits 00 – AUTO (controlled by charger status) STAT_EN [1:0] 01 – ON (low impedance) 10 – OFF (high impedance) 11 – not defined LDO enable bit LDO_EN 0 – Disabled 1 – Enabled D+/D− detection enable DPDM_EN 0 – Disabled 1 – Enabled Note : Bit is automatically reset after detection is completed. Charger enable bits 00 – Disabled / HiZ mode CH_EN [1:0] 01 – Boost mode 10 – Charge 11 – Charge with automatic recharge Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT9451 Charger CONFIG Register A (CONFIG_A) Address - 0x01h Data Bit D7 D6 D5 Field Name LMTSEL Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 0 0 0 0 0 0 0 1 D3 D2 VICHRG [3:0] Field Name LMTSEL D4 D1 D0 VITERM [2:0] Bit Definition (1) Input current limit selection 0 – Input current limit is set to the higher of AICR [1:0] (CONFIG_B) and D+D− det. result 1 – AICR [1:0] (CONFIG_B) applied, D+D− detection result is ignored Charge current sense voltage (current equivalent for 20mΩ shunt) 0000 – 20mV (1000mA) 0001 – 24mV (1200mA) 0010 – 28mV (1400mA) 0011 – 32mV (1600mA) 0100 – 36mV (1800mA) 0101 – 40mV (2000mA) 0110 – 44mV (2200mA) VICHRG [3:0] 0111 – 48mV (2400mA) 1000 – 52mV (2600mA) 1001 – 56mV (2800mA) 1010 – 60mV (3000mA) 1011 – 64mV (3200mA) 1100 – 68mV (3400mA) 1101 – 72mV (3600mA) 1110 – 76mV (3800mA) 1111 – 80mV (4000mA) Termination current sense voltage (current equivalent for 20mΩ shunt) 000 – 1mV (50mA) 001 – 2mV (100mA) 010 – 3mV (150mA) VITERM [2:0] 011 – 4mV (200mA) 100 – 5mV (250mA) 101 – 6mV (300mA) 110 – 7mV (350mA) 111 – 8mV (400mA) (1) During charging the lower value of VMCHRG [3:0] (CONFIG_D register) and VICHRG [2:0] applies. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Charger CONFIG Register B (CONFIG_B) Address - 0x02h Data Bit D7 Field Name D6 D5 D4 AICR [1:0] D3 D2 D1 D0 VOREG [5:0] Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 0 0 0 1 1 0 0 1 Field Name Bit Definition (1) Input current limit setting 00 – 100mA 01 – 500mA 11 – No input current limit AICR [1:0] Battery regulation voltage / boost output voltage 00 0000 – 3.50V / 4.425V 00 0001 – 3.52V / 4.448V 00 0011 – 3.56V / 4.471V ... VOREG [5:0] 01 1000 – 3.98V / 4.977V 01 1001 – 4.00V / 5V 01 1010 – 4.02V / 5.023V ... 10 1111 – 4.44V / 5.506V ... 11 1111 – 4.44V / 5.506V (1) During charging the lower value of VMCHRG [3:0] (CONFIG_D register) and VICHRG [5:0] applies. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT9451 Charger CONFIG Register C (CONFIG_C) Address - 0x03h Data Bit D7 D6 D5 D4 D3 Field Name Not Used OTG_PL OTG_EN TERM_EN LOW_CHG Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 0 0 0 0 0 0 1 0 Field Name D2 D1 D0 MIVR [2:0] Bit Definition OTG_PL OTG pin polarity 0 – Active low 1 – Active high OTG_EN OTG pin enable 0 – Pin is disabled 1 – Pin is enabled TERM_EN Charge termination enable 0 – Disabled 1 – Enabled LOW_CHG Low charge current enable bit (current equivalent for 20mΩ shunt) 0 – Normal charge current sense voltage per register CONFIG_A 1 – 3mV (150mA) Input voltage MIVR regulation voltage 000 – 4.20V 001 – 4.28V 010 – 4.36V MIVR [2:0] 011 – 4.44V 100 – 4.52V 101 – 4.60V 110 – 4.68V 111 – 4.76V Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 20 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Charger CONFIG Register D (CONFIG_D) Address - 0x04h Data Bit D7 Field Name D6 D5 D4 D3 D2 VMCHRG [3:0] D1 D0 VMREG [3:0] Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 0 1 0 0 0 0 0 0 Field Name VMCHRG [3:0] VMREG [3:0] Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 (1) Bit Definition Maximum charge current sense voltage (current equivalent for 20mΩ shunt) 0000 – 20mV (1000mA) 0001 – 24mV (1200mA) 0010 – 28mV (1400mA) 0011 – 32mV (1600mA) 0100 – 36mV (1800mA) 0101 – 40mV (2000mA) 0110 – 44mV (2200mA) 0111 – 48mV (2400mA) 1000 – 52mV (2600mA) 1001 – 56mV (2800mA) 1010 – 60mV (3000mA) 1011 – 64mV (3200mA) 1100 – 68mV (3400mA) 1101 – 72mV (3600mA) 1110 – 76mV (3800mA) 1111 – 80mV (4000mA) Maximum Battery Regulation Voltage / Maximum OTG Regulation Voltage 0000 – 4.20V / 5.230V 0001 – 4.22V / 5.253V 0010 – 4.24V / 5.276V … 1100 – 4.44V / 5.506V ... 1111 – 4.44V / 5.506V is a registered trademark of Richtek Technology Corporation. www.richtek.com 21 RT9451 STATUS Register A (STATUS_A) Address - 0x06h Data Bit D7 D6 D5 Field Name Not Used STANDBY Not Used Read/Write R R R R R Reset Value 0 0 0 0 0 Field Name Not used STANDBY Not used D4 D3 D2 D1 D0 LDO Not Used R R R 0 0 0 CHSTAT [2:0] Bit Definition (1) N/A Standby status indicator 0 – Device is in ACTIVE mode 1 – Device is in STANDBY mode N/A Charger status bit 000 – High impedance mode or ready to charge 001 – Charge in progress (fast charge) 010 – Charge done CHSTAT [2:0] 011 – Boost mode 100 – Charge in progress (pre charge) 101 – Not defined 110 – Not defined LDO Not used 111 – Not defined LDO status bit 0 – LDO is disabled (OFF) 1 – LDO is enabled (ON), no fault N/A (1) Default values reflect state after Power On Reset, no charger plugged in, no faults present. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 22 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 STATUS Register B (STATUS_B) Address - 0x07h Data Bit D7 D6 D5 D4 D3 D2 D1 D0 Field Name RESET Not used Not used Not used Not used DPDM_D DPDM_R OTG Read/Write W R R R R R R R Reset Value 0 0 0 0 0 0 0 1 Field Name Bit Definition (1) Reset 0 – No effect RESET 1 – Reset all parameters to default values Note : Read always returns “0” Not used Not used Not used N/A N/A N/A Not used N/A DPDM_D D+/D− detection done bit 0 – DPDM detection in progress or not started after initial power up reset 1 – DPDM detection is complete DPDM_R D+D− detection result 0 – Standard USB port (500mA current limit) 1 – USB charger (975mA current limit) OTG OTG pin status 0 – OTG pin at low level 1 – OTG pin at high level (1) Default values reflect state after Power On Reset, no charger plugged in, no faults present, OTG pin high. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 23 RT9451 Interrupt Register 1 (INT1) Address - 0x08h Data Bit D7 D6 D5 D4 D3 D2 D1 D0 Field Name TSDI VINOVPI Not used Not used Not used Not used Not used Not used Read/Write Reset Value R 0 R 0 R 0 R/W 0 R/W 0 R/W 0 R/W 0 R 0 Field Name Bit Definition TSDI Thermal shutdown fault. Set if die temperature exceeds thermal shutdown threshold. Reset when die temperature drops below TSD release threshold. VINOVPI VIN over-voltage protection. Set when VIN > VIN_OVP is detected. Not used N/A Not used N/A Not used N/A Not used N/A Not used N/A Not used N/A Interrupt Register 2 (INT2) Address - 0x09h Data Bit D7 D6 D5 D4 D3 Field Name CHRVPI CHBADI CHBATOVI CHTERMI CHRCHGI Read/Write Reset Value R 0 R 0 R 0 R 0 R 0 Field Name Bit Definition D2 D1 D0 CH32MI CHTREGI R 0 R 0 CHMIVRI R 0 (1) CHRVPI Charger fault. Reverse protection (VIN > VIN(MIN) and VIN < VBATS + VSLP (fault) CHBADI Charger fault. Bad adaptor (VIN < VIN(MIN) during power on detection) CHBATOVI Charger fault. Battery OVP CHTERMI Charge terminated CHRCHGI Recharge request (VBATS < VOREG − VRECH) CH32MI Charger fault. 32 minutes time-out CHTREGI Charger warning. Thermal regulation loop active. CHMIVRI Charger warning. Input voltage MIVR loop active. (1) All charger faults result in disabling the charger (CH_EN [1:0] = 00). Recharge request disables the charger only if CH_EN [1:0] = 10. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 24 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Interrupt Register 3 (INT3) Address - 0x0Ah Data Bit D7 D6 D5 D4 D3 Field Name BSTVINOVI BSTOLI BSTLOWVI BSTBATOVI BST32SI Read/Write Reset Value R 0 R 0 R 0 R 0 R 0 Field Name Bit Definition BSTVINOVI Boost fault. VIN OVP (VIN > VIN_BOVP) BSTOLI Boost fault. Over load. BSTLOWVI Boost fault. Battery voltage is too low. BSTBATOVI Boost fault. Battery over voltage. BST32SI Boost fault. 32s time-out fault. Not used N/A Not used N/A Not used N/A D2 D1 D0 Not used R 0 Not used R 0 Not used R 0 (1) (1) All charger faults result in disabling the charger (CH_EN [1:0] = 00). Interrupt MASK Register 1 (MASK1) Address - 0x0Bh Data Bit D7 D6 D5 D4 D3 D2 D1 D0 Field Name Read/Write Reset Value TSDM R/W 0 VINOVPM R/W 0 Not used R/W 0 Not used R/W 0 Not used R/W 0 Not used R/W 0 Not used R/W 0 Not used R/W 0 Field Name Bit Definition (1) TSD fault interrupt mask 0 – Interrupt not masked 1 – Interrupt masked VIN OVP fault interrupt mask 0 – Interrupt not masked 1 – Interrupt masked TSDM VINOVPM Not used N/A Not used N/A Not used N/A Not used N/A Not used N/A Not used N/A (1) Setting any of the interrupt mask bits does not disable protection circuits. When set, the respective fault will not be signaled on the INT pin. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 25 RT9451 Interrupt MASK Register 2 (MASK2) Address - 0x0Ch Data D7 Bit Field CHRVPM Name Read/ R/W Write Reset 0 Value D6 D5 CHBADM D4 D3 D2 D1 D0 CHBATOVM CHTERMM CHRCHGM CH32MM CHTREGM CHMIVRM R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Field Name CHRVPM CHBADM CHBATOVM CHTERMM CHRCHGM CH32MM CHTREGM CHMIVRM (1) Bit Definition Charger reverse protection interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger Bad adaptor interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger battery over voltage interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charge terminated interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger recharge request interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger 32m timeout interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger thermal regulation loop active interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Charger input current MIVR active interrupt mask 0 – Interrupt not masked 1 – Interrupt masked (1) Setting any of the interrupt mask bits does not disable protection circuits. When set, the respective fault will not be signaled on the INT pin. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 26 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Interrupt MASK Register 3 (MASK3) Address - 0x0Dh Data Bit D7 D6 D5 D4 D3 Field Name BSTVINOVM BSTOLM BSTLOWVM BSTBATOVM BST32SM Read/Write Reset Value R/W R/W R/W R/W 0 0 0 0 Field Name Not used Bit Definition Boost VIN over voltage interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Boost over load interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Boost low battery voltage interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Boost battery over voltage interrupt mask 0 – Interrupt not masked 1 – Interrupt masked Boost 32s time out interrupt mask 0 – Interrupt not masked 1 – Interrupt masked N/A Not used N/A Not used N/A BSTVINOVM BSTOLM BSTLOWVM BSTBATOVM BST32SM R/W D2 Not used R/W D1 Not used R/W D0 Not used R/W 0 0 0 0 (1) (1) Setting any of the interrupt mask bits does not disable protection circuits. When set, the respective fault will not be signaled on the INT pin. CHIP ID Register (CHIPID) Address - 0x0Eh Data Bit D7 Field Name Read/Write Reset Value D6 D5 D3 VENDOR_ID [3:0] R 0 R 0 R 0 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 D4 September 2013 D2 D1 D0 CHIP_REV [3:0] R 0 R 0 R 0 R 0 R 1 is a registered trademark of Richtek Technology Corporation. www.richtek.com 27 RT9451 Charge Mode Operation Active Input Current Regulation (AICR) Minimum Input Voltage Regulation (MIVR) The AICR setting is determined by both AICR [1:0] in register 0x02h, DPDM_R bit in register 0x07h and LMTSEL bit in register 0x01h. If LMTSEL bit is set to “0”, the valid current limit is the maximum value of AICR [1:0] and DPDM_R result. If LMTSEL bit is set to “1”, the AICR [1:0] dominates and DPDM_R result is ignored. For the latter, the input current limit of “00”, “01” and “10” in AICR [1:0] corresponds to 100mA, 500mA and 975mA respectively. If the application does not need input current limit, write “11” into the AICR [1:0]. The RT9451 features input voltage MIVR function to prevent input voltage drop due to insufficient current provided by the adaptor or USB input. If MIVR function is enabled, the input voltage decreases when the over current of the input power source occurs and is regulated at a predetermined voltage level which can be set from 4.20V to 4.76V with the step of 80mV by I2C interface to MIVR [2:0] in the register of address 0X03. The INT pin is pulled low to notify the host and the CHMIVR bit is set to high. At this time, the current drawn by the RT9451 equals to the maximum current value that the input power can provide at the predetermined voltage level, instead of the set value. And CHMIVR bit is set to “1” and INT pin is pulled low to notify the host. The MIVR function is initially set to 4.36V. Charge Profile The RT9451 provides a precision Li-ion or Li-polymer charging solution for single-cell applications. Input current limit, charge current, termination current, charge voltage and input voltage MIVR are all programmable via the I2C interface. In charge mode, the RT9451 has five control loops to regulate input current, charge current, charge voltage, input voltage MIVR and device junction temperature. During the charging process, all five loops are enabled and the dominant one will take over the control. VIN VIN MIVR Expected IIN Final IIN IIN set charge current Figure 1 For normal charging process, the Li-ion or Li-polymer battery is charged in three charging modes depending on the battery voltage. At the beginning of the charging process, the RT9451 is in pre-charge mode. When the battery voltage rises above pre-charge threshold voltage (VPREC), the RT9451 enters fast-charge mode. Once the battery voltage is close to the regulation voltage (VOREG), the RT9451 enters constant voltage mode. USB Power Source Detection (DPDM Detection) Pre-Charge Mode An USB charger detection mechanism is integrated in RT9451 to detect between dedicated charger or not. The detection is triggered by VIN power on or DPDN_EN bit in the register address of 0x00h. The DPDN_EN bit is automatically reset to “0” after it is triggered. The DPDM detection status and result are reported in DPDM_D DPDM_R bits in the register address of 0x07h. The result is set to 975mA for dedicated charger (DP and DM pins short together) or 500mA for others. The detection mechanism can be disable by pulling VIO pin high. For life-cycle consideration, the battery can not be charged with large current under low battery condition. When the BATS pin voltage is below pre-charge threshold voltage (VPREC), the charger is in pre-charge mode with a weak charge current which equals to the pre-charge current (IPREC). In pre-charge mode, the charger basically works as an LDO. The pre-charge current also acts as the current limit when the BATS pin is shorted. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 28 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Fast-Charge Mode and Settings As the BATS pin rises above VPREC, the charger enters fast-charge mode and the power MOSFETs starts switching. Unlike the linear charger, the switching charger is a current amplifier. The current drawn by the RT9451 is different from the current into the battery. The user can set the input current limit (IIN_LIMIT) and output charge current (ICHRG) respectively. The real charging current is determined by both IIN_LIMIT [1:0] and VICHRG [3:0]. Cycle-by-Cycle Current Limit The charger of the RT9451 has an embedded cycle-bycycle current limit for inductor. Once the inductor current touches the threshold (5.5A min.), the charger stops charging immediately to prevent over current from damaging the device. Notice that, the mechanism can not be disabled by any way. Low Current Charging (LOW_CHG) The RT9451 has two charge current settings for the charge current in fast-charge mode. One is LOW_CHG bit, the other is VICHRG[3:0] bits. If LOW_CHG is set to “1”, the charge current is limited to 150mA (RSENSE = 20mΩ). If LOW_CHG is set to “0”, the charge current is determined by VICHRG[3:0] bits. Charge Current (ICHRG) The charge current into the battery is determined by the sense resistor (RSENSE) and VICHRG [3:0] bits in the register of address 0x01. The voltage between the ISENL and ISENR pins is regulated to the voltage controlled by VICHRG [3:0]. The charge current equals to the voltage between the ISENL and ISENR pins (VICHRG) divided by RSENSE : V ICHRG = ICHRG RSENSE For example, for a 20mΩ sense resistor, the charge current can be set from 1000mA (VICHRG [3:0] = “0000”) to 4000mA (VICHRG [3:0] = “1111”). ⎡V ⎛ IIN_LIMIT ⎞⎤ ICHRG = MIN ⎢ ICHRG , ⎜ ×η ⎟ ⎥ R D SENSE ⎝ ⎠⎦ ⎣ where D is the duty cycle and η is the efficiency. Constant Voltage Mode and Settings The RT9451 enters constant voltage mode when the BATS voltage is close to the output-charge voltage (VOREG). Once entering this mode, the charge current begins decreasing. For default settings (charge current termination is disabled, TERM_EN = 0), the RT9451 does not turn off and always regulates the battery voltage at VOREG. However, once the charge current termination is enabled, the charger terminates if the charge current is below termination current (VITERM [2:0] / RSENSE) in constant-voltage mode. The charge current termination function is controlled by TERM_EN bit in the register of address 0x01 via the I2C interface. After termination, a new charge cycle restarts when one of the following conditions is detected : ` The BATS pin voltage falls below the VOREG−VRECH threshold and CH_EN [1:0] = 11. ` VIN Power On Reset (POR). ` CH_EN [1:0] is set from “0X” to “1X”. Output Charge Voltage (VOREG) The output-charge voltage is set by the VOREG [5:0] in the register 0x02h. Its range is from 3.5V to 4.45V. The default is 4V (011001). Termination Current (IEOC) If the charger current termination is enabled (TERM_EN = “1”), the end-of-charge current is determined by both the termination current sense voltage (VITERM [2:0]) and sense resistor (RSENSE). VITERM range is from 1mV to 8mV with the step of 1mV. The end-of-charge current is calculated as below : V IEOC = ITERM RSENSE When input current limit and charge current are both set, the charge current in fast charge phase is calculated as below : Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 29 RT9451 Recharge Behavior There are two recharge behavior depending on CH_EN [1:0] setting. If CH_EN [1:0] = “11”, the RT9451 will recharge automatically once BATS falls below VOREG− VRECH threshold. If CH_EN [1:0] = “10”, the RT9451 will not recharge automatically but set CHRECH flag and pull low INT pin to notify the host the battery need to be recharged. Safety Timer in Charge Mode To implement safety mechanism in charge mode, the RT9451 has a 32-minute timer. At the beginning of a charging operation, the RT9451 starts 32-minute timer that can be reset by any write or read action performed by the host through the I2C interface. Once 32-minute timer is expired, the RT9451 enters to high impedance mode. The I2C registers are all reset to default value and CH32M the reverse blocking switch and PWM are all turned off. This function prevents battery drain during poor or no input power source. Input Over-Voltage Protection (VINOVPI) When VIN voltage raises above the input over-voltage threshold (VOVP_IN), the RT9450 stops charging and then sets fault status bits and sends out fault pulse via the STAT pin. The condition is released when VIN falls below VOVP_IN VOVP_IN. The RT9450 then resumes charging operation. Boost Mode Operation (OTG) Trigger and Operation During charge mode, there are three protection mechanisms against poor input power source and overvoltage condition : bad adapter detection, sleep mode and input over-voltage protection. The RT9451 features USB OTG support. There are two trigger method : One is to set CH_EN [1:0] = “01” (for I2C control), the other is to set OTG_EN, OTG_PL and OTG pin (for GPIO control). Notice that when using OTG pin to trigger boost mode, it needs an edge trigger and then keep it to the level defined by OTG_PL. When OTG function is enabled, the synchronous Boost control loop takes over the power MOSFETs and reverses the power flow from the battery to the VIN pin. In normal boost mode, the MID pin is regulated to the voltage level determined by VOREG [5:0] whose range is from 4.75 and provides up to 1.6A current to support other USB OTG devices connected to the USB connector. Bad Adapter Detection (CHBADI) Safety Timer in Boost Mode (BST32SI) A mechanism is used to justify the power source capability when power on at the VIN pin. When VIN rises above VIN(MIN), a sink current of 30mA (typ.) is connected to VIN pin to detection adaptor status. After the detection period (30ms typ.), the sink current is removed. At the same time, if VIN is still above VIN(MIN), the detection passes and enters charge mode. If VIN is below VIN(MIN), the bad adapter condition occurs. The RT9451 stops working, sets CHBADI and repeats detection flow every 2 second (typ.). Initially, the RT9451 starts a 32-second timer that can be reset by any write or read action performed by the host through the I2C interface. Once 32-second timer is expired, the RT9451 enters to high impedance mode, the I2C registers are all reset to default value and BST32S bit is set to “1” to prevent the charger against uncontrolled discharging when the dead lock of the host occurs. bit is set to “1” to prevent the charger against uncontrolled charging when the dead lock of the host occurs. During normal charging process, the host needs to reset 32-minute timer periodically. Input Voltage Protection in Charge Mode Sleep Mode (VIN - VBATS < VSLP, CHRVPI) The RT9451 enters sleep mode if the voltage drop between the VIN and BATS pins falls below VSLP. In sleep mode, Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 30 During normal discharging process, the host needs to reset 32-second timer periodically. Output Over-Voltage Protection (VIN pin, BSTVINOVI) In boost mode, the output over-voltage protection is triggered when the VIN voltage is above the output OVP is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Output Overload Protection (BSTOL) The RT9451 provides an overload protection to prevent the device and battery from damage when VIN is in overload. Once the inductor current reaches cycle-by-cycle current limit, the reverse blocking switch operates in linear region to limit the output current while the MID voltage remains in voltage regulation. If the overload condition lasts for more than 30ms, the RT9451 determines the overload fault condition and resets registers to the default settings. Status Output (STAT pin) The STAT pin is used to indicate operating conditions of the RT9451 and is enabled by writing “00” to the EN_STAT [1:0] in the register of address 0x00. When charging is in progress, the STAT pin is pulled low. In other conditions, the STAT pin acts as a high impedance output. The STAT pin can also be always pulled low or high impedance by writing “01” and “10” respectively. Battery Protection Battery Over-Voltage Protection in Charge Mode (CHBATOVI) The RT9451 monitors BATS voltage for output over-voltage protection. In charge mode, if the BATS voltage rises above VOVP_BAT x VOREG, for example, when the battery is suddenly removed, the RT9450A stops charging and then sets fault status bits and pull low INT pin. The condition is released when BATS falls below (VOVP_BAT − ΔVOVP_BAT) x VOVP_BAT. The RT9451 then resumes charging process with default settings and the fault is cleared. Battery Over/Under-Voltage Protection in Boost Mode (BSTBATOVI, BSTLOWVI) In boost mode, if the BATS voltage rises above the BATS maximum input voltage (4.75V typ.) or below BATS minimum input voltage (2.5V typ. for operating, 3V typ. for start), battery over/under-voltage protection is triggered. The RT9451 stops switching, and then enters high impedance mode. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WQFN-32L 4x4 package, the thermal resistance, θJA, is 27.8°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (27.8°C/W) = 3.59W for WQFN-32L 4x4 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 4.0 Maximum Power Dissipation (W)1 threshold (6V typ.). When OVP occurs, the RT9451 stop switching then enters high impedance mode. Four-Layer PCB 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 2. Derating Curve of Maximum Power Dissipation is a registered trademark of Richtek Technology Corporation. www.richtek.com 31 RT9451 Output Voltage Output Current VRECH Pre-Charge Constant Voltage Fast-Charge Re-Charge Charge Termination CC VShort IEOC IShort Time Figure 3. Charging I-V Curve No Yes 2 Any I C in 32 sec ? 2 In T32sec mode Mode is Controlled by I C Yes Charge Start 2 In T32min Mode No Any I C ? > 32 min ? No Mode is Controlled by OTG Pin Yes Timer Fault Figure 4. Safety Timer VIN > 2.4V and VBATS > 2.4V ? Yes Yes VIN > 3.3V ? No Charge Configure 2 (I C is Programmable) No Any State If VIN < 2.4V and 2 Clean I C VBATS < 2.4V Any State If Time Fault Power On Figure 5. POR Reset Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 32 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Any State HZ = 1 & OTG is Inactive High Impedance HZ = 0, OPA = 0 Figure 6. High Impedance Mode Power On VIN + VIN(MIN) No 32ms Deglitch - VIN > VUVLO ? Adaptor Detection Control Yes Delay 16ms Enable Adaptor Detection (Enable Input Current Sink & Start 32ms Timer) No VIN > VIN(MIN) ? 32ms Timer Expired ? Yes No Yes No Bad Adaptor Detected (Disable Input Current Sink) Good Adaptor Detected (Disable Input Current Sink) VIN > VUVLO ? CHARGE Yes Delay tINT = 2s Figure 7. Input Power Source Detection Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 33 RT9451 Charge Configure 2 (I C is Programmable) No OPA = 1 & HZ = 0 ? Yes No No OTG pin is Active ? OTG Pin is Enabled ? (By I2C) Reset OPA_MODE bit Yes Yes Boost Configure 1 Boost Configure 2 2 Clean I C No 2.9V < V BATS < 4.75V ? 2.9V < VBATS < 4.75V ? Yes No Yes VMID = 5.05V VMID = 5.05V 2.5V < VBATS < 4.75V ? 2.5V < VBATS < 4.75V ? Yes Yes No 2 Yes VIN < 6V ? VIN < 6V ? Yes Yes < 32s Any I C ? No No No < 32s No No Yes 2 Yes Any I C ? Yes No No Reset 32s Reset 32s Overload < 32ms No No Yes Overload < 32ms Yes Figure 8. OTG Mode Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 34 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Power On No No VIN > VPOR_IN? CH_EN[1:0] = [0,1]? Yes Yes 2 Load I C with Default Settings OTG Mode No VBATS > VSHORT? No No Fault? --------------------------------VINOVP, VOCP, VBATUVP, VBATOVP, T32s Fault Charge with ISHORT Yes Fast-Charge with LowCHRG 32 Min Timer Expired? Yes Set to Hi-Z Mode -------------------------CH_EN[1:0] = [0,0] Yes 32 Min Timer Expired? No Yes INT of TFault Fault in Buck Mode (1) OVP (2) CHRVPI (3) TFault (4) CVOVP No ICHRG < IEOC? Any State No Yes OTG_EN = 1? Termination is Enabled? No No Keep in CV Mode Yes Yes Charge Done -----------------------INT of Charge Termination Yes No OTG Pin from High to Low @ OTG_PL = 0? or OTG Pin from Low to High @ OTG_PL = 1? Yes Yes Yes VBATS < VRECH? OTG Mode Yes No Re-Charge is Enabled? OTG Pin=High @ OTG_PL = 0? or OTG Pin=Low @ OTG_PL = 1? No INT of Re-Charge Figure 9. Operation Flow Chart Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9451-00 September 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 35 RT9451 Layout Considerations Place the input and output capacitors as close to the input and output pins as possible. ` Keep the main power traces as wide and short as possible. ` The output inductor and bootstrap capacitor should be placed close to the chip and LX pins. ` To optimize current sense accuracy, connect the traces to RSENSE with Kelvin sense connection. The output inductor and bootstrap capacitor should be placed close to the chip And LX pins. Keep the main power traces as wide and short as possible. Keep the main power traces as wide and short as possible. MID MID LX LX LX LX LX PGND To System GND Place the input and output capacitors as close to the input and output pins as possible. 32 31 30 29 28 27 26 25 VIN VIN VIN VIN INT VIO DP DM 1 24 2 23 3 4 5 6 22 21 GND 20 19 33 7 18 8 17 To optimize current and voltage sense accuracy, connect the traces to pins with Kelvin sense connection. To Battery PGND PGND PGND PGND GND VDDP BOOT MID_LDO Keep the main power traces as wide and short as possible. SCL SDA STAT OTG BATS ISENL ISENR LDO 9 10 11 12 13 14 15 16 GND Figure 10. PCB Layout Guide Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 36 is a registered trademark of Richtek Technology Corporation. DS9451-00 September 2013 RT9451 Outline Dimension 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 3.900 4.100 0.154 0.161 D2 2.650 2.750 0.104 0.108 E 3.900 4.100 0.154 0.161 E2 2.650 2.750 0.104 0.108 e L 0.400 0.300 0.016 0.400 0.012 0.016 W-Type 32L QFN 4x4 Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS9451-00 September 2013 www.richtek.com 37