RT9481 Easy to Use Power Bank Solution (EZPBSTM) Integrated Chip with Switch Charger, ADC, and Load Switch General Description Features The RT9481 is a high integration and easy to use power solution for Li-ion power bank and other powered handheld applications. We call it EZPBSTM System High Accuracy Voltage/Current Regulation 1% Charge Voltage Regulation 0.1A Charge Current Regulation 3% Boost USBOUT Voltage Regulation Thermal Shutdown Protection Reverse Leakage Protection to Prevent Battery Drainage. (Easy to Use Power Bank Solution). This single chip includes a Switching Charger with Boost function, Analog to Digital Converter (ADC), USBOUT Load Switch, Adapter Detection with BC1.2, DCP controller and LDO. Applications Power Bank Ordering Information Thermal Regulation and Output Short Current Protection RT9481 Package Type QW : WQFN-24L 4x4 (W-Type) (Exposed Pad-Option 2) Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations Built-In Adapter Detection with BC1.2 Built-In Accurate ADC to Measure VBAT, VBUS, TS, IBAT , USBOUT and IUSBOUT Built-In LDO Interrupt Output for Event Notification 2 I C Interface with 400kHz Charge Mode Charge Voltage Regulation : 3.65V to 4.6V Charge Current Regulation : 0.7A to 2.7A Minimum Input Voltage Regulation (MIVR) : (TOP VIEW) BOOT VMID LX LX PGND PGND 24 23 22 21 20 19 USBOUT USBOUT VHMID VBUS VBUS D- 1 18 2 17 3 AGND 4 25 5 6 16 15 14 13 8 SCL SDA INT AGND VDDA VDD28V 9 10 11 12 D+ ISENSP ISENSN TS DM DP 7 WQFN-24L 4x4 Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 Built-In USBOUT DCP Controller Built-In USBOUT Attach/Detach Detection Built-In USBOUT Light Load Detection Built-In Load Switch with Current Regulation 4.2V to 4.8V Average Input Current Regulation (AICR) : 0.1A to 2A Charge Termination Current : 0.15A to 0.6A Pre-charge Threshold : 2.3V to 3.8V Pre-charge Current : 0.2A to 0.5A Thermal Regulation VMID Under Voltage Protection VBUS Over Voltage Protection Battery Over Voltage Protection Bad Adapter Detection Boost Mode Boost Output Current Up to 3A Boost Output Voltage : 3.65V to 5.2V Battery Under Voltage Protection : 2.5V to 3.2V VMID Over Voltage Protection is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9481 Marking Information 3X=YM DNN 3X= : Product Code YMDNN : Date Code Typical Application Circuit RT9481 3 VHMID VMID 23 C8 22μF / 25V x 2 C1 1μF/25V Input Power Option 4, 5 Output Power VBUS USBOUT R1 C2 1μF/25V 1, 2 C9 22μF / 25V x 2 C3 1μF/25V 14 R2 VDDA C4 1μF Q1 11 DM 12 DP 10nF 6 D7 D+ 24 BOOT R3 10m C5 2.2μF L1 1μH C6 10μF C7 47nF 21, 22 R4 INT Battery Protect IC 8 ISENSP 9 ISENSN + - 10 RNTC 10k Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 VDDA LX R7 2 C11 1nF TS 10nF SDA SCL VDD28V R5 R6 16 17 18 13 C10 1μF PGND 19, 20 AGND 15, 25 (Exposed Pad) is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Functional Pin Description Pin No. 1, 2 Pin Name Pin Function USBOUT USB Power Output. 3 VHMID Internal Use Only. 4, 5 VBUS VBUS Power Supply. 6 D- D- Input for Adapter Detection. 7 D+ D+ Input for Adapter Detection. 8 ISENSP Charging Current Sensing Positive Node. 9 ISENSN Charging Current Sensing Negative Node and Connect to Battery Plus Terminal. 10 TS Battery Temperature Detection Pin. 11 DM DCP Controller DM Output. 12 DP DCP Controller DP Output. 13 VDD28V Internal Use LDO Output. 14 VDDA Internal Power for Analog Blocks, Put 1F to GND. 15, AGND 25 (Exposed Pad) Analog Ground Node. The exposed pad must be soldered to a large PCB and connected to AGND for maximum power dissipation. 16 INT Interrupter Signal. Connect an external pull-up resistor. 17 SDA Data Input and Output for I2C Serial Port. Connect an external pull-up resistor. 18 SCL Clock Input for I2C Serial Port. Connect an external pull-up resistor. 19, 20 PGND Power Ground for Switching Charger. 21, 22 LX Internal Switch Node to Output Inductor Connection. 23 VMID Connection Point Between Reverse Blocking and High-Side. 24 BOOT Bootstrap Power Node for Switching Charger. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9481 Functional Blocks Diagram VHMID MOS VBUS VDDA VMID Analog Base LDSW USBOUT Attach /Detach BOOT LX DCP Control 2.7A SWCHG 3A Boost Controller PGND ISENSP ISENSN LDO 2.8V DP DM VDD28V VDDA Central Logic Control ADC TS AGND VBAT VBUS IBAT USBOUT IUSBOUT Adapter Detection INT SDA SCL D+ D- Operation The RT9481 is a high integrated IC for Li-Ion battery power bank. It includes a Switch charger 2.7A, a synchronous Boost 5V. Charge Current Base on thermal regulation function, the charging current can support up to 2.7A. VBUS Over Voltage Protection If the input voltage (VBUS) is higher than the threshold voltage VOVP, the internal OVP signal will go high and the charger will stop charging until VIN is below VOVP hysteresis. VMID Over Voltage Protection If the internal voltage (VMID) is higher than the threshold voltage VOVP, the internal OVP signal will go high and the charger will stop charging until VMID is below VOVP hysteresis. function in order to protect system from short-toground current damages. USBOUT SCP The USBOUT short circuit protection (SCP) function will prevent system from burning out by monitoring the voltage drop between LDSW. If the USBOUT is short to ground, the inrush current will make the VDS voltage too large to damage chip. The SCP function also reports this condition to protect chip in time. Boost OCP The converter senses the current signal when the high-side P-MOSFET turns on. As a result, The OCP is cycle by-cycle current limitation. If the OCP occurs, the converter holds off the next on pulse until inductor current drops below the OCP limit. OTP The converter has an over-temperature protection. VMID Under Voltage Protection If the internal voltage (VMID) is lower than the threshold voltage VUVP, the internal VMID_UVP signal will go high and the system will disable LDSW Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 When the junction temperature is higher than the thermal shutdown rising threshold, the system will be latched and the output voltage will no longer be is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 regulated until the junction temperature drops under the falling threshold. CC/CV/TR Multi Loop Controller There are constant current loop, constant voltage loop and thermal regulation loop to control the charging current. Base Circuits Base circuits provide the internal power, VDDA and reference voltage and bias current. Buck Regulator for Charging and Boost Regulator as BOOST The multi-loop controller controls the operation of charging process and current supply to the system. It also controls the circuits as a Boost converter for BOOST applications. USB Charger Detection The RT9481 detects USB Charger (Standard Charger Port, Charging Downstream Port and Dedicated Charger Port) via D+ and D- pins. USBOUT Attach/Detach Detection RT9481 includes an auto attach detection for the power bank product. The attach detection has a current threshold which represent an attach condition. When the attach detection is enable, the USBOUT will generate a 1.6V to monitor the load current. Once load current is greater than 5A, the attach flag will be reported until the load current is removed. I2C Controller The key parameters of charging and BOOST are programmable through I2C commands. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9481 Absolute Maximum Ratings (Note 1) VBUS, VHMID Supply Input Voltage ---------------------------------------------------------------------------- 0.3V to 18V VMID--------------------------------------------------------------------------------------------------------------------- 0.3V to 6.7V LX, BOOT -------------------------------------------------------------------------------------------------------------- 0.3V to 6V VMID VBUS, BOOT LX ----------------------------------------------------------------------------------------- 0.3V to 6V Others ------------------------------------------------------------------------------------------------------------------- 0.3V to 6V Power Dissipation, PD @ TA = 25°C WQFN-24L 4x4 ------------------------------------------------------------------------------------------------------ 3.57W Package Thermal Resistance (Note 2) WQFN-24L 4x4, JA ------------------------------------------------------------------------------------------------- 28C/W WQFN-24L 4x4, JC ------------------------------------------------------------------------------------------------- 7.1C/W Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------ 260C Junction Temperature ---------------------------------------------------------------------------------------------- 150C Storage Temperature Range ------------------------------------------------------------------------------------- 65C to 150C ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------- 2kV MM (Machine Model) ----------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note 4) Supply Input Voltage------------------------------------------------------------------------------------------------- 4.3V to 5.65V Junction Temperature Range ------------------------------------------------------------------------------------- 40C to 125C Ambient Temperature Range-------------------------------------------------------------------------------------- 40C to 85C Electrical Characteristics (VBUS = 5V, VBATS = 4.2V, TA = 25C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 4 -- 5.65 V PWM switching, ICHG = IBAT = 0mA -- 10 -- mA High Impendence Mode -- -- 200 A VBAT = 4.2V, VBUS = 0V, Charger off. 1/80 ADC execution time duty -- 40 60 A VBUS Rising 5.7 6 6.3 V VBUS Falling -- 200 -- mV VBUS Rising 3 3.25 3.5 V Input Power Source VBUS Operation Range VBUS Supply Current IQ Leakage Current from Battery IBAT_LEAK Protection VBUS OVP Threshold Voltage VBUS OVP Hysteresis VBUS UVLO VBUS_OVP VBUS_OVP_ HYS VBUS_UVLO Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Parameter VBUS UVLO Hysteresis ISENSN OVP ISENSN OVP Hysteresis Symbol VBUS_UVLO_ HYS VBAT_OVP VBAT_OVP_ HYS Over Temperature Protection TOTP OTP Hysteresis TOTP_HYS Thermal Regulation Threshold TREG Test Conditions Min Typ Max Unit -- 150 -- mV VISENSN Rising 103 107 114 % VISENSN Falling -- 5 -- % (Note 5) -- 160 -- C -- 20 -- C Optional 100/120/135C by I2C (Default value is 120C) -- 120 -- C Bad Voltage Source Detection 3.6 3.8 4 V -- 30 -- ms 100 -- 200 mV -- 50 -- mA -- 2 -- s VBUS Falling Input Power Source Detection Poor Source Detect Threshold VBUS_pr Poor Source Detect Deglitch tVBUS_pr_dg Poor Source Detect Hysteresis VBUS_pr_hys VBUS Rising Current Sink to GND IVBUS_pr During Poor Source Detection Detection Interval Time tVBUS_pr_int Sleep Mode Comparator Sleep-Mode Entry Threshold VBUS ISENSN VSLP 3V < VISENSN < VBATREG, VBUS Falling -- 40 100 mV Sleep-Mode Exit Hysteresis VBUS Symbol ISENSN VSLPEXIT 3V < VISENSN < VBATREG, VBUS Rising 40 120 200 mV Sleep-Mode Deglitch Time tSLP VBUS Rising Above VSLP + VSLPEXIT -- 30 -- ms 4.2 -- 4.8 V 5 -- 5 % Minimum Input Voltage Regulation (MIVR) Minimum Input Voltage Regulation VMIVR Optional 4.2V to 4.8V by I2C per 0.1V (Default value is 4.7V) VMIVR Accuracy Average Input Current Regulation (AICR) Accuracy AICR Range IAICR_100mA IAICR = 100mA 80 90 100 IAICR_500mA IAICR = 500mA 400 450 500 IAICR_700mA IAICR = 700mA 560 630 700 IAICR_1000mA IAICR = 1000mA 800 900 1000 IAICR Optional 100mA to 2000mA by I2C (Default value is 0.5A) 100 -- 2000 VVBUS > 4.5V -- 4.5 -- VVBUS < VISENSN -- VISENSN -- mA mA VDDA Regulator VDDA Voltage VDDA VDDA UVLO VDDA_UV VDDA Risling 2.4 2.5 2.6 V VDDA UVLO Hysteresis VDDA_UV_hys VDDA Falling -- 150 -- mV Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 V is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9481 Parameter Symbol Test Conditions Min Typ Max Unit 3.65 -- 4.6 V 1 -- 1 % 50 125 200 mV -- 128 -- ms 0.7 -- 2.7 A 100 -- 100 mA 2.3 -- 3.8 V 5 -- 5 % 200 -- 500 mA 20 -- 20 % RSENSE = 10m, Optional 150mA to 600mA by I2C (Default value is 200mA) 150 -- 600 mA IEOC Accuracy RSENSE = 10m 100 -- 100 mA Deglitch Time for EOC ICHG < IEOC, VISENSN > (VBATREG VREG) Optional 4ms to 32ms by I2C (Default value is 32ms) 4 -- 32 ms Fast-Charge Time-Out Optional 6Hrs to 20Hrs by I2C per 2Hrs (Default value is 20Hrs) 6 -- 20 Hrs Pre-Charge Time-Out Optional 30Mins to 60Mins by I2C per 15Mins (Default value is 60Mins) 30 -- 60 Mins From VBUS to LX, as IAICR disable or IAICR = 2A -- 97 -- m From VBUS to USBOUT -- 98 -- m From LX to PGND -- 35 -- m Battery Voltage Regulation Battery Voltage Regulation VBATREG Optional 3.65V to 4.6V by I2C per 25mV (Default value is 4.2V) VBATREG Accuracy Re-Charge Threshold ΔVREG Re-Charge Deglitch Time tREC VISENSN Falling, VREG = (VBATREG VREC) Charging Current Regulation Output Charging Current ICHG RSENSE = 10m, Optional 0.7A to 2.7A by I2C per 0.25A (Default value is 0.7A) ICHG Accuracy ICHG_ACC RSENSE = 10m Pre-Charge Threshold VPREC Rising, Optional 2.3V to 3.8V by I2C per 0.1V (Default value is 3V) VPREC Accuracy Pre-Charge Current IPREC Optional 200mA to 500mA by I2C per 100mA (Default value is 300mA) IPREC Accuracy Charge Termination Detection End of Charge Current IEOC tEOC Charger Timer Protection PWM Switching Charger VBUS to LX Resistance R DS(ON)_ VBUS_LX VBUS to USBOUT Resistance R DS(ON)_ Low-Side On-Resistance RDS(ON)_LS VBUS_USBOUT Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Parameter Symbol Efficiency for Charge EFF_CHG Oscillator Frequency f OSC Test Conditions VBUS = 5V, VISENSN = 4V, and ICHG = 2A Frequency Accuracy Maximum Duty Cycle DMAX Minimum Duty Cycle D(MIN) At Minimum Voltage Input Peak OCP as Charger Mode Min Typ Max Unit -- 90 -- % -- 0.75 -- MHz 10 -- 10 % -- 95 -- % 0 -- -- % -- 4.5 -- A 3.625 -- 5.2 V 3 -- 3 % Boost Mode Operation Output Voltage Level VBOOST To VMID Optional 3.625V to 5.2V by I2C per 25mV (Default value is 5.1V) Output Voltage Accuracy Output Current On VMID IBST VBAT > 3V 3 -- -- A Efficiency for Boost EFF_BST VMID = 5V, VISENSN = 4V, and Loading = 2A -- 92 -- % Peak OCP as Boost Mode IOCP_BST -- 6 -- A VMID Rising -- 6 -- V VMID Falling -- 200 -- mV 2.5 -- 3.2 V 33 35 37 A 2.5 5 5.5 V VMID OVP as Reverse Boost VOVP_BST VMID OVP Hysteresis Battery UVP for Boost VOVP_BST_ HYS VBATMIN Falling, I2C Programmable Per 0.1V Optional 2.5V to 3.2V by I2C per 0.1V (Default value is 3V) NTC Function Current Source for NTC 10k ITS_10k Load Switch for USBOUT Supply Voltage VSW Load Switch On Resistance of MOSFET RDS(ON)_SW VMID = 5V, IO = 1000mA -- 35 -- m Load Switch UVP Delta VSW_UVP_D VMID VUSBOUT -- 1.4 -- V Light Load Detection Current IDET_10mA Detection current -- 10 -- mA Thermal Regulation Threshold of the Load Switch TREG_LSW Optional 100C to 135C by I2C (Default value is 100oC) -- 100 -- C Adapter Detection D+ Voltage Source VD+_SRC 0.5 -- 0.7 V VDAT_REF Voltage VDAT_REF 0.25 -- 0.4 V VLGC Voltage VLGC 0.8 -- 2 V D- Sink Current IDN_SINK 50 -- 150 A Copyright © 2016 Richtek Technology Corporation. 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DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9481 Parameter Symbol Test Conditions Min Typ Max Unit USBOUT Attach/Detach Detection USBOUT Attach Voltage IUSBOUT = 1.5A 1.4 1.6 1.8 V USBOUT Attach/Detach Threshold CUSBOUT = 40F, Note 6 1 5 10 A Detect Time 1 VBAT = 3V, COUT = 30F, 0X24[4:2] = 010 -- 375 -- ms Detect Time 2 VBAT = 3V, COUT = 50F, 0X24[4:2] = 100 -- 600 -- ms LDO 2.8V Output Voltage VOUT_2.8V COUT = 1F 2.66 2.8 2.94 V Output Current IOUT_2.8V VDDA > 3V 10 -- -- mA The Time for VOUT Ready tRDY_2.8V COUT = 1F 1 -- -- ms -- 12 -- Bit VBAT, TS 10 -- 10 mV VBUS, USBOUT 50 -- 50 mV IBAT < 1A 100 -- 100 mA IBAT > 1A 10 -- 20 % IUSBOUT < 1A 100 -- 100 mA IUSBOUT > 1A 10 -- 10 % -- -- 25 ms High-Level 1.5 -- -- Low-Level -- -- 0.4 ADC Characteristics Resolution Measurement Error Conversion Time VGERR TCONV Logic Inputs (SDA SCL) SDA, SCL Input Threshold Voltage V Open Drain Low Voltage VODL ISINK = 1mA -- -- 0.4 V f SCL VDDA = 3.3V -- -- 400 kHz 0.6 -- -- ms 3.9 4.1 4.3 V 100 200 300 mV -- 150 200 A -- 157 200 2 I C Timing Characteristics SCL Clock Rate Hold Time (Repeated) START Condition. After this period, tHD;STA the first clock pulse is generated Input Power DCP Controller Power UVLO VUVLO_R_DCP Rising Threshold Voltage from VMID _CTRL UVLO Hysteresis DCP Controller Supply Current VUVLO_F_CP_ CTRL IDCP_CTRL Falling 4.5V < VUID < 5V BC1.2 DCP Mode DP and DM Shorting Resistance RDPM_SHORT VDP = 0.8V, IDM = 1mA Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Parameter Resistance Between DP/DM and GND Symbol RDCHG_ SHORT Test Conditions DP = 0.8V Voltage Threshold on DP1 under which the Device Goes VDPL_TH_DET Falling Back to Divider Mode Hysteresis VDPL_TH_DET _HYS Rising Min Typ Max Unit 350 656 1150 k 310 330 350 mV -- 50 -- mV DIVIDER Mode DP Output Voltage for DIVIDER Mode VDP_2.7V VUID = 5V 2.57 2.7 2.84 V DM Output Voltage for DIVIDER Mode VDM_2.7V VUID = 5V 2.57 2.7 2.84 V DP Output Impedance for DIVIDER Mode RDP_PAD1 IDP = 5A 24 30 36 k DM Output Impedance for DIVIDER Mode RDM_PAD1 IDM = 5A 24 30 36 k DP and DM Shorting Resistance RPM_short -- 150 200 DP Output Voltage for 1.2V Mode VDP_1.2V 1.12 1.2 1.28 V DP Output Impedance for 1.2V Mode RDP_PAD 80 102 130 k 1.2V / 1.2V Mode Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. JC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guarantee by design. Note 6. It will attach when only plug-in APPLE charging line. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9481 Typical Operating Characteristics Boost Efficiency vs Output Current Charging Efficiency vs. Charging Current 100 100 98 80 VIN = 3V 96 70 VIN = 3.4V 94 60 VIN = 3.7V Efficiency (%) VIN = 3.9V 50 40 30 20 92 90 88 86 84 10 VOUT = 5V, L = 1μH (TDK SPM6530) 0 82 VBUS = 5V, L = 1μH (TDK SPM6530), C IN = 1μF 80 500 1000 1500 2000 2500 3000 1500 2000 2500 Steady State Steady State 3000 VLX (2V/Div) VOUT_ac (50mV/Div) VBAT = 3.3V, VOUT = 5V, IOUT = 1000mA, L = 1H, COUT = 10F VOUT_ac (50mV/Div) Time (500ns/Div) Time (500ns/Div) Steady State Steady State VLX (2V/Div) VLX (2V/Div) VBAT = 3.7V, VOUT = 5V, IOUT = 1000mA, L = 1H, COUT = 10F Time (500ns/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 1000 Charging Current (mA) VLX (2V/Div) VOUT_ac (50mV/Div) 500 Output Current (mA) VBAT = 3.3V, VOUT = 5V, IOUT = 2500mA, L = 1H, COUT = 10F 0 VBAT = 3.7V, VOUT = 5V, IOUT = 2500mA, L = 1H, COUT = 10F Efficiency (%) 90 VOUT_ac (50mV/Div) Time (500ns/Div) is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Application Information Switching Charger Table 1. MIVR Register Setting Table The switching charger integrates a synchronous PWM controller with power MOSFETs to provide Minimum Input Voltage Regulation (MIVR), Average Input Current Regulation (AICR), high accuracy current and voltage regulation, and charge termination. MIVR[2:0] VMIVR 000 Disable 001 4.2V 010 4.3V 011 4.4V In charge mode, the switching charger supports a precision charging system for single cell. In boost mode, the switching charger works as the boost converter. And in high impedance mode, the switching charger stops charging or boosting and operates in a mode with low current from battery to reduce the power consumption when the portable device is in standby mode. 100 4.5V 101 4.6V 110 4.7V (default) 111 4.8V Notice that the switching charger does not integrate input power source (AC adapter or USB input) charging detection. Thus, the switching charger does not set the charge current automatically. The charge current needs to be set via I2C interface by the host. The switching charger application mechanism and I2C compatible interface are introduced in later sections. Charge Mode Operation Minimum Input Voltage Regulation (MIVR) The switching charger features Minimum Input Voltage Regulation function to prevent input voltage drop due to insufficient current provided by the adaptor or USB input. If MIVR function is enabled, the input voltage decreases when the over current of the input power source occurs. VBUS is regulated at a predetermined voltage level which can be set as 4.2V to 4.8V per 0.1V by I2C interface. At this time, the current drawn by the switching charger equals to the maximum current value that the input power can provide at the predetermined voltage level, instead of the set value. Charge Profile The switching charger provides a precision Li-ion or Lipolymer charging solution for single-cell applications. Input current limit, charge current, termination current, charge voltage and input voltage MIVR are all programmable via the I2C interface. In charge mode, the switching charger has five control loops to regulate input current, charge current, charge voltage, input voltage MIVR and device junction temperature. During the charging process, all five loops (if MIVR is enabled) are enabled and the dominant one will take over the control. For normal charging process, the Li-ion or Li-polymer battery is charged in three charging modes depending on the battery voltage. At the beginning of the charging process, the switching charger is in pre-charge mode. When the battery voltage rises above pre-charge threshold voltage (VPREC), the switching charger enters fast-charge mode. Once the battery voltage is close to the regulation voltage (VBATREG), the switching charger enters constant voltage mode. Pre-Charge Mode For life-cycle consideration, the battery cannot be charged with large current under low battery condition. When the ISENSN pin voltage is below pre-charge threshold voltage (VPREC), the charger is in pre-charge mode with a weak charge current witch equals to the pre-charge current (IPREC). In pre-charge mode, the charger basically works as a Linear Charger. The precharge current also acts as the current limit when the ISENSN pin is shorted. The Pre-Charge current levels are 200mA to 500mA programmed by I2C per 100mA. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT9481 Table 2. VPREC Register Setting Table current from damaging the device. Notice that, the mechanism cannot be disabled by any way. VPREC[2:0] Pre-Charge Threshold 0000 2.3V 0001 2.4V 0010 2.5V 0011 2.6V 0100 2.7V 0101 2.8V 0110 2.9V 0111 3V (default) 1000 3.1V Average Input Current Regulation (AICR) 1001 3.2V The AICR levels are 100mA to 2A programmed by I 2C 1010 3.3V per 50mA. 1011 3.4V 1100 3.5V 1101 3.6V 1110 3.7V 1111 3.8V Table 3. IPREC Register Setting Table Adapter Detection RT9481 includes the VBUS detection function. When VBUS plugs in, CHGGOODADP_STAT will reset to 0 once VBUS not rising exceeds 3.8V after 16ms. Besides, if VBUS falling below 3.8V during the charging interval, CHGBADADP_ STAT is set as 1 to inform customer the poor adapter situation. Charge Current (ICHRG) The charge current into the battery is determined by the sense resistor (RSENSE) and ICC setting by I2C. The voltage between the ISENSP and ISENSN pins is regulated to the voltage control by ICC setting. As the RSENSE is 10m, the Fast-Charge currents are 700mA to 2.7A programmed by I2C per 250mA. IPREC[1:0] Pre-Charge Current 00 200mA 01 300mA (default) ICHG[3:0] VCC ICHG RSENSE is 10m 10 400mA 0000 7mV 0.7A (default) 11 500mA 0001 9.5mV 0.95A Fast-Charge Mode and Settings 0010 12mV 1.2A As the ISENSN pin rises above VPREC, the charger enters fast-charge mode and starts switching. Notice 0011 14.5mV 1.45A 0100 17mV 1.7A that the switching charger does not integrate input power source (AC adapter or USB input) detection. Thus, the switching charger does not set the charge current automatically. Unlike the linear charger (LDO), the switching charger (Buck converter) is a current amplifier. The current drawn by the switching charger 0101 1.95mV 1.95A 0110 2.2mV 2.2A 0111 2.45mV 2.45A 1000 2.7mV 2.7A is different from the current into the battery. The user can set the Average Input Current Regulation (AICR) and output charge current (ICHRG) respectively. Cycle-by-Cycle Current Limit The charger of the switching charger has an embedded cycle-by-cycle current limit for inductor. Once the inductor current touches the threshold, the charger stops charging immediately to prevent over Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 Table 4. ICHG Register Setting Table Constant Voltage Mode and Settings The switching charger enters constant voltage mode when the VBAT voltage is close to the output-charge voltage (VBATREG). Once in this mode, the charge current begins to decrease. For default settings (charge current termination is disabled), the switching charger does not turn off and always regulates the battery voltage at VBATREG. However, once the charge current termination is enabled, the charger terminates if the charge current is below termination current (IEOC) in constant-voltage mode. The charge current termination function is controlled by the I2C interface. is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 After termination, a new charge cycle restarts when one of the following conditions is detected : The ISENSN pin voltage falls below the VBATREG as VREC threshold. VBUS Power On Reset (POR). Enable bit toggle or Charger reset (via I2C interface) VBUS Over Voltage Protection When VBUS rises above the input over voltage threshold, the switching charger stops charging and then sets fault status bits. The condition is released when VBUS falls below OVP threshold. The switching charger then resumes charging operation. Reverse Boost Mode Operation Trigger and Operation Battery Charge Voltage (VBATREG) The output-charge voltage is set by the I2C interface. Its range is from 3.65V to 4.6V per 25mV. Termination Current (IEOC) If the charger current termination is enabled (TE bit = “1”), the end-of-charge current is determined by both the termination current sense voltage (VEOC) and sense resistor (RSENSE). As RSENSE is 10m, IEOC is set by the I2C interface from 150mA to 600mA. Table 5. EOC Register Setting Table The switching charger features Boost support. When BOOST function is enabled, the synchronous boost control loop takes over the power MOSFETs. In boost mode, the VMID pin is regulated to 5V (typ.) to support other BOOST devices connected to the USB connector. USBOUT Over-Voltage Protection In boost mode, the output over voltage protection is triggered when the VMID voltage is above the output OVP threshold. When OVP occurs, the boost converter stops switching and turns off immediately. EOC[2:0] VEOC IEOC RSENSE is 10m 000 Disable Disable Battery Protection 001 1.5mV 150mA Battery Over-Voltage Protection in Charge Mode 010 2mV 200mA (default) 011 2.5mV 250mA 100 3mV 300mA 101 4mV 400mA 110 5mV 500mA 111 6mV 600mA VBUS Voltage Protection in Charge Mode During charge mode, there are two protection mechanisms against if input power source capability is less than the charging current setting. One is AICR and the other is minimum input voltage regulation. A suitable level of AICR can prevent VBUS drop by the insufficient capability. As the AICR setting is not suitable, MIVR will regulate the VBUS in the setting level and sink the maximum current of power source. Sleep Mode (VVBUS VVBAT < VSLP) The switching charger enters sleep mode if the voltage The switching charger monitors the VBAT voltage for output over voltage protection. In charge mode, if the VBAT voltage rises above VOVP_BAT x VBATREG, such as when the battery is suddenly removed, the switching charger stops charging and then sets fault status bits and sends out fault pulse at the INT pin. The condition is released when the VBAT voltage falls below (VOVP_BAT VOVP_BAT) x VOVP_BAT. The switching charger then resumes charging process with default settings and the fault is cleared. Low Battery Voltage Protection (LBP) When the Battery voltage is lower than a specified value, the converter will stop switching. Until the battery voltage rises above the low battery voltage protection threshold plus hysteresis voltage value, the converter resumes switching. The low battery voltage protection can be programmed with 8 different levels (2.5V to 3.2V). drop between the VBUS and ISENSN pins falls below VSLP. In sleep mode, the reverse blocking switch and PWM are all turned off. This function prevents battery drain during poor or no input power source. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT9481 Table 6. LBP Register Setting Table LBP[2:0] Low Battery Protection Level 000 2.5V 001 2.6V 010 2.7V 011 2.8V 100 2.9V 101 3V (default) 110 3.1V not update status. IRQ_enable will mask IRQ_status to trigger IRQ Low, so the system can decide which interrupt is necessary. When STA low to high or high to low IRQ will be trigger but STA will keep situation and cannot be masked only mask IRQ. For CHG_IRQ and MISC_IRQ register Event : IEOC Flag is mask I2C Read Clear 111 3.2V USB Battery Charging Specification The RT9481 supports adapter detection for dedicated charging port, Charging downstream port and Standard REG : IEOCI REG : IEOCIM 0: Not Mask Event 1: Mask Event PIN : INT downstream port by D- and D+. For CHG_STA2, CHG_STA3 and MISC_STA2 register USB Dedicated Charging Port Controller Event : TSD The RT9481 supports an USB dedicated charging port (DCP) controller. The DCP controller detects USB data REG : TSDI Event is not mask line voltage, and automatically provides the correct electrical signatures on the data lines (DM and DP) to charge compliant devices. D+ =2.7V and D- =2.0V. BC1.2 DCP, required to short the D+ Line to the D– Line and 1.2 V on both D+ and D– Lines. REG : TSDIM 0: Not Mask Event 1: Mask Event 2 I C Read Clear 2 I C Read Clear REG : CHG_STA2_ALT Interrupt is mask PIN : INT Figure 1. IRQ and STA Operation IRQ and STA Operation RT9481 summarize all IRQ items in the register table. All IRQ_status registers are implemented as reset after read. If IRQ_enable bit is Low, the IRQ_status bit will Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Charger Mode Starts show in the flag ADAPTER_STAI (MISC_STA1[6:5]) when ADAPTER_DONE (MISC_IRQ[6]) is set. The host could decide the user Charger setting by adapter type, like AICR or ICHG etc… For example, set IAICR to 0.5A, if the adapter type is SDP. Set IAICR to 1.5A, if the adapter type is CDP or DCP. No Check Adapter Attached VBUS_STAI (MISC_STA2[5])=1? Yes Read Adapter Type Read ADAPTER_STAI (MISC_STA1[6:5]) when ADAPTER_DONEI (MISC_IRQ[6]) = 1 If there is no Charger fault event triggered in registers CHG_STAT1 or CHG_STAT2, the host can decide to turn on Charger or not. Set user Charger setting from registers CHG_CTRL1 to CHG_CTRL6 before turn on Charger. Please refer to I2C register map for detailed functional setting. To enable Charger by setting OPA_MODE (CHG_CTRL1[0]) to low and setting SWITCHING_EN (CHG_STA1[0]) to high. Yes Check Charger Fault? No User Charger Setting and Turn on Charger OPA_MODE (CHG_CTRL1[0]) = 0 SWITCHING_EN (CHG_STA1[0]) = 1 When charging is start the host can check CHG_STAT (CHG_STA1[5]) to make sure the charging is in progress. If system want to implement the charge and bypass feature, the host can set EN_LDSW (USBOUT_CTL[6]) to high to turn on Load Switch and set EN_DCP (USBOUT_CTL[7]) to high to turn on DCP Controller, then the power of adapter could bypass to device when battery is under charging. Charger Terminate No EOC? or Charger fault? or Adapter detached? There are three conditions to terminate Charger and the host could set SWITCHING_EN (CHG_STA1[0]) to low to turn off Charger. End of Charge (EOC) Yes Charger Terminate Figure 2. Charger Mode Flow Charger Mode Flow The Charger mode is start from adapter attached, the flag of VBUS_STAI (MISC_STA2[5]) will be set to high and the host can read this bit to check adapter attached or not. Then adapter type detection will auto start to detect the type of adapter with BC1.2 standard. Its detection result is Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 Set TE (CHG_CTRL1[1]) to high to enable Termination function, then the Charger will terminate automatically and CHTERMI (CHG_IRQ[7]) is set to high when the charging current is below IEOC (CHG_CTRL5[2:0]) and charging voltage is above re-charge threshold. The host could turn on Charger again when CHRCHGI (CHG_IRQ[5]) is set. Charger Fault The Charger automatically terminates when Charger fault event be triggered in Table 7. is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT9481 Table 7. Charger Fault Event Charger Fault Event Flag Register Power Status PWR_Rdy = 0 CHG_STA1[2] Thermal Shutdown TSD_STAT = 1 CHG_STA2[7] VBUS OVP VBUSOVP_STAT = 1 CHG_STA2[6] Reverse Protection CHRVP_STAT = 1 CHG_STA2[5] Battery OVP CHBATOV_STAT = 1 CHG_STA2[4] Good Adaptor Detection CHGGOODADP_STAT = 0 CHG_STA2[1] Bad Adaptor Detection CHGBADADP_STAT = 1 CHG_STA2[0] Adapter Detach The flag of VBUS_STAI will be set to low when adapter detached and it will terminate Charger directly. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Boost Mode Starts No Check Device Attached USBOUT_STAI (MISC_STA2[4]) = 1? Yes Yes Check Boost Fault? No User Boost Setting and Turn on Boost OPA_MODE (CHG_CTRL1[0]) = 1 SWITCHING_EN (CHG_STA1[0]) = 1 Check Boost Soft-Start Finish and Turn on Load Switch and DCP Controller EN_LDSW (USBOUT_CTL[6]) = 1 EN_DCP (USBOUT_CTL[7]) = 1 Turn on USBOUT Light Load Detection Delay time(tULD > 100ms) then set USBOUTLD_LVL (USBOUT_CTL[5:3]) No Boost Fault? or USBOUT Light Load ? Yes Boost Terminate Figure 3. Boost Mode Flow Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT9481 Boost Mode Flow The Boost mode could start from device attached, and the flag of USBOUT_STAI (MISC_STA2[4]) will be set to high for indicate the device attached. The USBOUT attach detection is control by register ATTACH_CTL[5]. If there is no any Boost fault triggered in registers CHG_STAT2 or BST_IRQ or MISC_IRQ, the host can decide to turn on Boost or not. The host can set user Boost setting before turn on the Boost from registers CHG_CTRL1 to CHG_CTRL6 and please refer to I2C register map for detailed functional setting. The Boost could be enable by set OPA_MODE (CHG_CTRL1[0]) to high and setting SWITCHING_EN (CHG_STA1[0]) to high. Before enable the Load Switch suggest to wait Boost soft start (CHG_IRQ[3]) finish, it can guarantee the Boost ready for output. Then the host could set EN_LDSW (USBOUT_CTL[6]) to high to turn on Load Switch and the Boost would start output current to device. For let device identify the power bank is a powerful adapter, to set EN_DCP (USBOUT_CTL[7]) to high to turn on DCP controller at the same time. USBOUT light load detection (USBOUTLD_CTL[5:3]) can help the host to check the device charging full or device detached by the condition of USBOUT current is under the threshold or not. But according to USB standard, the device will start charging after it connect to adapter 100 millisecond. We suggest to add delay time tULD over 100 millisecond before enable USBOUT light load detection after Load Switch turn on. It could avoid USBOUT light load detection trigger early. Table 8. Boost Fault Event Boost Fault Flag Register Event Thermal Shutdown TSD_STAT CHG_STA2[2] Boost Thermal Shutdown BSTTSDI BST_IRQ[7] VMID Over Voltage Protect BSTVMIDVPI BST_IRQ[6] Battery Voltage is too Low BSTLOWVI BST_IRQ[5] Load Switch Short Current Protect LDSW_SCPI MISC_IRQ[5] VMID Short Current Protect VMIDSCPI MISC_IRQ[1] VMID Under Voltage Protect VMIDUVPI MISC_IRQ[0] USBOUT Light Load It means device charging full or device detached when USBOUTLD_STAT (MISC_STA2) set to high. According to USBOUTLD_STAT, the host could decide to turn off Boost or not. ADC Conversion Starts Set ADC Channel CH_SEL (ADC_CLT[7:5]) and Start ADC Conversion ADC_START (ADC_CLT[0]) = 1 Check ADC Conversion Complete ADC_DONEI (MISC_IRQ[7]) = 1 or ADC_STAT (MISC_STAT1) = 0 The host could read BOOST_STAT (CHG_STA1) to make sure the Boost is in progress. Discharging Terminate There are two conditions to terminate discharging. Read ADC Code ADC_CODEH[7:0]、 ADC_CODEL[7:0] and Calculate measurement Boost Fault The Boost automatically terminates when Boost fault event be triggered in Table 8. Finish ADC Conversion Figure 4. ADC Conversion Operation Flow Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 20 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 ADC Conversion Operation Flow Figure 4 shows ADC conversion operation flow. ADC conversion starts from set ADC channel CH_SEL (ADC_CLT[7:5]) and set ADC_START (ADC_CLT[0]) to high. ADC conversion time is 25ms and ADC_DONEI (MISC_IRQ[7]) will set to high and ADC_STAT (MISC_STAT1) will set to low also, the host could read them to make sure ADC conversion completes. The host could read ADC code high byte (ADC_CODEH[7:0]) and low byte (ADC_CODEL[7:0]) to calculate the voltage or current measurement relative to ADC channel. Table 9 shows the every measurement equation of ADC channel. Please pay attention to the calculation of IBAT, it need to consider the setting of ICHG (CHG_CTRL6[7:4]). ADC code format is unsigned. If operation is Charger mode, IBAT means battery charging current. If operation is boost mode, IBAT means battery discharging current. The code of IBAT is invalid if SWITCHING_EN (CHG_STA1[0]) is set to low. And the code of IUSBOUT is invalid if EN_LDSW (USBOUT_CTL[6]) is set to low. The TS pin will automatic output 35uA during ADC TS channel under conversion. It will cause the IR drop on NTC thermistor and then ADC measure the voltage on TS pin. The host could get the temperature by mapping the voltage. We suggest to use 10k NTC which the beta (B25/85) is 3435k, like SEMITEC 103AT. Table 9. Calculate Voltage or Current Measurement ADC Channel Measurement Equation Measurement Range VBAT VBAT = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x 1.25 mV 0V to VDDA VBUS VBUS = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x 6.25 mV 1V to 18V USBOUT USBOUT = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x 6.25 mV 1V to 6V TS TS = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x 1.25 mV 0V to VDDA IBAT IBAT = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x ICHG x 1.25 mA 0A to 6A IUSBOUT IUSBOUT = ( ( ADC_CODEH x 256 ) + ADC_CODEL ) x 2.5 mA 0A to 6A Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 21 RT9481 Table 10. Protection Items Protection Type VBAT VDDA Threshold (typical) Refer to Electrical Spec. IC Shutdown Delay Time Reset Method LBP VBAT < LPB setting Exist boost mode None VDDA power reset OVP VBAT > 1.07 x CHG_CV Stop charging None VDDA power reset or VBAT falling to 1.02 x CHG_CV UVP VDDA < 2.35V analog circuit disable None VDDA >2.5V OVP VBUS > 6V Stop charging, UUG disable None VDDA power reset or VBUS falling to VBUSOVP-hysteresis Bad adapter VBUS < 3.8V None None VDDA power reset or VBUS rising to VBUS_BAD + hysteresis Good adapter None None None None RVP VBUS < VBAT Stop charging, UUG disable None VDDA power reset or VBUS rising above VBAT TREG Temp. ≒ Thermal regulation setting None None MIVR VBUS ≒ MIVR setting None None AICR IBUS ≒ AICR setting None None OVP N/A UVP 3.5V N/A Absolute voltage below threshold SCP 3.5V VBUS VMID Protection Methods LDSWREG 1.5A/2A/2.5A/3A USBOUT LDSWSCP VDS~1.4V VDDA power reset or thermal loop release VDDA power reset or MIVR loop release VDDA power reset or AICR loop release N/A sEn_VMIDUVP Absolute voltage below threshold sEn_VMIDUVP Load current is above current limit sEn_LDSW VDS voltage is too high sEn_LDSW sEn_LDSW Current limit 1.5A/2A/2.5A/3A Load current reach to limit-point Boost Current limit Inductor current > 6A cycle by cycle, inductor current limit None Inductor current < 6A OTP Thermal Shutdown Temp > 160C Stop charging, UUG disable None Temp < 160C Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 22 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Thermal Considerations Layout Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power Some PCB layout guidelines for optimal performance of RT9481 list as following. Following figure shows the real PCB layout considerations and it is based on the real component size whose unit is millimeter (mm). dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) TA) / JA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and JA is the junction to Place the input and output capacitors as close to the input and output pins as possible. Keep the main power traces as wide and short as possible. The output inductor and boot capacitor should be placed close to the chip and LX pins. The battery voltage sensing point should be placed after the output capacitor. To optimize current sense accuracy, connect the ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125C. The junction to ambient thermal resistance, JA, is layout dependent. For WQFN-24L 4x4 package, the thermal resistance, JA, is 28C /W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25C can be calculated by the following formula : PD(MAX) = (125C 25C) / (28C /W) = 3.57W for WQFN-24L 4x4 package traces to RSENSE with Kelvin sense connection by ISENSN and ISENSP. LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. Add Snubber in LX: 2 resister 0805 package and 1nF capacitor. The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal resistance, JA. The derating curve in Figure 5 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 4.0 Four-Layer PCB 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 5. Derating Curve of Maximum Power Dissipation Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 23 RT9481 Top : Iayer2 : Layer3 : Bottom : Figure 6. PCB Layout Guide Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 24 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 I2C Interface RT9481 I2C slave address = 7'b1101100. I2C interface support fast mode (bit rate up to 400kb/s). The write or read bit stream (N 1) is shown below : Read N bytes from RT9481 Slave Address Register Address S 0 A R/W Slave Address MSB A Sr 1 Assume Address = m MSB Data 2 Data 1 A Data for Address = m LSB MSB Data N LSB A A Register Address S 0 R/W A MSB Data 1 LSB A Assume Address = m P Data for Address = m + N - 1 Data for Address = m + 1 Write N bytes to RT9481 Slave Address LSB A MSB Data 2 LSB A Data for Address = m MSB A Data for Address = m + 1 Data N LSB A P Data for Address = m + N - 1 Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 25 RT9481 I2C Register Map Register of the SWCHG Function Low BAT CTRL Register b[7] Address (MSB) b[3] b[2] b[0] (LSB) OCP 1 1 0 0 1 1 0 1 R/W R/W R/W R/W R/W R/W R/W R/W HZ LBP b[1] Higher_ Default Write b[4] Sel_ Fix_ Freq Read/ b[5] SWFreq Meaning 0X00 b[6] LBP[2:0] Enable Control the switching frequency to be dynamic or fix Fix_Freq 0 : Auto-change frequency 1 : Fixed frequency (default) The switching frequency selection bit (Charger/ Boost) Sel_ SWFreq 0 : The switching frequency is 1.5MHz 1 : The switching frequency is 0.75MHz (default) Higher_OCP enable Higher_ OCP 0 : Disable (default) 1 : Higher IL OCP level selection of buck mode and boost mode HZ 0 : Not high impedance mode (default) 1 : High impedance Low Battery Protection Enable LBP Enable 0 : Disable 1 : Enable (default) Define Low Battery Protection Level. The default voltage is 3V. LBP[2:0] Code Voltage Code Voltage Code Voltage Code Voltage 000 2.5V 010 2.7V 100 2.9V 110 3.1V 001 2.6V 011 2.8V 101 111 3.2V Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 26 3V (default) is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Register b[7] Address (MSB) b[6] b[5] Meaning Charger Control 1 0X01 Default Read/ Write b[4] b[3] b[2] IAICR[5:0] b[0] b[1] (LSB) TE OPA_ MODE 0 0 1 0 1 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Define AICR current. The default current is 0.5A. IAICR[5:0] Code Current Code Current Code Current Code Current 000000 Disable 010000 0.8A 100000 1.6A 110000 2A 000001 0.1A 010001 0.85A 100001 1.65A 110001 2A 000010 0.1A 010010 0.9A 100010 1.7A 110010 2A 000011 0.15A 010011 0.95A 100011 1.75A 110011 2A 000100 0.2A 010100 1A 100100 1.8A 110100 2A 000101 0.25A 010101 1.05A 100101 1.85A 110101 2A 000110 0.3A 010110 1.1A 100110 1.9A 110110 2A 000111 0.35A 010111 1.15A 100111 1.95A 110111 2A 001000 0.4A 011000 1.2A 101000 2A 111000 2A 001001 0.45A 011001 1.25A 101001 2A 111001 2A 011010 1.3A 101010 2A 111010 2A 001010 0.5A (default) 001011 0.55A 011011 1.35A 101011 2A 111011 2A 001100 0.6A 011100 1.4A 101100 2A 111100 2A 001101 0.65A 011101 1.45A 101101 2A 111101 2A 001110 0.7A 011110 1.5A 101110 2A 111110 2A 001111 0.75A 011111 1.55A 101111 2A 111111 2A Termination enable TE 0 : Disable charge current termination (default) 1 : Enable charge current termination OPA_MODE 0 : Charger mode (default) 1 : Boost mode Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 27 RT9481 Function Register b[7] Address (MSB) b[6] b[5] Meaning Charger Control 2 0X02 Write b[3] b[2] CHG_CV[5:0] Default Read/ b[4] b[0] b[1] (LSB) Reversed Reversed 0 1 0 1 1 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Define battery regulation voltage. The delta-V of the Battery regulation voltage is 25mV. The default voltage is 4.2V. Code Voltage Code Voltage Code Voltage Code Voltage 000000 3.65V 000001 3.675V 010000 4.05V 010001 4.075V 100000 4.45V 110000 4.6V 100001 4.475V 110001 4.6V 000010 3.7V 010010 4.1V 100010 4.5V 110010 4.6V 000011 3.725V 010011 4.125V 100011 4.525V 110011 4.6V 000100 3.75V 010100 4.15V 100100 4.55V 110100 4.6V 000101 3.775V 010101 4.175V 100101 4.575V 110101 4.6V 000110 3.8V 010110 100110 4.6V 110110 4.6V 000111 3.825V 010111 4.225V 100111 4.6V 110111 4.6V 001000 3.85V 011000 4.25V 101000 4.6V 111000 4.6V 001001 3.875V 011001 4.275V 101001 4.6V 111001 4.6V 001010 3.9V 011010 4.3V 101010 4.6V 111010 4.6V 001011 3.925V 011011 4.325V 101011 4.6V 111011 4.6V 001100 3.95V 011100 4.35V 101100 4.6V 111100 4.6V 001101 3.975V 011101 4.375V 101101 4.6V 111101 4.6V 001110 4V 011110 4.4V 101110 4.6V 111110 4.6V 001111 4.025V 011111 4.425V 101111 4.6V 111111 4.6V CHG_CV[5:0] 4.2V (default) CHG : 3.65V + CHG_CV x 0.025V, max. : 4.6V Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 28 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Register b[7] Address (MSB) b[6] b[5] Meaning Charger Control 3 0X03 Default Read/ Write b[4] b[3] b[2] Boost _CV[5:0] b[0] b[1] (LSB) TREG_SEL[1:0] 1 1 1 0 1 1 0 1 R/W R/W R/W R/W R/W R/W R/W R/W Define Boost regulation voltage. The delta-V of the Boost voltage is 25mV. The default voltage is 5.1V. Boost _CV[5:0] Code Voltage Code Voltage Code Voltage Code Voltage 000000 3.625V 010000 4.025V 100000 4.425V 110000 4.825V 000001 3.65V 010001 4.05V 100001 4.45V 110001 4.85V 000010 3.675V 010010 4.075V 100010 4.475V 110010 4.875V 000011 3.7V 010011 4.1V 100011 4.5V 110011 4.9V 000100 3.725V 010100 4.125V 100100 4.525V 110100 4.925V 000101 3.75V 010101 4.15V 100101 4.55V 110101 4.95V 000110 3.775V 010110 4.175V 100110 4.575V 110110 4.975V 000111 3.8V 010111 4.2V 100111 4.6V 110111 5V 001000 3.825V 011000 4.225V 101000 4.625V 111000 5.025V 001001 3.85V 011001 4.25V 101001 4.65V 111001 5.05V 001010 3.875V 011010 4.275V 101010 4.675V 111010 5.075V 001011 3.9V 011011 4.3V 101011 4.7V 111011 5.1V (default) 001100 3.925V 011100 4.325V 101100 4.725V 111100 5.125V 001101 3.95V 011101 4.35V 101101 4.75V 111101 5.15V 001110 3.975V 011110 4.375V 101110 4.775V 111110 5.175V 001111 4V 011111 4.4V 101111 4.8V 111111 5.2V Boost : 3.625 + Boost _CV x 0.025V, Boost max.: 5.2V Define thermal regulation level 00 : 100C TREG_SEL[1:0] 01 : 120C (default) 10 : 135C 11 : 135C Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 29 RT9481 Function Charger Register b[7] Address (MSB) b[5] b[4] b[3] b[2] JEITA Default 1 0 1 1 1 1 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Write WT_PRC (LSB) TMR2X_EN Read/ WT_FC b[0] b[1] Meaning 0X04 Control 4 b[6] EN_TMR Run charge timer in half clock rate during MIVR, AICR and thermal regulation. TMR2X_EN 0 : Disable 2X extended charger timer 1 : Enable 2X extended charger timer (default) JEITA function JEITA 0 : Charging regulation current is ICHG (default) 1 : Charging regulation current is ICHG/2 Define Fast charge Timer. The default time is 20 hours. WT_FC Code Hours Code Hours Code Hours Code Hours 000 6 hours 010 10 hours 100 14 hours 110 18 hours 001 8 hours 011 12 hours 101 16 hours 111 b[5] b[4] b[3] b[2] b[1] 20 hours (default) Define Pre-charge charge Timer 00 : 30mins WT_PRC 01 : 45mins 10 : 60mins (default) 11 : 60mins 0 : Disable internal timer function (default) EN_TMR Function 1 : Enable internal timer function Register b[7] Address (MSB) Meaning Charger Control 5 0X05 Default Read/ Write b[6] MIVR[2:0] IPREC[1:0] b[0] (LSB) EOC[2:0] 1 1 0 0 1 0 1 0 R/W R/W R/W R/W R/W R/W R/W R/W Define VMIVR voltage. The default voltage is 4.7V. Code Voltage Code Voltage Code Voltage Code Voltage 000 Disable 010 4.3V 100 4.5V 110 4.7V (default) 001 4.2V 011 4.4V 101 4.6V 111 4.8V MIVR[2:0] Define Pre-Charge Current 00 : 200mA IPREC[1:0] 01 : 300mA (default) 10 : 400mA 11 : 500mA Define Termination Current (IEOC RSENSE is 10m). The default current is 200mA. Code Current Code 000 Disable 010 001 150mA 011 EOC[2:0] Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 30 Current 200mA (default) 250mA Code Current Code Current 100 300mA 110 500mA 101 400mA 111 600mA is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Register b[7] Address (MSB) b[6] Meaning Charger Control 6 Default 0X06 Read/ Write b[5] b[4] b[3] b[2] ICHG[3:0] b[0] b[1] (LSB) VPREC[3:0] 0 0 0 0 0 1 1 1 R/W R/W R/W R/W R/W R/W R/W R/W Current Code Current 1100 27mV (2.7A) 1101 27mV (2.7A) 1110 27mV (2.7A) 1111 27mV (2.7A) Define charging regulation current. The default current is 7mV (0.7A). Code Current Code Current Code 0100 17mV (1.7A) 1000 7mV 0000 (0.7A) (default) ICHG[3:0] 0001 0010 0011 9.5mV 0101 (0.95A) 12mV 0110 (1.2A) 14.5mV 0111 (1.45A) 19.5mV 1001 (1.95A) 22mV (2.2A) 1010 24.5mV 1011 (2.45A) 27mV (2.7A) 27mV (2.7A) 27mV (2.7A) 27mV (2.7A) External Sensing R : Charge current sense voltage (current equivalent for 10m sense resistor) Define Pre-Charge Threshold. The default voltage is 3V. Code Voltage Code Voltage Code Voltage Code Voltage 0000 2.3V 0100 2.7V 1000 3.1V 1100 3.5V 0001 2.4V 0101 2.8V 1001 3.2V 1101 3.6V 0010 2.5V 0110 2.9V 1010 3.3V 1110 3.7V 0011 2.6V 0111 3V (default) 1011 3.4V 1111 3.8V b[6] b[5] b[4] b[3] b[2] b[1] VPREC[3:0] Function Charger Control 7 Register b[7] Address (MSB) 0X07 b[0] (LSB) Meaning Reversed Reversed Reversed Reversed Reversed Default 0 0 0 0 0 1 1 1 R/W R/W R/W R/W R/W R/W R/W R/W Read/ Write TDEG_EOC EOC de-glitch time TDEG_EOC[2:0] Code Time Code Time Code Time Code Time 000 32s 010 128s 100 4ms 110 16ms 001 64s 011 256s 101 8ms 111 Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 32ms (default is a registered trademark of Richtek Technology Corporation. www.richtek.com 31 RT9481 Function Register b[7] Address (MSB) Meaning Charger Status1 0X08 Default Read/ Write b[6] b[5] UUGPUMP_ VBAT_ CHG_ STAT LVL STAT 0 1 0 R R R b[4] b[0] b[3] b[2] BOOST_ PWR_ STAT Rdy 0 0 0 1 0 R R R R/W R/W CHG_ Done b[1] SWBASE_EN (LSB) SWITCHING _EN UUG pump enable status UUGPUMP_STAT 0 : UUG pump is disable 1 : UUG pump is enable Battery voltage level detect under charging VBAT_LVL 0 : Battert voltage is lower than pre-charge level 1 : Battery voltage is higher than fast-charge level Charging Status CHG_STAT 0 : Charging is not in progress 1 : Charging is in progress Charger Done indication bit CHG_Done 0 : Charging is not done 1 : Charging is done BOOST_STAT 0 : Not in Boost mode 1 : Boost mode Power status bit PWR_Rdy 0 : VBUS > VBUS_OVP or VBUS < VBUS_UVLO or VBUS < ISENSN + VSLP (Power Fault) 1 : VBUS_UVLO < VBUS < VBUS_OVP & VBUS > ISENSN + VSLP (Power Ready) Switching charger base circuit enable SWBASE_EN 0 : Disabled 1 : Enabled Charger/ Boost enable SWITCHING_EN 0 : Charger/ Boost is disabled 1 : Charger/ Boost is enabled Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 32 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Charger Status 2 Register b[7] Address (MSB) b[3] b[2] Reversed Reversed CHRVP_ CHBATOV_ STAT STAT 0 0 0 0 0 R R R R R Default Write b[4] VBUSO TSD_ STAT Read/ b[5] VP_STAT Meaning 0X09 b[6] b[0] b[1] (LSB) CHGGOODA CHGBADAD DP_ STAT P_ STAT 0 1 0 R R R Thermal shutdown fault. Set when the die temperature exceeds thermal shutdown threshold. TSD_STAT 0 : Thermal shutdown is not on going 1 : Thermal shutdown is on going VBUS over voltage protection. Set when VBUS > VIN_OVP is detected. VBUSOVP_STAT 0 : VBUS is not over voltage 1 : VBUS is over voltage Charger fault. Reverse protection fault (VBUS < ISENSN + VSLP) CHRVP_STAT 0 : Reverse protection is not occur 1 : Reverse protection is occur Charger fault. Battery OVP. CHBATOV_STAT 0 : Battery is not OVP 1 : Battery is OVP Good adaptor detection. It is only enabled in the VBUS plug-in. Once it pass the detection, it will always high CHGGOODADP_STAT and enable charging. 0 : Adaptor is not good adaptor 1 : Adaptor is good adaptor Bad adaptor detection. It is used to indicate the adaptor input voltage is lower than 3.8V during the charging CHGBADADP_STAT 0 : Adaptor is not bad adaptor 1 : Adaptor is bad adaptor Function Register b[7] Address (MSB) Meaning Charger Status 3 0X0A Default Read/ Write b[6] b[5] b[4] CHTREG_ CHMIVR_ CHAICR_ CHRCHG_S STAT STAT STAT TAT 0 0 0 R R R b[0] b[3] b[2] b[1] Reversed Reversed Reversed Reversed 0 0 0 0 0 R R/W R/W R/W R/W (LSB) Charger warning. Thermal regulation loop active. CHTREG_STAT 0 : Thermal regulation loop is not active 1 : Thermal regulation loop is active Charger warning. Input voltage MIVR loop active. CHMIVR_STAT 0 : MIVR loop is not active 1 : MIVR loop is active Charger warning. Input current AICR loop active. CHAICR_STAT 0 : AICR loop is not active 1 : AICR loop is active Indicate battery voltage is below re-charge level under charging CHRCHG_STAT 0: Battery voltage higher re-charge level 1 : Battery voltage lower re-charge level Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 33 RT9481 Function CHG_ Register b[7] Address (MSB) b[5] CHRC b[4] CHG_ 0 0 0 R/C R/W R/C R/C b[4] b[3] b[2] b[1] Reversed Reversed Reversed Reversed Reversed 0 0 0 0 R/C R/C R/C R/C CHRCHGI Re-Charge request. CHTMRFI Charger fault. time-out (fault). SOFTSTARTI Charger or Boost soft-start finish The status of CHG_STAT2 register is change CHG_STAT3_ALT The status of CHG_STAT3 register is change Register b[7] Address (MSB) b[6] b[5] BSTVMID CHRC OVPI HGI b[0] (LSB) Meaning BSTTSDI Default 0 0 0 0 0 0 0 0 R/C R/C R/C R/W R/W R/W R/W R/W 0X0C Read/ Write BSTTSDI BSTVMIDOVPI BSTLOWVI Boost fault. Thermal shutdown; auto set OPA_MODE and SWITCHING_EN to low. Boost fault. VMID OVP; auto set OPA_MODE and SWITCHING_EN to low. Boost fault. Battery voltage is too low; auto set OPA_MODE and SWITCHING_EN to low. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 34 Reversed Charge current is lower than EOC current. CHG_STAT2_ALT IRQ RTI Charge terminated. IEOC BST_ (LSB) STAT3_ALT 0 CHTERMI b[0] b[1] CHG_ Default Write b[2] STAT2_ALT IEOC HGI CHTM RFI SOFTSTA CHTER MI Read/ Function b[3] Meaning 0X0B IRQ b[6] is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Register b[7] Address (MSB) Meaning Charger Status 2 0X0D Control Default Read/ Write b[6] b[5] b[4] b[3] b[2] Reversed Reversed TSDI_ VBUSOV CHRVP_ CHBATOV_ STATM P_STATM STATM STATM 0 0 0 0 0 R/W R/W R/W R/W b[4] b[0] b[1] (LSB) CHGGOODA CHGBADAD DP_STATM P_STATM 0 0 0 R/W R/W R/W R/W b[3] b[2] b[1] Reversed Reversed Reversed Reversed Thermal shutdown interrupt mask TSDI_ STATM 0 : Interrupt is not masked 1 : Interrupt is masked VBUS over voltage protection interrupt mask VBUSOVP_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Reverse protection interrupt mask CHRVP_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Battery OVP interrupt mask CHBATOV_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Good adaptor detection interrupt mask CHGGOODADP_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Bad adaptor detection interrupt mask CHGBADADP_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Function Register b[7] Address (MSB) Meaning Charger Status 3 Control 0X0E Default Read/ Write b[6] b[5] CHAICR_ CHGRCHG_ b[0] (LSB) CHTREG_ CHMIVR_ STATM STATM STATM STATM 0 0 0 1 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Thermal regulation loop active interrupt mask CHTREG_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Input voltage MIVR loop active interrupt mask CHMIVR_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Input current AICR loop active interrupt mask CHAICR_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Battery voltage re-charge level interrupt mask CHGRCHG_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 35 RT9481 Function Register b[7] Address (MSB) b[6] b[5] CHRCHG SOFTSTA b[2] CHG_ (LSB) CHG_ IEOCM Default 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W b[4] b[3] b[2] b[1] Reversed Reversed Reversed Reversed Reversed 0X0F Control Read/ Write RTIM Reversed b[0] b[1] CHTERMIM IM CHTMRFIM b[3] Meaning Charger IRQ b[4] STAT2_ALTM STAT3_ALT M Charge terminated interrupt mask CHTERMIM 0 : Interrupt is not masked 1 : Interrupt is masked Charge current is lower than EOC current interrupt mask IEOCM 0 : Interrupt is not masked 1 : Interrupt is masked Charger Re-Charge request interrupt mask CHRCHGIM 0 : Interrupt is not masked 1 : Interrupt is masked CHTMRFI interrupt mask CHTMRFIM 0 : Interrupt is not masked 1 : Interrupt is masked SOFTSTARTI interrupt mask SOFTSTARTIM 0 : Interrupt is not masked 1 : Interrupt is masked CHG_ STAT2_ALT interrupt mask CHG_ STAT2_ALTM 0 : Interrupt is not masked 1 : Interrupt is masked CHG_ STAT3_ALT interrupt mask CHG_ STAT3_ALTM 0 : Interrupt is not masked 1 : Interrupt is masked Function Register b[7] Address (MSB) b[5] BSTVMID BSTLOW OVPIM VIM b[0] (LSB) Meaning BSTTSDIM Default 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Boost IRQ b[6] 0X10 Control Read/ Write Boost fault. Thermal shutdown interrupt mask BSTTSDIM 0 : Interrupt is not masked 1 : Interrupt is masked Boost fault. VMID OVP interrupt mask BSTVMIDOVPIM 0 : Interrupt is not masked 1 : Interrupt is masked Boost fault. Battery voltage is too low interrupt mask BSTLOWVIM 0 : Interrupt is not masked 1 : Interrupt is masked Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 36 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Register of the ADC & LDSW & DCP Control & Adapter Detection & Attach Control & Reset Function Register b[7] Address (MSB) Meaning ADC_ 0X20 CTL Default Read/ Write b[6] b[5] CH_SEL b[4] Reversed b[3] Zero_ Check b[2] b[1] Reversed Reversed b[0] (LSB) ADC_ START 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Code Chanel Code Chanel Code Chanel 010 USBOUT 100 IBAT 110 Reversed 011 TS 101 IUSBOUT 111 Reversed b[3] b[2] b[1] ADC channel selection. Code Chanel CH_SEL 000 VBAT (default) 001 VBUS Zero check Zero_Check 0 : Disable zero check, follow CH_SEL setting (default) 1 : Enable zero check, short ADC + and ADCADC start control ADC_START 0 : Force to stop ADC conversion (default) 1 : Start ADC conversion (auto clear when conversion done) Function Register b[7] Address (MSB) b[6] b[5] Meaning ADC CODEH 0X21 Default Read/ Write ADC_CODEH Function ADC 0 0 0 0 0 0 0 0 R R R R R R R R b[6] b[5] b[4] b[3] b[2] b[1] ADC code high byte Register b[7] Address (MSB) 0X22 b[0] (LSB) ADC_CODEH Meaning CODEL b[4] Default Read/ Write ADC_CODEL ADC_CODEL 0 0 0 0 0 0 0 0 R R R R R R R R ADC code low byte Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 b[0] (LSB) is a registered trademark of Richtek Technology Corporation. www.richtek.com 37 RT9481 Function USBOUT Register b[7] Address (MSB) 0X23 Control b[6] b[5] b[4] b[3] b[1] EN_ DCP EN_ LDSW Default 0 0 0 0 0 1 0 1 R/W R/W R/W R/W R/W R/W R/W R/W Write Reversed b[0] (LSB) Meaning Read/ USBOUTLDI_LVL b[2] LDSW_ TREG[1:0] DCP controller Enable EN_DCP 0 : DCP controller disable (default) 1 : DCP controller enable Load Switch Enable EN_LDSW 0 : Load switch disable (default) 1 : Load switch enable USBOUTLDI_LVL Code Current Code Current 000 Disable 100 50mA 001 NA 101 100mA 010 10mA 110 150mA 011 30mA 111 150mA USBOUTLDI_LVL Thermal regulation level 00 : Disable LDSW_TREG[1:0] 01 : 100C (default) 10 : 120C 11 : 135C Function Register b[7] Address (MSB) Meaning ATTACH Control 0X24 Default Read/ Write b[6] b[5] b[4] b[3] b[2] b[1] USBOUTAT_ b[0] (LSB) EN_ EN_ EN_ ADAPTERDET VBUSAT USBOUTAT 1 1 1 0 1 1 0 0 R/W R/W R/W R/W R/W R/W R/W R/W USBOUTAT_TIME Mode Reversed Adapter type detect enable EN_ADAPTERDET 0 : Adapter detect disable 1 : Adapter detect enable (default) VBUS attach/detach detect enable EN_VBUSAT 0 : VBUS attach/detach detect disable 1 : VBUS attach/detach detect enable (default) USBOUT attach/detach detect enable EN_USBOUTAT 0 : USBOUT attach/detach detect disable 1 : USBOUT attach/detach detect enable (default) USBOUT attach/detach detection time. Code Time Code Time 000 Detection time 150ms 100 Detection time 600ms 001 Detection time 250ms 101 Detection time 700ms 010 Detection time 375ms 110 Detection time 925ms 011 Detection time 475ms 111 Detection time 1125ms USBOUTAT_TIME USBOUT attach detect mode USBOUTAT_Mode 0 : Normal Mode 1 : Power Saving Mode, power save 50% and detection time increase 100% Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 38 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function MISC_ Register b[7] Address (MSB) 0X25 STA1 b[6] b[5] b[3] b[2] Reversed Reversed Reversed b[1] b[0] (LSB) Meaning ADC_ STA Default 0 1 1 0 0 0 0 0 R R R R/W R/W R/W R/W R/W b[5] b[4] b[3] b[2] b[1] VBUS_STAT USBOUT_ STAT VDDAUVP_ LDSW_ STAT STAT Read/ Write ADAPTER_STA b[4] Reversed Reversed ADC status ADC_STA 0 : ADC is idle 1 : ADC conversion is on going VBUS adapter type 00 : SDP with D+ / D- floating ADAPTER_STA 01 : SDP 10 : CDP 11 : DCP Function Register b[7] Address (MSB) Meaning MISC_ STA2 0X26 Default Read/ Write b[6] b[0] (LSB) LDSWREG USBOUTLD _STAT _STAT 0 0 0 0 0 0 0 0 R R R R R R R/W R/W Reversed Reversed Load switch warning. LDSW output current regulation loop active LDSWREG_STAT 0 : LDSW output current regulation loop is not active 1 : LDSW output current regulation loop is active USBOUT light load indicator USBOUTLD_STAT 0 : USBOUT loading > USBOUTLC_LVL or disable 1 : USBOUT loading < USBOUTLC_LVL VBUS connection status VBUS_STAT 0 : VBUS has no adapter connect (VBUS < VBUS_POR) 1 : VBUS has adapter connect (VBUS > UVLO & VBUS > ISENSN + VSLP) USBOUT device connection status USBOUT_STAT 0 : USBOUT has no device connect 1 : USBOUT has device connect VDDA under voltage protect, disable SWCHG, LDSW, DCP Control, Adapter Detection, ADC and TS driver VDDAUVP_STAT when VDDAUVP is occur. 0 : VDDA UVP is not trigger 1 : VDDA UVP is trigger Load switch status LDSW_STAT 0 : Load switch is turn off 1 : Load switch is turn on Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 39 RT9481 Function MISC_ Register b[7] Address (MSB) ADAPTER_ b[5] b[4] LDSW_ SCPI LDSWRDYI 0 0 0 R/C R/C R/C R/W b[1] 0 0 R/C R/C R/C R/C STA2_ALT WDTI ADC conversion done interrupt Adapter detection done interrupt LDSW_SCPI Load switch short current protect interrupt LDSWRDYI Load switch turn on ready MISC_ STA2_ALT WDTI The status of MISC_ STA2_ALT register is change WDT interrupt VMIDSCPI VMID short current protect interrupt, auto set EN_LDSW to 0 VMIDUV PI VMID under voltage protect interrupt, auto set EN_LDSW to 0 Register b[7] Address (MSB) Meaning MISC_ 0X28 PI 0 ADAPTER_DONEI STA2 b[0] (LSB) VMIDUV 0 ADC_DONEI b[1] PI 0 DONEI b[2] VMIDSC Default Write Control MISC_ ADC_ DONEI Read/ Function b[3] Meaning 0X27 IRQ b[6] Default Read/ Write b[6] b[5] b[4] b[3] b[2] b[0] (LSB) LDSWREG_S USBOUTLD VBUS_ USBOUT_S VDDAUVP_ LDSW_ TATM _STATM STATM TATM STATM STATM 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Reversed Reversed LDSWREG_STAT interrupt mask LDSWREG_STATM 0 : Interrupt is not masked 1 : Interrupt is masked USBOUTLD_STAT interrupt mask USBOUTLD_STATM 0 : Interrupt is not masked 1 : Interrupt is masked VBUS_STATI interrupt mask VBUS_STATM 0 : Interrupt is not masked 1 : Interrupt is masked USBOUT_STAT interrupt mask USBOUT_STATM 0 : Interrupt is not masked 1 : Interrupt is masked VDDAUVP_STAT interrupt mask VDDAUVP_STATM 0 : Interrupt is not masked 1 : Interrupt is masked LDSWM_STAT interrupt mask LDSW_STATM 0 : Interrupt is not masked 1 : Interrupt is masked Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 40 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Function Register b[7] Address (MSB) Meaning MISC_ IRQ_ 0X29 Default CTRL Read/ Write b[6] b[5] b[4] b[3] ADC_ ADAPTER_ LDSW_ LDSWR DONEIM DONEIM SCPIM DYIM 0 0 0 0 0 R/W R/W R/W R/W b[5] b[4] b[2] MISC_ b[1] b[0] (LSB) VMIDSC VMIDUV PIM PIM 0 0 0 R/W R/W R/W R/W b[3] b[2] b[1] STA2_ Reversed ALTM ADC_DONEI interrupt mask ADC_DONEIM 0 : Interrupt is not masked 1 : Interrupt is masked ADAPTER_DONEI mask ADAPTER_DONEIM 0 : Interrupt is not masked 1 : Interrupt is masked LDSW_SCPI mask LDSW_SCPIM 0 : Interrupt is not masked 1 : Interrupt is masked LDSWRDYIM mask LDSWRDYIM 0 : Interrupt is not masked 1 : Interrupt is masked MISC_ STA2_ALT mask MISC_ STA2_ALTM 0 : Interrupt is not masked 1 : Interrupt is masked VMIDSCPI mask VMIDSCPIM 0 : Interrupt is not masked 1 : Interrupt is masked VMIDUVPI mask VMIDUVPIM 0 : Interrupt is not masked 1 : Interrupt is masked Function Register b[7] Address (MSB) b[6] Meaning RESET 0X2A Default Read/ Write b[0] (LSB) RESET 0 0 0 0 0 0 0 0 W W W W W W W W Reset control register RESET 0X96 : RESET, reset whole chip include register and circuit 0X3C : REG_RST, reset whole register setting to default only Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 41 RT9481 Function Register b[7] Address (MSB) b[6] b[5] b[4] b[3] b[2] b[1] Reversed Reversed Reversed b[0] (LSB) WDT_ Meaning WDT_ EN Reversed WDT REFR Default 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W W ESH WDT_ 0X2B CTRL Read/ Write WDT enable control WDT_EN 0 : WDT disable (default) 1 : WDT enable Watch Dog Timer, it will reset whole chip when time out 00 : 8 second (default) WDT 01 : 16 second 10 : 32 second 11 : 64 second Watch Dog Timer refresh WDT_REFRESH 0 : No action 1 : Refresh watch dog timer Function LDSW_ ILIM_FUSE Register b[7] Address (MSB) 0X2C Meaning Reversed Reversed Default 0 0 Read R LDSW_ILIM_FUSE Function ILIM_CTRL b[7] Address (MSB) 0X2D Default Read/ Write R b[5] b[4] b[3] b[2] b[1] b[0] (LSB) LDSW_ILIM_FUSE 0 R 0 R 0 0 0 0 R R R R b[2] b[1] Report the fuse setting of LDSW current regulation Register Meaning LDSW_ b[6] b[6] b[5] b[4] LDSW_ILIM_LVL b[3] b[0] (LSB) LDSW_ILIM_CTRL 0 1 1 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W LDSW current regulation LDSW_ILIM_LVL 00 : Min = 1.0A, TYP = 2.0A, MAX = 3.0A 01 : Min = 1.5A, TYP = 2.5A, MAX = 3.5A 10 : Min = 2.0A, TYP = 3.0A, MAX = 4.0A LDSW_ILIM_CTRL LDSW_ILIM_CTRL = LDSW_ILIM_FUSE-[2500-TARGET+(LDSW_ILIM_LVL-1)x567]/35 Target = the target USBOUT current regulation setting, the unit is mA. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 42 is a registered trademark of Richtek Technology Corporation. DS9481-03 April 2016 RT9481 Outline Dimension Symbol D2 E2 Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.950 4.050 0.156 0.159 Option 1 2.400 2.500 0.094 0.098 Option 2 2.650 2.750 0.104 0.108 E 3.950 4.050 0.156 0.159 Option 1 2.400 2.500 0.094 0.098 Option 2 2.650 2.750 0.104 0.108 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 24L QFN 4x4 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS9481-03 April 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 43