TS3310 A True 150-nA IQ, 0.9-3.6VIN, Selectable 1.8-5VOUT Instant-OnTM Boost Converter FEATURES Ultra-Efficient Boost Converter: Active Mode, No-load Supply Current: 150nA Efficiency: Up to 92% Input Voltage Range: 0.9V-3.6V Delivers up to 35mA at 3VSTORE from 1.2VIN Single-inductor, Discontinuous Conduction Mode Operation No External Schottky Diode Required Pin-Selectable Output Voltages: 1.8V, 2.1V, 2.5V, 2.85V, 3V, 3.3V, 4.1V, and 5V User-enabled Secondary Output Load Switch 10-Pin, Low-Profile, 2mm x 2mm TDFN Package APPLICATIONS Coin Cell-Powered Portable Equipment Single Cell Li-ion or Alkaline Powered Equipment Solar or Mechanical Energy Harvesting Wireless Microphones Wireless Remote Sensors RFID Tags Blood Glucose Meters Personal Health-Monitoring Devices ZigBee Radio Enabled Devices Low-Energy Bluetooth Radio Enabled Devices DESCRIPTION The TS3310 is a low power boost switching regulator with an industry leading low quiescent current of 150nA. The 150nA is the actual current consumed from the battery while the output is in regulation. The TS3310’s extremely low power internal circuitry consumes 90nA on average, with periodic switching cycles which service the load occurring at intervals of up to 25 seconds, together yielding the average 150nA. The TS3310 steps up input voltages from 0.9V to 3.6V to eight selectable output voltages ranging from 1.8V to 5V. The TS3310 includes two output options, one being an always-on storage output while the additional output is an output load switch that is designed to supply burst-on loads in a low duty cycle manner. The TS3310 operates in Discontinuous Conduction Mode with an on-time proportional to 1/VIN, thereby limiting the maximum input current by the selection of the inductor value, ensuring the input current does not drag down the input source. The extremely low quiescent current combined with the output load switch make the TS3310 an ideal choice for applications where the load can be periodically powered from the output, while being disconnected from the output storage capacitor when the load is powered off to isolate the load’s leakage current. The TS3310 is fully specified over the -40°C to +85°C temperature range and is available in a low-profile, thermally-enhanced 10-pin 2x2mm TDFN package with an exposed back-side paddle. TYPICAL APPLICATION CIRCUIT 100 Efficiency vs STORE Current IN=1.2V, STORE=3V Circuit B 90 Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN = CSTORE 10µF 1µF CLSW 220pF --- EFFICIENCY - % 80 Circuit A 70 60 50 40 30 20 10 0 0.0001 0.001 0.01 0.1 1 10 100 ISTORE - mA Page 1 © 2014 Silicon Laboratories, Inc. All rights reserved. TS3310 ABSOLUTE MAXIMUM RATINGS IN to GND................................................................... -0.3V to +6.0V STORE to GND .......................................................... -0.3V to +6.0V OUT to GND............................................................... -0.3V to +6.0V LSW to GND .............................................................. -0.3V to +6.0V OUT_ON, S0, S1, S2 to GND .................................... -0.3V to +6.0V VGOOD to GND ......................................................... -0.3V to +6.0V Continuous Power Dissipation (TA = +70°C) 10-Pin TDFN22EP (Derate at 13.48mW/°C above +70°C) 1078mW Operating Temperature Range ................................. -40°C to +85°C Junction Temperature ............................................................+150°C Storage Temperature Range .................................. -65°C to +150°C Lead Temperature (Soldering, 10s)...................................... +300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART MARKING TS3310ITD1022 AAW TS3310ITD1022T CARRIER QUANTITY TAPE & REEL ----- TAPE & REEL 3000 Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges. Page 2 TS3310 Rev. 1.0 TS3310 ELECTRICAL CHARACTERISTICS VIN=1.2V, VOUT_ON=VIN, VPROG is the programmed voltage according to S2, S1, S0 pins set for STORE voltage of 3V unless otherwise specified. TA=-40°C to 85°C. Typical values are at TA=+25°C unless otherwise specified. Please see Note 1. PARAMETER SYMBOL Input Voltage Range CONDITIONS VIN MIN TYP 0.9 UVLO 0.855 Hysteresis 20 MAX UNITS 3.6 V 0.9 V Under Voltage Lock Out STORE Voltage VSTORE ISTORE=50% of ISTORE(MAX), 0.9V<VIN<3.6V, at any VPROG>VIN. TA=+25°C. See Note 2. 0.97 x VPROG VPROG Tempco No-Load Input Current, IQ NMOS PMOS On Resistance LOAD SWITCH NMOS PMOS LOAD SWITCH @ IN. See Note 3. 90 @ STORE. See Note 3. 30 @ IN. See Note 4. 150 TON VIN=1.8V 0.8 x 2/VIN RON NMOS RON PMOS RON LOAD SWITCH RON NMOS RON PMOS RON LOAD SWITCH VSTORE=1.8V 180 2/VIN nA 1.2 x 2/VIN 0.8 1.3 1.1 1.65 1.1 1.65 650 VSTORE=3V µsec Ω mΩ 650 80 90 95 % of target STORE voltage % Hysteresis S0, S1, S2, OUT_ON Input Leakage Current % / °C 500 VVGOOD S0, S1, S2 Input Voltage V I-Floor VSTORE GOOD VOUT_ON Input Voltage 1.03 x VPROG 0.027 Active-Mode Boost Switch On-Time VPROG mV 5 VOUT_ON L Low CMOS Logic Level VOUT_ON H High CMOS Logic Level S0L, S1L, S2L Low CMOS Logic Level S0H, S1H, S2H High CMOS Logic Level 0.2 V 0.6 0.2 V 0.6 5 nA Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = -40°C to +85°C, as specified. Note 2: ISTORE(MAX) is provided as the Maximum Average STORE Current by the graph entitled “Expected Maximum STORE Output Current” in the TS3310 Applications Section. Note 3: VSTORE output is driven above regulation point. No switching is occurring. Note 4: VSTORE=3V. L=100µH. CSTORE=1µF. TS3310 Rev. 1.0 Page 3 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. 100 Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- Efficiency vs STORE Output Current IN=1.2V, STORE=1.8V 100 Circuit B 90 80 EFFICIENCY - % EFFICIENCY - % 60 Circuit A 50 40 30 60 40 30 20 10 10 0 0.0001 0.001 0.01 100 1 10 100 Efficiency vs STORE Output Current IN=2.4V, STORE=3V Efficiency vs STORE Output Current IN=2V, STORE=5V 100 Circuit B 80 Circuit A 50 40 30 70 50 40 30 20 10 10 0.1 ISTORE - mA 1 10 100 Circuit B 60 20 0 0.0001 0.001 0.01 Circuit A 90 60 Page 4 0.1 ISTORE - mA EFFICIENCY - % 70 1 ISTORE - mA 90 80 0.1 Circuit A 50 20 0 0.0001 0.001 0.01 EFFICIENCY - % 70 10 100 Circuit B 90 80 70 Efficiency vs STORE Output Current IN=1.2V, STORE=3V 0 0.0001 0.001 0.01 0.1 1 10 100 ISTORE - mA TS3310 Rev. 1.0 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- 100 Efficiency vs STORE Output Current IN=3V, STORE=5V Circuit B 90 EFFICIENCY - % 80 Circuit A 70 60 50 40 30 20 10 0 0.0001 0.001 0.01 0.1 1 10 100 ISTORE - mA Active-Mode IQ vs Input Voltage with No Load : Circuit B (STORE=1.8V) Active-Mode IQ vs Input Voltage with No Load : Circuit A (STORE=1.8V) 800 800 640 +85°C Active-Mode IQ - nA Active-Mode IQ - nA 640 480 320 160 0 +25°C +85°C +25°C -40°C 1.125 1.350 1.575 Input Voltage - V TS3310 Rev. 1.0 320 160 -40°C 0.900 480 1.800 0 0.900 1.125 1.350 1.575 1.800 Input Voltage - V Page 5 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- 800 800 640 640 Active-Mode IQ - nA Active-Mode IQ - nA Active-Mode IQ vs Input Voltage with No Load : Circuit A (STORE=3V) +85°C 480 320 +25°C 160 0 800 320 -40°C -40°C 0.90 1.32 1.74 2.16 2.58 0 3.00 0.90 1.32 1.74 2.16 2.58 3.00 Input Voltage - V Input Voltage - V Active-Mode IQ vs Input Voltage with No Load : Circuit A (STORE=5V) Active-Mode IQ vs Input Voltage with No Load : Circuit B (STORE=5V) 800 +85°C 640 Active-Mode IQ - nA Active-Mode IQ - nA +25°C 160 640 480 +25°C 320 -40°C 160 480 320 +25°C -40°C 160 2.00 2.25 2.50 2.75 Input Voltage - V Page 6 +85°C 480 +85°C 0 Active-Mode IQ vs Input Voltage with No Load : Circuit B (STORE=3V) 3.00 0 2.00 2.25 2.50 2.75 3.00 Input Voltage - V TS3310 Rev. 1.0 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- 1.25 -40°C +25°C 1.00 0.75 0.50 0.001 0.01 0.1 1 ISTORE - mA 10 Minimum Start-Up Voltage vs STORE Output Current Circuit B with 10Ω Source Resistance (STORE=1.8V) 1.50 +25°C Source Voltage - V Source Voltage - V Minimum Start-Up Voltage vs STORE Output Current Circuit A with 10Ω Source Resistance (STORE=1.8V) 1.50 +85°C 1.30 1.10 -40°C 0.90 0.70 0.001 100 Minimum Start-Up Voltage vs STORE Output Current Circuit A with 10Ω Source Resistance (STORE=3V) 2.00 -40°C +85°C 0.01 0.1 ISTORE - mA 1 10 Minimum Start-Up Voltage vs STORE Output Current Circuit B with 10Ω Source Resistance (STORE=3V) 1.50 +85°C Source Voltage - V Source Voltage - V 1.75 1.50 1.25 +25°C 1.00 +85°C 0.75 0.50 0.001 0.01 TS3310 Rev. 1.0 0.1 1 ISTORE - mA 10 100 1.30 1.10 -40°C +25°C 0.90 0.70 0.001 0.01 0.1 ISTORE - mA 1 10 Page 7 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- Minimum Start-Up Voltage vs STORE Output Current Circuit A with 10Ω Source Resistance (STORE=5V) 3.6 Minimum Start-Up Voltage vs STORE Output Current Circuit B with 10Ω Source Resistance (STORE=5V) 3.0 +25°C 3.0 Source Voltage - V Source Voltage - V 3.3 2.7 2.4 -40°C 2.1 1.5 0.001 0.01 -40°C 2.0 +85°C +85°C +25°C 1.8 2.5 0.1 1 ISTORE - mA 10 1.5 100 0.001 Minimum Start-Up Voltage vs Source Resistance : VSTORE=1.8V Circuit A Circuit B 1.0 0.5 0 5 10 15 Source Resistance - kΩ 20 Source Voltage - V Source Voltage - V 1 10 2.0 1.5 Page 8 0.1 ISTORE - mA Minimum Start-Up Voltage vs Source Resistance : VSTORE=3V 2.0 0 0.01 Circuit A 1.5 Circuit B 1.0 0.5 0 0 5 10 15 20 Source Resistance - kΩ TS3310 Rev. 1.0 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- STORE Output Current - mA 70 Maximum STORE Output Current vs Input Voltage w/ VSTORE ≥ 96% of Target Voltage : Circuit B 11 STORE=1.8V STORE=1.8V 60 50 STORE=5.0V 40 30 0.90 1.42 1.94 2.46 2.98 7 5 STORE=5.0V 3 3.50 STORE=3.0V 0.90 1.42 1.94 2.46 2.98 3.50 Input Voltage - V Input Voltage - V Active-Mode IQ : Circuit A with No-Load VIN=1.2V, STORE=3V Active-Mode IQ : Circuit A with No-Load VIN=3V, STORE=3V IFLOOR 90nA IFLOOR 90nA IPEAK 50mA/DIV 20 9 IPEAK 80mA/DIV STORE Output Current - mA Maximum STORE Output Current vs Input Voltage w/ VSTORE ≥ 96% of Target Voltage : Circuit A 80 STORE=3.0V 5 s/DIV TS3310 Rev. 1.0 10 s/DIV Page 9 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --STORE Load Step Response : Circuit B VIN=1.2V, STORE=3V, ISTORE=3mA IL STORE LSW ISTORE 200mA/DIV 100mV/DIV 2V/DIV 30mA/DIV IL STORE LSW ISTORE 20mA/DIV 100mV/DIV 2V/DIV 3.33mA/DIV STORE Load Step Response : Circuit A VIN=1.2V, STORE=3V, ISTORE=24mA STORE Output Voltage Ripple, Inductor Current, and LSW Voltage : Circuit A VIN=1.2V, STORE=3V, ISTORE(MAX)=35mA STORE 20mV/DIV IL 100mA/DIV LSW 5V/DIV STORE 50mV/DIV IL 100mA/DIV LSW 1V/DIV STORE Output Voltage Ripple, Inductor Current, and LSW Voltage : Circuit A VIN=1.2V, STORE=3V, ISTORE=10mA Page 10 TS3310 Rev. 1.0 TYPICAL PERFORMANCE CHARACTERISTICS TS3310 VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit A Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --Startup : Circuit A with RIN=10Ω VIN=2V, STORE=5V, ISTORE=0.5µA IL STORE LSW 200mA/DIV 1V/DIV 1V/DIV IL STORE LSW 100mA/DIV 5V/DIV 2V/DIV VIN 1V/DIV VIN 2V/DIV Startup : Circuit A with RIN=10Ω VIN=0.9V, STORE=1.8V, ISTORE=0.18µA Startup : Circuit A with RIN=10Ω VIN=1.2V, STORE=1.8V, ISTORE=10mA VIN 1V/DIV VIN 2V/DIV IL STORE LSW 200mA/DIV 1V/DIV 1V/DIV IL STORE LSW 100mA/DIV 5V/DIV 5V/DIV Startup : Circuit A with RIN=10Ω VIN=2V, STORE=5V, ISTORE=10mA TS3310 Rev. 1.0 Page 11 TS3310 TYPICAL PERFORMANCE CHARACTERISTICS VOUT_ON=GND, VVGOOD=GND, COUT=C1=C2=0.1µF, ISTORE=0A, IOUT=0A unless otherwise specified. Values are at TA=25°C unless otherwise specified. Circuit B L 10µH PN: CBC3225T100KR 100µH PN: CBC3225T101KR CIN=CSTORE 10µF 1µF CLSW 220pF --- IL STORE LSW STORE Switch 100mA/DIV 2V/DIV 2V/DIV to GND Circuit A Short STORE to GND for 1msec Recovery : Circuit A VIN=1.2V, STORE=3V, ISTORE=9mA OUT_ON Switched ON : Circuit A with COUT Removed VIN=1.2V, STORE=3V, ISTORE=0.3µA, IOUT=3mA OUT STORE OUT_ON 200mV/DIV 2V/DIV 2V/DIV OUT STORE OUT_ON 200mV/DIV 2V/DIV 2V/DIV IFLOOR 120nA IFLOOR 120nA OUT_ON Switched OFF : Circuit A with COUT Removed VIN=1.2V, STORE=3V, ISTORE=0.3µA, IOUT=3mA Page 12 TS3310 Rev. 1.0 TS3310 PIN FUNCTIONS PIN 1 2 3 4 5 NAME OUT_ON S0 IN S1 S2 6 VGOOD 7 GND 8 LSW 9 STORE 10 Exposed Paddle OUT EP FUNCTION Logic Input. Turns on OUT switch. Logic Input. Sets the regulated voltage at STORE. Boost Input. Connect to input source. Connect Input capacitor, CIN. Logic Input. Sets the regulated voltage at STORE. Logic Input. Sets the regulated voltage at STORE. Open Drain Output. High impedance when STORE>90% of regulation voltage. Ground. Connect this pin to the analog ground plane. Inductor Connection. If using an inductor value ≤22µH, please see Table 3 for recommended CLSW values. Regulated output voltage set by S0, S1, S2 logic. Connect Storage capacitor, CSTORE. Switched Output. For best electrical and thermal performance, connect exposed backside paddle to analog ground plane. BLOCK DIAGRAM TS3310 Rev. 1.0 Page 13 TS3310 THEORY OF OPERATION The TS3310 is a boost switching regulator with an industry leading low quiescent current of 150nA.The 150nA is the actual current consumed from the battery while the output is in regulation. The TS3310’s extremely low power internal circuitry consumes 90nA on average, with periodic switching cycles which service the load occurring at intervals of up to 25 seconds, as displayed in the scope capture entitled “Input Quiescent Current : Circuit A with No-Load” on Page 9. The always-on output voltage at STORE is regulated by a comparator within the Regulation Control block. When a load discharges CSTORE and causes the output voltage to drop below the desired regulated voltage, switching periods are initiated. When the output voltage is at or above the desired regulated voltage, the comparator causes switching periods to stop. Each switching cycle includes an ON period and an OFF period. During the ON period, the NMOS switch turns on to ramp current in the inductor, while during the OFF period, the NMOS switch turns off and the PMOS switch turns on to discharge inductor current into the CSTORE capacitor. When the ON and OFF cycles have completed, the PMOS switch turns off. The TS3310 operates in Discontinuous Conduction Mode (DCM); during any given switching cycle, the inductor current starts at and returns to zero. The switching cycle timing is governed by the Control block, which determines the ON and OFF periods according to the input and output voltages, regardless of the inductor current. The Control block sets the ON period according to: tON = 2µs∙V VIN Equation 1. ON Period Calculation The choice of the inductor value, then, determines the peak switching currents: VIN × tON 2µs∙V Ipk = = L L Equation 2. Peak-Current Calculation The average input current, IIN(AVG), will vary according to the load, since as the load is increased, the time between switching cycles is decreased. However, IIN(AVG) will never exceed IIN(AVG,MAX), the maximum averaged input current, which represents Page 14 the case where switching periods are continuously initiated. Ipk 1µs∙V IIN(AVG,MAX) = = 2 L Equation 3. Maximum Average Input Current Calculation Equation 3 shows that an input current limit can be set by choice of inductor value, set appropriately for the capacity and output impedance of the input source. Maximum available output current is also a function of inductor value for the case where switching cycles are continuously initiated, the expected maximum STORE output current is: ISTORE(MAX) = VIN × IIN(AVG,MAX) × Eff VOUT Equation 4. Expected Maximum STORE Current Calculation The Regulation Controls within the Control block monitor and control the regulation of the STORE output voltage. By strapping a combination of logic input pins (S0-S2) high or low, the STORE output voltage can be one of 8 selectable output voltages. For 5V STORE output operation, a minimum VIN of 2V is required. S2 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 STORE 1.8V 2.5V 3.3V 5.0V 2.1V 2.85V 3.0V 4.1V Table 1. STORE Output Voltage Options The TS3310 provides an additional Instant-On switched OUT output that completely isolates loads from the storage capacitor at the STORE output. The OUT load switch is controlled by the logic input pin OUT_ON. The TS3310 provides an Open-Drain VGOOD output that assumes a high impedance once the STORE output is greater than 90% of the target voltage. TS3310 Rev. 1.0 TS3310 Expected Maximum STORE Output Current 100 Maximum STORE Current - mA The TS3310 comes with an Under Voltage Lockout (UVLO) feature at 0.855V with a 20mV hysteresis. The UVLO feature monitors the input voltage and inhibits the Switching Cycle Controls from initiating switching cycles if the VIN is too low. This ensures no switching currents are drawn from the input to collapse the voltage at the terminals of the battery when the internal resistance of the battery is high. Figure 1 displays the UVLO feature for the TS3310. IN 1V/DIV UVLO : Circuit B with RIN=50Ω VIN=1.2V, STORE=3V, ISTORE=0.3µA 10 VSTORE/VIN = 1 VSTORE/VIN = 2 1 VSTORE/VIN = 3 VSTORE/VIN = 4 0.1 10 100 Inductor Value - µH 1000 LSW 2V/DIV Figure 2. Expected Maximum STORE Output Current with 85% Efficiency vs Inductor Value STORE 2V/DIV Maximum Input Current from Source vs Inductor Value Figure 1. TS3310, UVLO=0.855V APPLICATIONS INFORMATION Inductor Selection When selecting an inductor value, the value should be chosen based on output current requirements. If the input source is a small battery, make sure the choice of the inductor value considers the maximum input current that the source battery can support (based on series resistance). For example, some small button cell batteries can exhibit 5Ω series resistance, therefore a 20mA maximum input current may be appropriate (100mV drop). Consider using a large STORE capacitor to support peak loads for small batteries – see section “Bursted Load with Big Store Buffer Capacitor”. TS3310 Rev. 1.0 Maximum Avg Input Current - mA IL 20mA/DIV 100 10 1 10 100 Inductor Value - µH 1000 Figure 3. IIN(AVG,MAX) vs Inductor Value A low ESR, shielded inductor is recommended. Depending upon the application, the inductor value will vary. For applications with load currents less than a few milliamperes, a 100µH inductor is recommended. As shown in the Efficiency Curves on Pages 4 and 5, the efficiency is greater with a larger inductor value for smaller load currents. Please refer to the two ‘Maximum Store Current vs Input Voltage’ graphs found on Page 9. Circuit A which uses a 10µH inductor is able to source larger load currents than that of Circuit B with a 100µH inductor due to the larger peak currents. Page 15 TS3310 Inductor Current Handling Requirement Peak Inductor Current - mA 1000 CLSW --100pF 220pF Table 3. Recommended CLSW Values 100 10 1 10 100 Inductor Value - µH 1000 Figure 4. Inductor Peak Current vs Inductor Value The chosen inductor’s saturation current for a specific inductor value should be at least 50% greater than the peak inductor current value displayed in Figure 4, entitled ‘Inductor Current Handling Requirements’. Table 2 provides a list of some inductor manufacturers. Inductors Taiyo Yuden www.t-yuden.com Murata www.murata.com Coilcraft www.coilcraft.com Sumida www.sumida.com Table 2. Inductor Manufacturers Tables 4 and 5 show some example inductors for values of 10µH and 100µH that may be used for circuit A or B. The tables include the inductors’ Rdc (inductor series dc resistance or ESR), saturation current, and dimensions. As mentioned previously, the inductor’s saturation current should always be greater than 150% of the peak inductor current; therefore the appropriate size and efficiency (dependent upon ESR) may be chosen based on the application’s requirements. To guarantee maximum output power for 10µH and 22µH operation, a CLSW capacitor should be placed at the LSW pin to ground. Please refer to Table 3 for the recommended CLSW values. A ceramic capacitor with a NPO or COG dielectric is recommended for CLSW with a minimum voltage rating of 50V. Page 16 Inductor Value >22µH 22µH 10µH Inductor Value P/N Inductor Type Rdc Saturation Current (LxWxH) (mm) 10µH CBC20166T100K CBC 2016 0.82 Ω 380mA 2x1.6x1.6 10µH CBC2518T100K CBC 2518 0.36 Ω 480mA 2.5x1.8x1.8 10µH CBC3225T100KR CBC 3225 0.133 Ω 900mA 3.2x2.5x2.5 100µH CB2016T101K CB 2016 4.5 Ω 70mA 2x1.6x1.6 100µH CB2518T101K CB 2518 2.1 Ω 60mA 2.5x1.8x1.8 100µH CBC2518T101K CBC 2518 3.7 Ω 160mA 2.5x1.8x1.8 100µH CBC3225T101KR CBC 3225 1.4 Ω 270mA 3.2x2.5x2.5 Table 4. Taiyo-Yuden Example Inductors Inductor Value P/N Inductor Series Rdc Saturation Current (LxWxH) (mm) 10µH LQH32CN100K33 LQH 32C_33 0.3 Ω 450mA 3.2x2.5x2.0 10µH LQH32CN100K53 LQH 32C_53 0.3 Ω 450mA 3.2x2.5x1.55 10µH LQH43CN100K03 LQH 43C 0.24 Ω 650mA 4.5x3.6x2.6 100µH LQH32CN101K23 LQH 32C_23 3.5 Ω 100mA 3.2x2.5x2.0 100µH LQH32CN101K53 LQH 32C_53 3.5 Ω 100mA 3.2x2.5x1.55 100µH LQH43CN101K03 LQH 43C 2.2 Ω 190mA 4.5x3.6x2.8 Table 5. Murata Example Inductors Input and STORE Capacitor Selection Ceramic capacitors are recommended for CIN and CSTORE, due to ceramics’ extremely low leakage currents (generally limited by very high insulation resistance). Larger value ceramics (10µF or greater) may use high constant dielectric materials, such as X5R and X7R. These materials exhibit a strong voltage coefficient and exhibit substantially lower capacitance than rated when operated near the maximum specified voltage. For these types of capacitors, use a 10V or greater voltage rating. TS3310 Rev. 1.0 TS3310 The STORE voltage output ripple can be reduced by increasing the value of CSTORE. Figure 5 displays the STORE output voltage ripple for two different storage capacitor values. The output voltage ripple reaches a floor value when the internal voltage comparator hysteresis becomes the dominant source of ripple. Below this level, larger capacitance does not help reduce the ripple. STORE Output Voltage Ripple L=10µH, CIN=10µF VIN=1.2V, STORE=3V, ISTORE=0.3µA demands 100mA current when it is powered on. Also in this example, the load continues to consume 10µA of leakage current when off. By attaching the load to OUT when the load isn’t used, the TS3310 isolates the 10µA current so that overall quiescent current can be maintained. A 220µF storage capacitor is used for CSTORE so that it can store the necessary charge to supply the 100mA load current. The microcontroller brings the Instant-On Load Switch, OUT_ON, high when the load needs to be powered on. The TS3310 on average consumes 160nA between load bursts. STORE CSTORE=10µF 100mV/DIV STORE CSTORE=33µF 100mV/DIV To prevent the circuit from overloading the LR44 Coin Cell Battery, a 100µH inductor is used to ensure the TS3310 only draws 10mA of current on average while recharging CSTORE after the load is powered off. After the load has been powered off, the TS3310 recharges the 220µF CSTORE capacitor within 6msec and is ready for the next bursted cycle. Figure 7 displays the load being powered on for a 200µsec period and the recharge of the 220µF CSTORE within 6msec. Figure 5. Output Voltage Ripple Comparison Bursted Load with Big STORE Buffer Capacitor The TS3310 provides a switched OUT output that is capable of sourcing short bursts of large output current by utilizing a large storage capacitor at the STORE output. Figure 6 displays an application circuit that utilizes this functionality. The circuit is powered from a LR44 1.5V Coin Cell Battery. In this example, the load needs to be powered on once every 20 seconds for 200µsec periods. The load requires a 3.3V source and IL STORE OUT OUT_ON 20mA/DIV 200mV/DIV 2V/DIV 5V/DIV Bursted-Load with Big Store Buffer Capacitor L=100µH,COUT=0.1µF CIN=1µF, CSTORE=220µF VIN=1.2V, STORE=3.3V, IOUT=100mA Figure 7. 220µF CSTORE Recovery Scope Capture Figure 6. Bursted Load Application Circuit TS3310 Rev. 1.0 Page 17 TS3310 PACKAGE OUTLINE DRAWING 0.900±0.050 Exp.DAP 2.000±0.050 PIN #1 IDENTIFICATION 0.300±0.050 0.400 Bsc Pin 1 DOT BY MARKING 10L (2x2mm) 1.400±0.050 Exp.DAP 2.000±0.050 0.200±0.050 TOP VIEW BOTTOM VIEW NOTE! · All dimensions in mm. · This part is compliant with JEDEC MO-229 spec A 0.203 Ref 0.000-0.050 A MAX. 0.800 NOM. 0.750 MIN. 0.700 SIDE VIEW Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. 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