TSM9938F Data Sheet

TSM9938F
A 1µA, SOT23 Precision Current-Sense Amplifier
FEATURES
DESCRIPTION
♦ Second-source for MAX9938F
♦ Ultra-Low Supply Current: 1μA
♦ Wide Input Common Mode Range: +1.6V to +28V
♦ Low Input Offset Voltage: 500μV (max)
♦ Low Gain Error: <0.5% (max)
♦ Voltage Output
♦ Gain Option Available:
TSM9938F: Gain = 50V/V
♦ 5-Pin SOT23 Packaging
The
voltage-output
TSM9938F
current-sense
amplifier is electrically and form-factor identical to the
MAX9938F current-sense amplifier. Consuming a
very low 1μA supply current, the TSM9938F high-side
current-sense amplifier exhibits a 500-µV (max) VOS
and a 0.5% (max) gain error, both specifications
optimized for any precision current measurement. For
all high-side current-sensing applications, the
TSM9938F features a wide input common-mode
voltage range from 1.6V to 28V.
APPLICATIONS
Notebook Computers
Power Management Systems
Portable/Battery-Powered Systems
PDAs
Smart Phones
The SOT23 package makes the TSM9938F an ideal
choice for pcb-area-critical, low-current, highaccuracy current-sense applications in all batterypowered portable instruments.
The TSM9938F is specified for operation over the
-40°C to +85°C extended temperature range.
TYPICAL APPLICATION CIRCUIT
Input Offset Voltage Histogram
35
PERCENT OF UNITS - %
30
25
15
15
10
5
0
0
10
20
30
40
50
INPUT OFFSET VOLTAGE - µV
Page 1
© 2014 Silicon Laboratories, Inc. All rights reserved.
TSM9938F
ABSOLUTE MAXIMUM RATINGS
RS+, RS- to GND- .............................................-0.3V to +30V
OUT to GND- ......................................................-0.3V to +6V
RS+ to RS- ..................................................................... ±30V
Short-Circuit Duration: OUT to GND .................... Continuous
Continuous Input Current (Any Pin) ............................ ±20mA
Continuous Power Dissipation (TA = +70°C)
5-Pin SOT23 (Derate at 3.9mW/°C above +70°C).. 312mW
Operating Temperature Range ...................... -40°C to +85°C
Junction Temperature ................................................ +150°C
Storage Temperature Range ....................... -65°C to +150°C
Lead Temperature (Soldering, 10s) ........................... +300°C
Soldering Temperature (Reflow) ............................ +260°C
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and
lifetime.
PACKAGE/ORDERING INFORMATION
ORDER NUMBER PART MARKING CARRIER QUANTITY
TSM9938FEUK+T
TADA
Tape
& Reel
3000
Lead-free Program: Silicon Labs supplies only lead-free packaging.
Consult Silicon Labs for products specified with wider operating temperature ranges.
Page 2
TSM9938F Rev. 1.0
TSM9938F
ELECTRICAL CHARACTERISTICS
VRS+ = VRS- = 3.6V; VSENSE = (VRS+ - VRS-) = 0V; TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C. See Note 1
PARAMETER
SYMBOL
Supply Current (Note 2)
ICC
Common-Mode Input Range
Common-Mode Rejection
Ratio
VCM
Input Offset Voltage (Note 3)
Gain
CMRR
VOS
G
Gain Error (Note 4)
GE
Output Resistance
OUT Low Voltage
OUT High Voltage
ROUT
VOL
VOH
CONDITIONS
VRS+ = 5V, TA = +25°C
VRS+ = 5V, -40°C < TA < +85°C
VRS+ = 28V, TA = +25°C
VRS+ = 28V, -40°C < TA < +85°C
Guaranteed by CMRR , -40°C < TA < +85°C
1.6V < VRS+ < 28V, -40°C < TA < +85°C
MIN
1.1
1.6
94
TA = +25°C
-40°C < TA < +85°C
(Note 5)
Gain = 50
VOH = VRS- - VOUT (Note 6)
TYP
0.5
130
±100
TA = +25°C
-40°C < TA < +85°C
50
±0.1
7.0
MAX
0.85
1.1
1.8
2.5
28
10
3
0.1
UNITS
μA
V
dB
±500
±600
±0.5
±0.6
13.2
30
0.2
μV
V/V
%
kΩ
mV
V
Note 1: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by product
characterization.
Note 2: Extrapolated to VOUT = 0. ICC is the total current into the RS+ and the RS- pins.
Note 3: Input offset voltage VOS is extrapolated from VOUT with VSENSE set to 1mV.
Note 4: Gain error is calculated by applying two values for VSENSE and then calculating the error of the actual slope vs. the
ideal transfer characteristic:
For GAIN = 50, the applied VSENSE is 10mV and 60mV.
Note 5: The device is stable for any capacitive load at VOUT.
Note 6: VOH is the voltage from VRS- to VOUT with VSENSE = 3.6V/GAIN.
TSM9938F Rev. 1.0
Page 3
TSM9938F
TYPICAL PERFORMANCE CHARACTERISTICS
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.
Gain Error Histogram
Input Offset Voltage Histogram
35
30
PERCENT OF UNITS - %
PERCENT OF UNITS - %
30
25
15
15
10
5
0
10
20
30
40
15
10
5
-0.4
50
0
0.2
0.4
GAIN ERROR - %
Supply Current vs Temperature
Input Offset Voltage vs Common-Mode Voltage
40
INPUT OFFSET VOLTAGE - µV
28V
0.8
1.8V
0.6
3.6V
0.4
0.2
35
30
25
20
0
-40
-15
10
35
60
0
85
5
10
15
20
25
30
TEMPERATURE - °C
SUPPLY VOLTAGE - Volt
Input Offset Voltage vs Temperature
Supply Current vs Common-Mode Voltage
1
60
0.8
SUPPLY CURRENT - µA
80
40
20
0
-20
0.6
0.4
0.2
0
-40
-15
10
35
60
TEMPERATURE - °C
Page 4
-0.2
INPUT OFFSET VOLTAGE - µV
1
SUPPLY CURENT - µA
20
0
0
INPUT OFFSET VOLTAGE - µV
25
85
0
5
10
15
20
25
30
SUPPLY VOLTAGE - Volt
TSM9938F Rev. 1.0
TSM9938F
TYPICAL PERFORMANCE CHARACTERISTICS
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.
Gain Error vs. Temperature
Gain Error vs Common-Mode Voltage
0.3
0.5
GAIN ERROR - %
GAIN ERROR - %
0.4
0.2
0.1
0.3
0.2
0.1
0
0
5
10
20
15
25
-0.1
-40
30
60
VOUT vs VSENSE @ Supply = 3.6V
VOUT vs VSENSE @ Supply = 1.6V
1.6
3.5
1.4
3
1.2
2.5
1.0
2
1.5
0.6
0.4
0.5
0.2
50
0
100
0
150
85
0.8
1
0
20
40
60
80
100
VSENSE- mV
VSENSE- mV
Small-Signal Gain vs Frequency
Common-Mode Rejection vs Frequency
0
COMMON-MODE REJECTION - dB
5
0
SMALL-SIGNAL GAIN -dB
35
TEMPERATURE - °C
4
0
10
-15
SUPPLY VOLTAGE - Volt
VOUT - V
VOUT - V
0
-5
-10
-15
-20
-25
-30
-35
0.001 0.01
0.1
1
10
FREQUENCY - kHz
TSM9938F Rev. 1.0
100
1000
-20
-40
-60
-80
-100
-120
-140
0.001 0.01
0.1
1
10
100
1000
FREQUENCY - kHz
Page 5
TSM9938F
TYPICAL PERFORMANCE CHARACTERISTICS
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.
Large-Signal Pulse Response, Gain = 50
VOUT
VOUT
VSENSE
VSENSE
Small-Signal Pulse Response, Gain = 50
200µs/DIV
Page 6
200µs/DIV
TSM9938F Rev. 1.0
TSM9938F
PIN FUNCTIONS
PIN
SOT23
5
4
1, 2
3
LABEL
FUNCTION
RS+
RSGND
OUT
External Sense Resistor Power-Side Connection
External Sense Resistor Load-Side Connection
Ground. Connect this pin to analog ground.
Output Voltage. VOUT is proportional to VSENSE = VRS+ - VRS-
BLOCK DIAGRAMS
DESCRIPTION OF OPERATION
The internal configuration of the TSM9938F – a
unidirectional high-side, current-sense amplifier - is
based on a commonly-used operational amplifier (op
amp) circuit for measuring load currents (in one
direction) in the presence of high-common-mode
voltages. In the general case, a current-sense
amplifier monitors the voltage caused by a load
current through an external sense resistor and
generates an output voltage as a function of that load
current. Referring to the typical application circuit on
Page 1, the inputs of the op-amp-based circuit are
connected across an external RSENSE resistor that
is used to measure load current. At the non-inverting
input of the TSM9938F (the RS- terminal), the applied
voltage is ILOAD X RSENSE. Since the RS- terminal is
the non-inverting input of the internal op amp, op-amp
feedback action forces the inverting input of the
internal op amp to the same potential (ILOAD x
RSENSE). Therefore, the voltage drop across
TSM9938F Rev. 1.0
RSENSE (VSENSE) and the voltage drop across R1 (at
the RS+ terminal) are equal. To minimize any
additional error because of op-amp input bias current
mismatch, both R1s are the same value.
Since the internal p-channel FET’s source is
connected to the inverting input of the internal op
amp and since the voltage drop across R1 is the
same as the external VSENSE, op amp feedback action
drives the gate of the FET such that the FET’s drain
current is equal to:
IDS =
VSENSE
R1
Page 7
TSM9938F
or
ILOAD x RSENSE
IDS =
R1
Since the FET’s drain terminal is connected to
ROUT, the output voltage of the TSM9938F at the
OUT terminal is, therefore;
VOUT = ILOAD x RSENSE x
lists the values for ROUT and R1. The TSM9938F’s
output stage is protected against input overdrive by
use of an output current-limiting circuit of 3mA
(typical) and a 7V internal clamp protection circuit.
Table 1: Internal Gain Setting Resistors (Typical
Values)
ROUT
R1
GAIN (V/V)
50
R1 (Ω)
200
ROUT (Ω)
10k
Part Number
TSM9938F
The current-sense amplifier’s gain accuracy is
therefore the ratio match of ROUT to R1. Table 1
APPLICATIONS INFORMATION
and
Choosing the Sense Resistor
Selecting the optimal value for the external RSENSE
is based on the following criteria and for each
commentary follows:
1) RSENSE Voltage Loss
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
3) Total ILOAD Accuracy
4) Circuit Efficiency and Power Dissipation
5) RSENSE Kelvin Connections
RSENSE =
VOUT (max)
GAIN × ILOAD (max)
where the full-scale VSENSE should be less than
VOUT/GAIN at the application’s minimum RS+
terminal voltage. For best performance with a 3.6V
power supply, RSENSE should be chosen to
generate a VSENSE of 60mV at the full-scale ILOAD
current in each application. For the case where the
minimum power supply voltage is higher than 3.6V,
the full-scale VSENSE above can be increased.
1) RSENSE Voltage Loss
3) Total Load Current Accuracy
For lowest IR voltage loss in RSENSE, the smallest
usable value for RSENSE should be selected.
In the TSM9938F’s linear region where
VOUT < VOUT(max), there are two specifications related
to the circuit’s accuracy: a) the TSM9938F’s input
offset voltage (VOS = 500μV, max) and b) its gain
error (GE(max) = 0.5%). An expression for the
TSM9938F’s total error is given by:
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
As there is no separate power supply pin for the
TSM9938F, the circuit draws its power from the
applied voltage at both its RS+ and RS- terminals.
Therefore, the signal voltage at the OUT terminal is
bounded by the minimum supply voltage applied to
the TSM9938F.
Therefore,
VOUT = [GAIN x (1 ± GE) x VSENSE] ± (GAIN x VOS)
A large value for RSENSE permits the use of smaller
load currents to be measured more accurately
because the effects of offset voltages are less
significant when compared to larger VSENSE voltages.
Due care though should be exercised as
VOUT(max) = VRS+(min) - VSENSE(max) – VOH(max)
Page 8
TSM9938F Rev. 1.0
TSM9938F
previously mentioned with large values of RSENSE.
4) Circuit Efficiency and Power Dissipation
IR losses in RSENSE can be large especially at high
load currents. It is important to select the smallest,
usable RSENSE value to minimize power dissipation
and to keep the physical size of RSENSE small. If
the external RSENSE is allowed to dissipate
significant power, then its inherent temperature
coefficient may alter its design center value, thereby
reducing load current measurement accuracy.
Precisely because the TSM9938F’s input stage was
designed to exhibit a very low input offset voltage,
small RSENSE values can be used to reduce power
dissipation and minimize local hot spots on the pcb.
5) RSENSE Kelvin Connections
For optimal VSENSE accuracy in the presence of large
load currents, parasitic pcb track resistance should
be minimized. Kelvin-sense pcb connections
between RSENSE and the TSM9938F’s RS+ and
RS- terminals are strongly recommended. The
drawing in Figure 1 illustrates the connections
between the current-sense amplifier and the currentsense resistor. The pcb layout should be balanced
and symmetrical to minimize wiring-induced errors.
In addition, the pcb layout for RSENSE should
include good thermal management techniques for
optimal RSENSE power dissipation.
Optional Output Filter Capacitor
If the TSM9938F is part of a signal acquisition
system where its OUT terminal is connected to the
input of an ADC with an internal, switched-capacitor
track-and-hold circuit, the internal track-and-hold’s
sampling capacitor can cause voltage droop at VOUT.
A 22nF to 100nF, good-quality ceramic capacitor
from the OUT terminal to GND should be used to
minimize voltage droop (holding VOUT constant
during the sample interval). Using a capacitor on the
OUT terminal will also reduce the TSM9938F’s
small-signal bandwidth as well as band-limiting
amplifier noise.
Using the TSM9938F in Bidirectional Load
Current Applications
Figure 1: Making PCB Connections to the Sense
Resistor (drawing is not to scale).
In many battery-powered systems, it is oftentimes
necessary to monitor a battery’s discharge and
charge currents. To perform this function, a
bidirectional current-sense amplifier is required. The
circuit illustrated in Figure 2 shows how two
TSM9938Fs can be configured as a bidirectional
current-sense amplifier. As shown in the figure, the
Figure 2: Using Two TSM9938Fs for Bidirectional Load Current Detection
TSM9938F Rev. 1.0
Page 9
TSM9938F
RS+/RS- input pair of TSM9938F #2 is wired
opposite in polarity with respect to the RS+/RSconnections of TSM9938F #1. Current-sense
amplifier #1 therefore measures the discharge
current and current-sense amplifier #2 measures the
charge current. Note that both output voltages are
measured with respect to GND. When the discharge
current is being measured, VOUT1 is active and VOUT2
is zero; for the case where charge current is being
measured, VOUT1 is zero, and VOUT2 is active.
Page 10
PC Board Layout and Power-Supply Bypassing
For optimal circuit performance, the TSM9938F
should be in very close proximity to the external
current-sense resistor and the pcb tracks from
RSENSE to the RS+ and the RS- input terminals of
the TSM9938F should be short and symmetric. Also
recommended are a ground plane and surface
mount resistors and capacitors.
TSM9938F Rev. 1.0
TSM9938F
PACKAGE OUTLINE DRAWING
5-Pin SOT23 Package Outline Drawing
(N.B., Drawings are not to scale)
NOTES:
1. Dimensions and tolerances are as per ANSI Y14.5M, 1982.
2.80 - 3.00
2. Package surface to be matte finish VDI 11~13.
5
3. Die is facing up mold and facing down for trim/form,
ie, reverse trim/form.
0.95 0.950
TYP
4. The foot length measuring is based on the gauge plane method.
5. Dimensions are exclusive of mold flash and gate burr.
2.60 - 3.00
5
1.50 - 1.75
TYP
6. Dimensions are exclusive of solder plating.
7. All dimensions are in mm.
8. This part is compliant with EIAJ spec. and JEDEC MO-178 AA
0.30 - 0.50
9. Lead span/stand off height/coplanarity are considered as special
characteristic.
1.90 Max
10º TYP
1.50 – 1.75
10º TYP
0.09 – 1.45
0.60 – 0.80
0.90 - 1.30
0º- 8º
10º TYP
0.00 - 0.15
10º TYP
0.10 Max
5 0.09 - 0.20
0.25
Gauge Plane
0.30 - 0.55
0.50 – 0.70
0.50 Max
0.30 Min
0.20 Max
0.09 Min
Patent Notice
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Page 11
TSM9938F Rev. 1.0