The Best Networking Memory Gets Better technology innovator complete portfolio Micron® RLDRAM® Memory collaborative partner purpose-built solutions Better Than Ever – RLDRAM 3 Reduced-latency DRAM (RLDRAM®) is a high-performance memory that combines the high density, high bandwidth, and fast SRAM-like random access that networking, image processing, and cache applications need. This well-established memory solution—which beats even leading-edge DDR3 for sustained high bandwidth—is getting better with the introduction of our third-generation RLDRAM memory. Easy Transition to RLDRAM 3 Leveraging RLDRAM 2 and DDR3 features and reusing existing functionality enables simplified PHY development and eases design work. DDR3 I/O Functionality Incorporated • 5 Ways RLDRAM 3 Enables High Sustainable Access Rate 1. Ultra-High Data Rate; Lowest DRAM Random Access Latency 8ns tRC versus 46–52ns on DDR3. SSTL-based I/O Speed bin cadence (1600, 1866, 2133 Mb/s) • AC timing1 • READ training register 2. Multibank WRITE RLDRAM 2 Functionality Incorporated READ-WRITE-READ delay of 1 idle cycle versus 15 or more on DDR3. • • Command protocol SDR addressing with multiplexed/ non-multiplexed options • Free-running differential input and output strobes and QVLD • 1Not all AC timing is the same. RLDRAM 3 leverages DDR3 jitter, skew, slew rates, and derating where applicable. RLDRAM 3 Integration Advantages • JTAG: Valuable for interconnect debug on complex high-density PCBs • 1.0mm Ball Pitch: Simplifies routing for easier board design • Mirror Functionality: Reduces routing complexity for clamshelled designs Enables random READ accesses every 1.0ns. 3. Minimal Bus Turnaround Delay 4. No tFAW, tRRD No idle cycles between cyclic bank accesses versus t FAW of 27 or more cycles on DDR3. 5. Minimum Burst Lengths BL2, BL4, and BL8 allow flexible memory access and full data bus utilization. Micron RLDRAM Memory Feature and Performance Comparison Data Rate tRC RLDRAM 3 RLDRAM 2 DDR4 DDR3 DDR2+/ QDR2+SRAM 400 –2133 Mb/s 350 –1066 Mb/s 1600–3200 Mb/s 600–2133 Mb/s 240–1100 MHz 8ns 15 –20ns 44 –50ns 46–52ns 1.81ns Density 576Mb, 1Gb 288Mb, 576Mb 2Gb – 16Gb 1Gb, 2Gb, 4Gb 18Mb, 36Mb, 72Mb Voltages 1.35V core; 1.2V IO 1.8V core; 1.5 –1.8V IO 1.05V or 1.1V (TBD); 1.2V core and IO 1.5V; 1.35V core and IO 1.8V core; 1.5–1.8V IO x18, x36 x9, x18, x36 x4, x8, x16 x4, x8, x16 x18, x36 Configurations Burst Length Multibank Write Internal Banks 2, 4, 8 2, 4, 8 8 8 DDR2+: 2 QDR2+: 4 Enables 1.0ns READ tRC Not Applicable Not Applicable Not Applicable Not Applicable 16 8 16 8 Not Applicable Delay No delay No delay >28 clock cycles >27 clock cycles Not Applicable Bus Turnaround Delay (RD-WR-RD) 1–2 clock cycles 1–2 clock cycles >17 clock cycles >15 clock cycles DDR2+: 2–3 QDR2+: 0 Available Not Available Available Available Not Available tFAW RESET Pin Longevity for RLDRAM 2 We’re transitioning our RLDRAM 2 devices to a more advanced 50nm process technology node. For customers, this means lower power consumption and an upgrade (for the 288Mb device) to 1066 Mb/s and 15ns tRC. It also means we’ll be able to support RLDRAM 2 memory for the long term, with production planned for years to come. Partner Ecosystem Micron is reinforcing and expanding current relationships with Preferred Partners and key enablers in the networking industry. Achronix Altera Applied Micro Broadcom Cavium Dolphin Freescale LSI Logic micron.com Products are warranted only to meet Micron’s production data sheet specifications. Products and specifications are subject to change without notice. Dates are estimates only. Micron and the Micron logo are trademarks and RLDRAM is a registered trademark of Micron Technology, Inc. All other trademarks are the property of their respective owners. ©2007 Micron Technology, Inc. All rights reserved. 08/14 EN.L Marvell Open Silicon Northwest Logic PMC-Sierra Tabula Tilera Xilinx