EVAL-AD7887SDZ User Guide UG-674 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD7887 12-Bit, Analog-to-Digital Converter FEATURES ADDITIONAL EQUIPMENT NEEDED Full featured evaluation board for the AD7887 On-board power supplies Standalone capability System demonstration platform (SDP) compatible (EVAL-SDP-CB1Z) PC software for control and data analysis (download from product page) EVAL-SDP-CB1Z system demonstration platform PC running Windows XP SP2, Windows Vista, or Windows 7 with USB 2.0 port Signal source USB cable SMB cable EVALUATION BOARD DESCRIPTION ONLINE RESOURCES The EVAL-AD7887SDZ is a full featured evaluation board designed to allow easy evaluation of all the features of the AD7887 analog-to-digital converter (ADC). The evaluation board can be controlled via the SDP connector (J20). The SDP board (EVALSDP-CB1Z) allows the evaluation board to be controlled through the USB port of a PC using the software available for download from the EVAL-AD7887SDZ product page. Documents needed AD7887 data sheet EVAL-AD7887SDZ user guide Required software EVAL-AD7887SDZ evaluation software Design and integration files Schematics, layout files, bill of materials The EVAL-AD7887SDZ software provides dynamic performance analysis in the form of waveform graphs, histograms, and FFT analysis for ADC performance evaluation. EVALUATION KIT CONTENTS EVAL-AD7887SDZ evaluation board Evaluation software CD for the AD7887 Mains power supply adapter Screw/nut kit On-board components include: the AD8033 and the AD8034 FastFET high speed precision rail-to-rail op amps, the ADP3303 high accuracy 200 mA low dropout linear regulator, and the AD780 2.5 V/3.0 V ultrahigh precision band gap voltage reference. EVAL-AD7887SDZ FUNCTIONAL BLOCK DIAGRAM AIN0 ADSP-BF527 DSP DIN AIN0 AIN1 CS DOUT AD7887 LK3 AIN1 SCLK VDD AVDD AGND EXTERNAL REFERENCE B LK6 A UNIPOLAR OUT BIPOLAR IN BIAS UP ON-BOARD POWER SUPPLY DC JACK 12142-001 SDP BOARD Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 27 UG-674 EVAL-AD7887SDZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Evaluation Board Software ...............................................................8 Online Resources .............................................................................. 1 Software Installation .....................................................................8 Evaluation Kit Contents ................................................................... 1 Launching the Software ............................................................. 10 Additional Equipment Needed ....................................................... 1 Description of Main Window ................................................... 11 Evaluation Board Description......................................................... 1 Waveform Capture ..................................................................... 12 EVAL-AD7887SDZ Functional Block Diagram ........................... 1 AC Testing—Histogram ............................................................ 13 Revision History ............................................................................... 2 DC Testing—Histogram ............................................................ 13 Quick Start Guide ............................................................................. 3 AC Testing—FFT Capture ........................................................ 14 Evaluation Board Hardware ............................................................ 4 Summary Tab .............................................................................. 15 Device Description ....................................................................... 4 Saving Files .................................................................................. 16 Hardware Link Options ............................................................... 4 Opening Files .............................................................................. 16 Power Supplies .............................................................................. 4 Evaluation Board Schematics and Artwork ................................ 17 Sockets/Connectors...................................................................... 6 Test Points ...................................................................................... 6 Basic Hardware Setup .................................................................. 7 REVISION HISTORY 9/14—Revision 0: Initial Version Rev. 0 | Page 2 of 27 EVAL-AD7887SDZ User Guide UG-674 QUICK START GUIDE 4. Follow these steps to quickly evaluate the AD7887 ADC: 2. 3. Install the evaluation software from the AD7887 product page. Ensure that the EVAL-SDP-CB1Z board is disconnected from the USB port of the PC while installing the software. The PC may need to be restarted after the installation. Ensure that the various link options are configured as described in Table 2. Connect the EVAL-SDP-CB1Z board to the EVALAD7887SDZ evaluation board as shown in Figure 2. Screw the two boards together using the enclosed nylon screw/nut set to ensure that the boards connect firmly together. 5. 6. 7. 12142-002 1. Connect the power supply adapter included in the evaluation kit to Connecter J1 on the evaluation board. Connect the EVAL-SDP-CB1Z board to the PC via the USB cable. For Windows® XP, you may need to search for the EVAL-SDP-CB1Z drivers. Choose to automatically search for the drivers for the EVAL-SDP-CB1Z board if prompted by the operating system. Launch the evaluation software from the Analog Devices subfolder in the Programs menu. Connect an input signal via either the AIN0 or AIN1 single-ended input. Figure 2. EVAL-AD7887SDZ Evaluation Board (Left) Connected to the EVAL-SDP-CB1Z SDP Board (Right) Rev. 0 | Page 3 of 27 UG-674 EVAL-AD7887SDZ User Guide EVALUATION BOARD HARDWARE DEVICE DESCRIPTION The AD7887 ADC is a 12-bit, low power, successive approximation ADC. It operates from a single 2.7 V to 5.25 V power supply and is capable of achieving a throughput rate of 125 kSPS. The input track-and-hold acquires a signal in 500 ns and features a single-ended sampling scheme. The output coding for the AD7887 is straight binary, and the device is capable of converting full power signals up to 2.5 MHz. Full data on the AD7887 is available in the AD7887 data sheet, which must be consulted in conjunction with this user guide when using the evaluation board. Full details on the EVALSDP-CB1Z are available at the controller board product page. HARDWARE LINK OPTIONS The functions of the link options are described in Table 2. The default setup is configured to operate the board with the main power supply adapter and to interface to the EVAL-SDP-CB1Z board. POWER SUPPLIES Take care before applying power and signals to the evaluation board to ensure that all link positions are set according to the required operating mode. See Table 2 for the complete list of link options. The EVAL-AD7887SDZ evaluation board is supplied with a wall mountable switching power supply that provides 7 V dc output. Connect the supply to a 100 V to 240 V ac wall outlet at 50 Hz to 60 Hz. The output from the supply is provided through a 2.0 mm inner diameter jack that connects to the evaluation board at J702. The 7 V supply is connected to the on-board, 5 V linear regulator that supplies the correct bias to each of the various sections on the evaluation board and on the EVALSDP-CB1Z board. When using the EVAL-AD7887SDZ evaluation board with the EVAL-SDP-CB1Z board, power the EVAL-AD7887SDZ board through the J702 connector. If the evaluation board is used without the 7 V adapter, an external power supply in the range of 2.7 V to 5.25 V must be connected to the AVDD input to supply the AD7887 VDD pin. In addition, an external supply in the range of ±5 V to ±24 V must be connected to the VDD, VSS, and AGND of the J100 connector, and LK101 and LK102 must be set in accordance with Table 2, to drive the input buffer amplifiers and reference buffer amplifier. Each supply is decoupled on this board using 10 µF tantalum and 100 nF multilayer ceramic capacitors. Table 1. External Power Supplies Required Power Supply DC Jack Voltage Range 7 V to 9 V ± 5% AVDD VDD/VSS SDP 2.7 V to 5.25 V ±5 V to ±24 V 3.3 V ± 5% Rev. 0 | Page 4 of 27 Description Supplies power to on-board power management devices Analog supply rail Amplifier supply rail Digital supply rail with EVALSDP-CB1Z connected EVAL-AD7887SDZ User Guide UG-674 Table 2. Link Options Link LK1 Default Position A LK2 B LK3 B LK4 Not inserted LK5 A LK6 Not inserted LK7 Not inserted LK8 Not inserted LK101 A LK102 A LK701 A Function This link is used to select the input to AIN0. In Position A, the input is connected to the SMB connector J1. In Position B, the input is connected to AGND. This link is used to select the input to AIN1. In Position A, the input is connected to the SMB connector J2. In Position B, the input is connected to AGND. This link is used to select the input to the AIN1/VREF pin for the AD7887. In Position A, the pin is connected to the buffered AIN1 input. In Position B, VREF is supplied by the AD780 external reference. In Position C, VREF is supplied by the J3 connector. In Position D, VREF is tied to AVDD. This link is used to select the output voltage of the AD780 external reference. Inserted: output select is connected to AGND, and VOUT is 3 V. Not inserted: output select is floating, and VOUT is 2.5 V. This link is used to select the biasing level for VBIASED. In Position A, the VIN input to connector J4 is dc biased around VREF/2. In Position B, the VIN input to connector J4 is dc biased around AVDD/2. Adds a 51 Ω termination resistor to AGND at VIN. Inserted: 51 Ω termination on the VIN input. Not inserted: no 51 Ω termination on the VIN input. Adds a 51 Ω termination resistor to AGND at AIN1. Inserted: 51 Ω termination on the AIN1 input. Not inserted: no 51 Ω termination on the AIN1 input. Adds a 51 Ω termination resistor to AGND at AIN0. Inserted: 51 Ω termination on the AIN0 input. Not inserted: no 51 Ω termination on the AIN0 input. This link is used to select either the on-board or external amplifier negative supply. In Position A, the on-board generated −12 V supply is used for VSS. In Position B, the externally supplied VSS to Connector J100 is used. This link is used to select either the on-board or external amplifier positive supply. In Position A, the on-board generated +12 V supply is used for VDD. In Position B, the externally supplied VDD to Connector J100 is used. This link is used to select either the on-board or external AVDD supply. In Position A, the on-board generated +5 V supply is used for AVDD. In Position B, the externally supplied AVDD to Connector J703 is used. Rev. 0 | Page 5 of 27 UG-674 EVAL-AD7887SDZ User Guide SOCKETS/CONNECTORS TEST POINTS The connectors and sockets on the EVAL-AD7887SDZ are outlined in Table 3. There are numerous test points on the EVAL-AD7887SDZ board. These test points provide easy access to the signals from the evaluation board for probing, evaluation, and debugging. Table 3. On-Board Connectors Connector J1 J2 J3 J4 J5 J20 J100 J702 J703 Function AIN0 analog input signal AIN1 analog input signal External reference voltage connector VIN analog input signal to bias up circuit VBIASED analog output from bias up circuit 120-way connector for EVAL-SDP-CB1Z interface External VDD, GND, and VSS power connector 7 V, 2.0 mm dc jack connector External AVDD and AGND power connector It is also possible to communicate with the AD7887 device via the test points to operate the evaluation board in standalone mode without the need for the EVAL-SDP-CB1Z board. The default interface to this evaluation board is via the 120-way connector, which connects the EVAL-AD7887SDZ to the EVAL-SDP-CB1Z board. Rev. 0 | Page 6 of 27 EVAL-AD7887SDZ User Guide UG-674 BASIC HARDWARE SETUP The EVAL-AD7887SDZ connects to the EVAL-SDP-CB1Z system demonstration platform board. The EVAL-SDP-CB1Z board is the controller board, which is the communication link between the PC and the main evaluation board using the bundled software. The latest software is available for download from the AD7887 product page. Before connecting power, connect the EVAL-AD7887SDZ to Connector A on the EVAL-SDP-CB1Z board. A nylon screw/nut set is included in the evaluation kit to firmly connect the evaluation board and the EVAL-SDP-CB1Z boards together. Figure 2 shows a photograph of the connections between the EVAL-AD7887SDZ daughter board and the EVAL-SDP-CB1Z board. After the evaluation board and the EVAL-SDP-CB1Z board are connected securely, connect the power to the evaluation board. The evaluation board requires an external power supply adapter, which is included in the evaluation board kit. Connect this power supply to Connector J1 on the evaluation board. For further details on the required power supply connections and options, see the Power Supplies section. The analog input range to the AD7887 device is 0 V to VREF, and this range must not be exceeded. When using the on-chip reference, VREF is 2.5 V. An input signal in the range of 2.5 V p-p must be connected to the evaluation board via either of the analog input connectors, AIN0 or AIN1. When using the AIN1 channel, the on-chip reference must be used. If an input signal is a bipolar input, it must be connected to VIN, the J4 connector. This signal is biased to VREF/2 via the bias up circuitry on the EVAL-AD7887SDZ. The signal source must be a low impedance source. The signal must then be connected to any unipolar analog input by connecting VBIASED, the J5 connector, to any connector (J1 or J2). The on-board unity-gain amplifiers buffer the signal to the ADC, which is the default configuration on the evaluation board. Ensure that the link options are in the default positions, as shown in Table 2. Before connecting the EVAL-SDP-CB1Z board to your PC, ensure that the evaluation software has been installed. The full software installation procedure is detailed in the Evaluation Board Software section. Finally, connect the EVAL-SDP-CB1Z board to the PC via the USB cable enclosed in the EVAL-SDP-CB1Z kit. If using a Windows XP platform, you may need to search for the EVALSDP-CB1Z drivers. Choose to automatically search for the drivers for the EVAL-SDP-CB1Z board if prompted by the operating system. Directly connect a unipolar signal to either analog input via Connector J1 and/or Connector J2. On-board unity-gain amplifiers buffer the signal to the AD7887. Rev. 0 | Page 7 of 27 UG-674 EVAL-AD7887SDZ User Guide EVALUATION BOARD SOFTWARE SOFTWARE INSTALLATION The EVAL-AD7887SDZ kit includes the evaluation software on a CD; the software is also available for download from the AD7887 product page. 1. 2. 3. 4. 5. 6. Start the Windows operating system and download the evaluation software from the AD7887 product page. Unzip the downloaded file. Double-click the setup.exe file to run the install. The default location for the software is C:\Program Files\Analog Devices\AD7887\. Power up the evaluation board as described in the Power Supplies section. Connect the evaluation board and the EVAL-SDP-CB1Z board to the USB port of the PC to ensure that the evaluation system is correctly recognized when connected to the PC. When the software detects the evaluation board, proceed through the dialog boxes that appear to finalize the installation. 12142-004 Take the following steps to install the software: Figure 4. Evaluation Software Installation—Destination Directory 2. Select the installation directory. Click Next >>. There are two parts to the installation: EVAL-AD7887SDZ evaluation software installation EVAL-SDP-CB1Z system demonstration platform board drivers installation Figure 5. Evaluation Software Installation—Start Installation 3. Click Next >> to install the software. 12142-003 Follow Step 1 to Step 4 (see Figure 3 to Figure 6) to install the evaluation board software. Follow Step 5 to Step 8 (see Figure 7 to Figure 10) to install the EVAL-SDP-CB1Z drivers. Proceed through all of the installation steps, allowing the software and drivers to be placed in the appropriate locations. Connect the EVAL-SDP-CB1Z board to the PC only after the software and drivers have been installed. 12142-005 • • Figure 3. Evaluation Software Installation—User Account Control Click Yes to begin the installation process. 12142-006 1. Figure 6. Evaluation Software Installation—Installation Complete 4. Rev. 0 | Page 8 of 27 The installation of the evaluation software completes. Click Next to proceed with the installation of the SDP drivers. UG-674 12142-007 12142-010 EVAL-AD7887SDZ User Guide Figure 10. EVAL-SDP-CB1Z Drivers Installation—Complete Figure 7. EVAL-SDP-CB1Z Drivers Installation—Setup Wizard 5. The ADI SDP Drivers Setup Wizard opens. Click Next > to begin the driver installation process. 8. Click Finish. After the evaluation software installation is complete, connect the EVAL-AD7887SDZ board to the EVAL-SDP-CB1Z board, as described in the Evaluation Board Hardware section. When you first plug in the EVAL-SDP-CB1Z board via the USB cable provided, allow the Found Hardware Wizard to run. After the drivers are installed, check that the board is connected correctly by looking at the Device Manager of the PC. The Device Manager can be found by right-clicking My Computer > Manage > Device Manager from the list of System Tools. 12142-008 The EVAL-SDP-CB1Z SDP-B board appears under ADI Development Tools, as shown in Figure 11. Figure 8. EVAL-SDP-CB1Z Drivers Installation—Choose Install Location Select a destination folder for the SDP drivers, and click Install. 12142-011 6. 12142-009 Figure 11. Device Manager Figure 9. EVAL-SDP-CB1Z Drivers Installation—Windows Security 7. Click Install to proceed with the installation. Rev. 0 | Page 9 of 27 UG-674 EVAL-AD7887SDZ User Guide LAUNCHING THE SOFTWARE After the evaluation board and EVAL-SDP-CB1Z board are correctly connected to your PC, the EVAL-AD7887SDZ software can be launched. From the Start menu, click Programs > Analog Devices > AD7887. The main window of the software then opens (see Figure 13). 12142-012 If the evaluation board is not connected to the USB port via the EVAL-SDP-CB1Z when the software is launched, a connectivity error displays (see Figure 12). Connect the EVAL-AD7887SDZ to the USB port of the PC, wait a few seconds, click Rescan, and follow the instructions. 12142-013 Figure 12. Connectivity Error Alert Figure 13. EVAL-AD7887SDZ Software Main Window Rev. 0 | Page 10 of 27 EVAL-AD7887SDZ User Guide UG-674 DESCRIPTION OF MAIN WINDOW Control Buttons, Drop-Down Boxes, and Indicators The following tools allow user control of the different chart displays. When the software is launched, the main EVALAD7887SDZ software window opens (see Figure 13). The Configure, Waveform, Histogram, FFT, and Summary tabs, Label 2 in Figure 13, control what tab is displayed. In each of these tabs, device configuration and data analysis results can be set and viewed, respectively. The main evaluation software window, as shown in Figure 13, has the following features: • • • • Menu bar Control buttons Configuration display Data capture display The Samples drop-down menu, Label 4 in Figure 13, configures how many samples are taken on each capture. In dual channel mode, this is the total number of samples acquired; therefore, each channel acquires half the total number. Menu Bar The menu bar, Label 1 in Figure 13, consists of the File, Edit, and Help menus. File Menu • • • • Open. Loads previously captured data in comma separated values (CSV) format for analysis. Save Data. Saves captured data in CSV format for future analysis. Save Picture. Saves captured data images as a JPEG file. Exit. Exits the program. Edit Menu • The Analysis drop-down menu, Label 3 in Figure 13, controls whether analysis is carried out on data on Channel 0 or Channel 1 when operating in dual-channel mode. Reinitialize to default. Places the evaluation board in a known default state. The capture buttons, Label 5 (Single Capture) and Label 6 (Continuous Capture) in Figure 13, select whether to acquire one set of samples or to acquire samples until told to stop. Throughput, Label 9 in Figure 13, is used to select the rate of data capture by the ADC, up to a maximum of 125 kSPS. Voltage Span, Label 10 in Figure 13, sets the maximum input signal peak-to-peak range, for data analysis. This value must always match the value of VREF. Power Mode, Label 11 in Figure 13, is used to select between Mode 1, Mode 2 (normal), and Mode 3. Refer to the Modes of Operation section of the AD7887 data sheet for further information. When operating in Mode 1 or Mode 3, the software switches the device to Mode 2 for conversions. Help Menu Configuration Buttons • • • There are two configuration buttons, for configuring the control register, contained within the block diagram under the Configure tab. Clicking the blue icon shown in Figure 14 produces dialog boxes that allow you to configure the respective section of the block diagram. User Guide. Opens the evaluation kit user guide. Context Help. Turns on context sensitive help. Analog.com. Links to the Analog Devices, Inc., website. Figure 14. Configuration Button The two buttons, Label 7 and Label 8 in Figure 13, control whether single- or dual-channel operation is desired, which channel must be read first, and whether the on-board reference is enabled or disabled. Refer to the AD7887 data sheet for details on available configuration options. Rev. 0 | Page 11 of 27 UG-674 EVAL-AD7887SDZ User Guide WAVEFORM CAPTURE Data Capture Display Figure 16 shows the Waveform tab, which is used for waveform capture. Four tabs display the conversion data in different formats: Waveform, Histogram, FFT, and Summary. The waveform analysis reports the amplitudes recorded from the captured signal as well as the frequency of the signal tone. The analysis report is generated for the channel selected via the Analysis drop-down menu (see Label 1 in Figure 16). All enabled channels are shown in the waveform plot. The tools shown in Figure 15 allow user control of the different chart displays within the four tabs. 2 3 1. USED FOR CONTROLLING THE CURSOR IF PRESENT. 2. USED FOR ZOOMING IN AND OUT. 3. USED FOR PLANNING. 12142-014 1 12142-015 Figure 15. Chart Tools Figure 16. Waveform Capture Tab Rev. 0 | Page 12 of 27 UG-674 12142-016 EVAL-AD7887SDZ User Guide Figure 17. Histogram Capture Tab AC TESTING—HISTOGRAM DC TESTING—HISTOGRAM Figure 17 shows the Histogram capture tab. The histogram shows the ADC code distribution for the ac input, computes the mean and standard deviation (or transition noise) of the converter, and displays the results. The histogram is more commonly used for dc testing. Similar to ac testing, the histogram shows the ADC code distribution for the dc input, computes the mean and standard deviation (or transition noise) of the converter, and displays the results. Raw data is captured and passed to the PC for statistical computations. To perform a histogram test, select the Histogram tab in the EVAL-AD7887SDZ software main window and click Single Capture or Continuous Capture (Label 1 in Figure 17). Raw data is captured and passed to the PC for statistical computations. To perform a histogram test, select the Histogram tab in the EVAL-AD7887SDZ software main window and click Single Capture or Continuous Capture (Label 1 in Figure 17). Note that an ac histogram requires a quality signal source applied to the input VIN connector or the AIN0 connector. Rev. 0 | Page 13 of 27 EVAL-AD7887SDZ User Guide 12142-017 UG-674 Figure 18. FFT Capture Tab AC TESTING—FFT CAPTURE Figure 18 shows the FFT capture tab. The FFT tests the traditional ac characteristics of the converter and displays a fast Fourier transform (FFT) of the results. As in the histogram test, raw data is captured and passed to the PC, where the FFT is performed, displaying the signal-to-noise ratio (SNR), signal-to-noise-anddistortion (SINAD), and total harmonic distortion (THD.) To perform an ac test, apply either a bipolar sinusoidal signal to the evaluation board at the VIN input, J4, then connect the VBIASED connector, J5, to the AIN0 or AIN1 connector, J1 or J2, respectively; or apply a unipolar sinusoidal signal directly to either of these channel connectors. Low distortion, better than 115 dB, is required to allow true evaluation of the device. One possibility is to filter the input signal from the ac source. There is no suggested band-pass filter, but consideration must be taken in the choice of filter. The optional, on-board, antialias filtering can be implemented by populating the RC filters connected to the noninverting inputs of channel buffers. Figure 18 displays the spectral analysis results of the captured data. • • • Rev. 0 | Page 14 of 27 The plot is the FFT image of the analysis channel selected. The FFT Analysis panel displays the performance data: SNR, THD, SINAD, Dynamic Range, and noise performance along with the input signal characteristics. See Label 1 in Figure 18. Click Show Harmonic Content to switch the panel to display the frequency and amplitude of the fundamental in addition to the second harmonics to the fifth harmonics. See Label 2 in Figure 18. UG-674 12142-018 EVAL-AD7887SDZ User Guide Figure 19. Summary Tab SUMMARY TAB Figure 19 shows the Summary tab. This tab captures and displays all of the information in one panel with a synopsis of the information, including key performance parameters, such as SNR and THD, Label 1 and Label 2, respectively. Waveform, histogram, and FFT plots are also displayed in summary format. Rev. 0 | Page 15 of 27 UG-674 EVAL-AD7887SDZ User Guide SAVING FILES OPENING FILES The software can save the current captured data for future analysis. The software can capture the current plot images and the current device configuration, as well as the raw waveform data, histogram data, and ac spectrum data. Loading Captured Data Saving Data To save data, go to the File menu and click Save Data. This action saves the raw data captured as seen in the Waveform tab. The software can load previously captured data for analysis. Go to the File menu, click Open, and select Waveform Data. The waveform data is a raw data capture that rebuilds the histogram and ac spectrum analyses upon being loaded into the evaluation platform. 12142-019 When Waveform Data is selected, the open dialog box in Figure 22 opens for loading an appropriate file. The evaluation software expects that a previously generated waveform file is in CSV format. 12142-021 Figure 20. Save As Data Dialog Box Saving Plot Images To save plot images, go to the desired analysis tab, click the File menu, and then click Save Picture. The images are saved in JPEG format and do not contain any raw data information. Saved plots cannot be loaded back into the evaluation environment. 12142-020 Figure 21 shows the Save As image dialog box. Save the images to an appropriate location. Figure 21. Save As Image Dialog Box Rev. 0 | Page 16 of 27 Figure 22. Open File Dialog Box Rev. 0 | Page 17 of 27 C126 D102 SGND BZ T52 E C Q101 VDD_VSS_EN 63R4 470 R B R102 R807 1uF 5.5mR V_IN Figure 23. EVAL-AD7887SDZ Schematic Page 1 150 k C112 SGND R114 71k5 Join at U100.4 SGND D101 B0540 W -7-F 1 R118 1uF 5.5mR C108 12V divider 1uF C124 C116 15uH L101 1uF 8k25 10pF U100 ADP1613 ARMZ 1 8 COMP SS 2 7 FREQ FB 3 6 EN VIN 5 SW GND 4 4 C111 1uF 9mR C114 R113 C110 6.8nF 1uF 9mR C113 C109 1uF 9mR R100 V_5V1_DIODE 1uF 9mR C115 15uH L102 2 1 2 1 3 4 3 2 3 Q100 SI2304 DDS-T1-GE3 1uF 9mR C101 D100 B0540 W -7-F 1uF 11mR C117 -12/-15V 1uF 11mR C100 + 12/15V L104 2R2 2 1.0uH 60mR 1 R104 8R2 R105 L103 2R2 2 1.0uH 60mR 1 R106 8R2 R107 14R R103 C107 10uF 14mR 10uF 14mR C118 C102 10uF 14mR C103 C119 10uF 14mR C104 VDD J100 -3 J100 -2 J100 -1 10uF 14mR VSS 10uF 14mR C120 VDD GND VSS 10uF 14mR C121 10uF 14mR LK10 2 LK10 1 B A B A 14R +12V -12V 12142-022 R117 EVAL-AD7887SDZ User Guide UG-674 EVALUATION BOARD SCHEMATICS AND ARTWORK UG-674 EVAL-AD7887SDZ User Guide 12142-023 Figure 24. EVAL-AD7887SDZ Schematic Page 2 Rev. 0 | Page 18 of 27 Rev. 0 | Page 19 of 27 DOUT_SW CS_SW DIN_SW SCLK_SW AVDD 0.1uF C7 Figure 25. EVAL-AD7887SDZ Schematic Page 3 EN A8 A7 A6 A5 A4 A3 A2 A1 VCCA U5 ADG3308 GND Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 VCCY R46 68k AGND 10 9 8 7 6 5 4 3 2 1 VSDP SDP_GND SDP_VIO_3.3V SPORT_RSCLK SPORT_DR0 SPORT_RFS SPORT_TFS SPORT_DT0 SPORT_TSCLK 0.1uF C6 Use SDP_GND as return for VSDP 11 12 13 14 15 16 17 18 19 20 SDP_VIO_3.3V (connected to blackfin GPIO - use I2C_0 first) RESET_IN BMODE1 UART_RX UART_TX GND GND NC NC SDP EEPROM_A0 NC STANDARD NC NC CONNECTOR NC NC NC NC GND GND NC NC NC NC TMR_C * TMR_D TIMERS TMR_A TMR_B GPIO6 GPIO7 GND GND GENERAL GPIO4 GPIO5 INPUT/OUTPUT GPIO2 GPIO3 GPIO0 GPIO1 SCL_1 SCL_0 I2C SDA_1 SDA_0 GND GND SPI_SEL1/SPI_SS SPI_CLK SPI_SEL_C SPI_MISO SPI SPI_SEL_B SPI_MOSI GND SPI_SEL_A SPORT_INT GND * SPORT_DT3 SPORT_TSCLK SPORT_DT2 * SPORT_DT0 SPORT SPORT_DT1 SPORT_TFS SPORT_DR1 SPORT_RFS SPORT_DR2* SPORT_DR0 * SPORT_DR3 SPORT_RSCLK GND GND PAR_FS1 PAR_CLK PAR_FS3 PAR_FS2 PAR_A1 PAR_A0 PAR_A3 PAR_A2 GND GND PAR_CS PAR_INT PAR_RD PAR_WR PAR_D1 PAR_D0 PARALLEL PAR_D3 PAR_D2 PORT PAR_D5 PAR_D4 GND GND PAR_D7 PAR_D6 PAR_D9 PAR_D8 PAR_D11 PAR_D10 PAR_D13 PAR_D12 PAR_D14 GND GND PAR_D15 * PAR_D16 PAR_D17 * * PAR_D18 PAR_D19 * * PAR_D20 PAR_D21 * * PAR_D22 PAR_D23 * GND GND USB_VBUS VIO(+3.3V) GND GND GND GND NC NC *NC on BLACKFIN SDP VIN NC J20 VIN: Use this pin to power the SDP requires 5V 200mA 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 R28 100K R11 U2 8 VCC 7 WP 6 SCL 5 SDA 24LC32A-I/MS 1 2 A0 3 A1 4 A2 VSS SDP_VIO_3.3V Board ID EEPROM (24LC32) must be on I2C bus 0 SPORT_RFS SPORT_DR0 SPORT_RSCLK SPORT_TSCLK SPORT_DT0 SPORT_TFS Main I2C bus (Connected to blackfin TWI - Pull up resistors not required) R29 100K SDP_VIO_3.3V Board ID EEPROM (24LC32) must be on I2C bus 0, VIO: USE to set IO voltage max draw 20mA SDP_VIO_3.3V BMODE1: Pull up with a 10K resistor to set SDP to boot from a SPI FLASH on the daughter board 12142-024 I2C bus 1 is common across both connectors on SDP - Pull up resistors required EVAL-AD7887SDZ User Guide UG-674 Figure 26. EVAL-AD7887SDZ Schematic Page 4 Rev. 0 | Page 20 of 27 LK8 J2 LK7 AIN1 J1 AIN0 +12V 51r R4 51r R13 C30 10uF + B A LK2 B A LK1 C31 0.1uF C3 10nF 3 2 2 3 6 5 1 7 4 GND U4 AD780 U3-A U3-B TEMP +VIN - + - + OP_SEL VOU T 8 6 120 R R2 120 R R1 4 8 LK4 C2 3.6nF C1 3.6nF V+ V- LK4 in = 3V -12V U7-C +12V C52 C8 0.1uF C50 0.1uF 0.1uF J3 VREF U3-C V+ V4 8 AV DD D C B A LK3 + T_AIN1 T_AIN2 C13 10uF C10 C11 0.1uF C9 4 5 U1 2 VDD 3 GND + VAD8033 AKSZ V+ 5 4 - 3 U6 AIN1/VREF AD7887 AIN0 C12 0.1uF 0.1uF 0.1uF 1 +12V OP -12V DIN DOU T SCLK CS 6 7 8 1 AV DD AV DD J4 VIN B A LK5 LK6 T_CS 51r R3 R7 T_SCLK 6 5 3K - + T_DOU T 7 U7-B T_DIN R20 1K 1K R5 R8 2 3 U7-A 0R R12 0R R10 0R R9 0R 1K C5 - + R6 68pF 1 J5 VBiased DIN_SW DOUT _SW SCLK_ SW CS_SW 12142-025 UG-674 EVAL-AD7887SDZ User Guide 2 UG-674 12142-026 EVAL-AD7887SDZ User Guide Figure 27. EVAL-AD7887SDZ Top Side Layer 1 Rev. 0 | Page 21 of 27 EVAL-AD7887SDZ User Guide 12142-027 UG-674 Figure 28. EVAL-AD7887SDZ Layer 2, Ground Rev. 0 | Page 22 of 27 UG-674 12142-028 EVAL-AD7887SDZ User Guide Figure 29. EVAL-AD7887SDZ Layer 3, Power Rev. 0 | Page 23 of 27 EVAL-AD7887SDZ User Guide 12142-029 UG-674 Figure 30. EVAL-AD7887SDZ Bottom Side Layer 4 Rev. 0 | Page 24 of 27 UG-674 12142-030 EVAL-AD7887SDZ User Guide Figure 31. EVAL-AD7887SDZ Top Side Silkscreen Rev. 0 | Page 25 of 27 EVAL-AD7887SDZ User Guide 12142-031 UG-674 Figure 32. EVAL-AD7887SDZ Solder Side Silkscreen Rev. 0 | Page 26 of 27 EVAL-AD7887SDZ User Guide UG-674 NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG12142-0-9/14(0) Rev. 0 | Page 27 of 27