QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER LT1952-1 DESCRIPTION Demonstration circuit 1317A-F is isolated input to high current output 1/8th Brick footprint converter featuring the LT®1952 switching controller with Active Reset circuit. The Active Reset circuit can improve the efficiency in wide input voltage applications. Also, the Active Reset allows the implementation of self-driven synchronous secondary rectifiers in some applications. The DC1317A-F converts isolated 9V to 36V input to 3.3V output and provides over 22A of output current depending on cooling. When determining the cooling requirements the actual input voltage range and continuous maximum output current must be taken into account. The converter operates at 200kHz with the peak efficiency greater than 92%. The DC1317 can be easily modified to generate output voltages in the range from 0.6V to 48V. The output currents are limited by total output power of up to 150W. The available versions of DC1317A are: DC1317A-A, 34-75Vin to 3.3V, 35A DC1317A-D, 18-72Vin to 24V, 5A DC1317A-E, 36-72Vin to 5V, 12A DC1317A-F, 9-36Vin to 3.3V, 20A DC1317A-G, 9-36Vin to 12V, 5A DC1317A-H, 9-36Vin to 48V, 1.5A The DC1317 circuit features soft-start which prevents output voltage overshoot on startup or when recovering from overload condition. The DC1317 has precise over-current protection circuit that allows for continuous operation under short circuit conditions. The low power dissipation under short circuit conditions insures high reliability even during short circuits. The LT1952 can be synchronized to an external clock of up to 400kHz. Please refer to LT1952 data sheet for design details and applications information. DC1317A-B, 18-72Vin to 5V, 25A Design files for this circuit board are available. Call the LTC factory. DC1317A-C, 18-72Vin to 12V, 8A-12A LT is a trademark of Linear Technology Corporation Table 1. Performance Summary PARAMETER CONDITION VALUE Minimum Input Voltage IOUT = 0A to 22A 9V Maximum Input Voltage IOUT = 0A to 22A 36V VOUT VIN = 9V to 36V, IOUT = 0A to 22A (27Amax) 3.3V ±3% Typical Output Ripple VOUT VIN = 9V to 36V, IOUT = 0A to 22A 50mVP–P Nominal Switching Frequency 200kHz 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER QUICK START PROCEDURE Demonstration circuit 1317 is easy to set up to evaluate the performance of LT1952-1 circuit. Refer to Figure 1 for proper measurement equipment setup and follow the procedure below: NOTE: When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the input or output voltage ripple by touching the probe tip directly across the Vin or Vout and GND terminals. See Figure 2. for proper scope probe technique. 1. 2. With power off, connect the input power supply to Vin and GND. Make sure that the input power supply has sufficient current rating at minimum input voltage for the required output load. Turn on the power at the input. NOTE: Make sure that the input voltage does not exceed 36V. 3. Check for the proper output voltage. Vout = 3.3V. If there is no output, temporarily disconnect the load to make sure that the load is not set too high. 4. Once the proper output voltage is established, adjust the load within the operating range and observe the output voltage regulation, ripple voltage, efficiency and other parameters. 5. The DC1317 is equipped with an output capacitor CSYS (470uF) that approximates typical system rail capacitance. If system board already has capacitance of similar value CSYS can be removed. Figure 1. Proper Measurement Equipment Setup 2 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER Figure 2. Scope Probe Placement for Measuring Input or Output Ripple ACTIVE RESET CIRCUIT Also the active reset circuit shapes the reset voltage into a square waveform that results in lower drain voltages for Q1 and Q2 MOSFETs. The lower MOSFET drain voltages allow lower voltage and lower Rdson MOSFETs to be used. The MOSFETs must be avalanche rated for the peak reset voltage. If non-avalanche rated MOSFETs are used a proper drain voltage derating should be used. The main benefit of active reset circuit in the case of DC1317A-F demo board is high efficiency (shown in Figure 3), wide input range, high power density and small size. To achieve such high efficiency all of the power components were carefully selected. Please consult LT factory for assistance if any changes to the circuit are required. DC1317A-F (LT1952) 3.3V Output Efficiency Efficiency The Active Reset circuit on DC1317A-F demo board consists of a small P-Channel MOSFET Q13 and reset capacitor C25. The MOSFET Q13 is used to connect the reset capacitor across the transformer T1 primary winding during the reset period when Q1 MOSFET is off. The voltage across capacitor C25 automatically adjusts with the duty cycle to provide complete transformer reset under all operating conditions. 94% 92% 90% 88% 86% 84% 82% 80% 78% 76% 74% 72% 12V input 24V input 0 5 10 15 20 25 Iout [A] Figure 3. High efficiency of DC1317A-F allows the board to be used in thermally critical applications OUTPUT LOAD STEP RESPONSE The load step response of DC1317A-F is very fast even though relatively small amount of output capacitance is present (200uF ceramic and 470uF electrolytic). This is thanks to fast error amplifier of LT4430, optimal amount of current slope compensation of LT1952, fast opto coupler and fast error amplifier of LT1952. If higher load steps need to be handled more output capacitance can be added in order to keep the voltage transients at the desired level. The load step transients are shown in Figure 4. 3 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER remove the resistor R1 and connect 12V, 100mA power source to +Vb node (right side of R1). By doing this, the primary PWM controller LT1952 can be activated without the main primary power being applied to +Vin. To activate the secondary side control circuit LT4430 diode OR a 5V, 100mA power source into pin 1 of LT4430 controller. Figure 4. Fast transient response of DC1317A-F is superior to many competing power modules without the additional output capacitors. SOFT START FUNCTION The DC1317 features LT4430 opto coupler driver that has soft start function which produces monotonic startup ramp shown if Figure 5. The rise time of output voltage is controlled by capacitor C19 that is connected to OC (Overshoot Control) pin of LT4430. Also, the soft-start function will prevent input current surges even with full load at the output. Once the primary and secondary controllers are running the main power (+Vin) can be applied slowly while observing the switching waveforms and output voltage. The input current supplying the power transformer T1 should not exceeded 200mA without the output load. If one of the MOSFETs is damaged, the input current will exceed 200mA. PCB LAYOUT The PCB layout should be carefully planned to avoid potential noise problems. The PCB layout for DC1317A can be used as a guide. Since demo board DC1317A has 8 versions the PCB layout has optional components that can be removed. Also, the PCB layout has a common schematic that is used just for the layout. The actual circuit schematic shows component values. The PCB layout schematic does not show the component values. In some cases, a different component like a diode is used in a place holder for a capacitor such as in the case of C6. Please modify the reference designators in your schematic to reflect the actual component used. The following simple PCB layout rules should be helpful. Figure 5. The LT4430 opto coupler driver produces monotonic output voltage rise at startup without output voltage overshoot. If possible use solid ground planes on layers 2 and n-1. The ground planes will prevent the switching noise from coupling into sensitive lines. DEBUGGING AND TESTING Place sensitive lines on the inner layers that will be shielded by grounds on layers 2 and n-1. The DC1317 can easily be tested and debugged by powering the bias circuit separately from the main power circuit. To place DC1317 into debug mode Keep the loop formed by Q1, RCS1, Cin and T1 tight. Keep the loop formed by Q2, Q3 and T1 tight. 4 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER Keep noise sensitive nodes like SD/VSEC, ROSC, FB, COMP, ISENSE, BLANK and DELAY as small as posible by placing the associated components close to the LT1952 and LT4430 chips. Use local vias for all components that connect to ground planes. Do not place any traces on the layers 2 and n-1 to avoid ground planes from being compromised. If the PCB layout has to be done on 2 or 4-layer PCB try to stay close to the guidelines outlined above. Also, maximize the ground connections between components by placing the components tight together. Please contact LT factory for additional assistance. 5 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER D3 +Vr2 Vu1 1 C3 1u 2 3 C21 470p 1 Vfb 2 Q12 BC856T R15 178k 3 4 5 SS C10 0.1u 6 R22 7 13.3k 8 Comp Out PGND Delay Vr=2.5V SD GND OC Isense Blank R32 196k R28 115k +Vb +Vr2 R2 560k C13 .47u R33 158k TS C33 0.1u 200R Vu1 D10 BAT760 C8 100p 11 10 D6 B0540 C9 100p R23 910R 9 NOTE: C5 0.22u R8 2.2R D14 BAS516 U6 PS2801-1 Vfb R20 100k C11 4.7n GND R16 33k R18 10k 1 R21 10k 2 Q9 BCX55 R10 1k R26 220R 3 CG 4 D9 PDZ7.5B R31 10R C16 .22u, 10V CS+ Sync CS- Timer CG GND U4 LT4430 C23 1uF R30 1.2k 2 3 C15 R27 470R GND Comp C19 1uF, X5R 8 C12 7 470p FB C7 220p L4 10uH 6 R17 560R 5 FG Opto 2.2nF, 2kV This schematic shows only the components required for operation of -F version of DC1317A demo board. All optional components of DC1317A demo board have been removed. Also, all zero-ohm resistors have been replaced with wires. Please consult the full DC1317A-F schematic to decide if any of the optional components should be included in your design. FG Vcc SS Out U5 LTC3900 Vcc R19 56K C14 1u 1 R9 47R + CG D11 BAS516 Cu1 4.7u 13 Co1 Co2 G45R2-0302.007 R45 10k 15 12 HAT2165 FG Q13 Si7309 D17 BAS516 14 Q3 HAT2165 4 16 R24 22k SS * R29 PMEG3002 Inp R53 Vin Rosc MaxDC TG C34 0.33uF 5 Q2 T1 R54 2.2R 6 Out Sout FB=1.23V Sync GND D1 BAS516 U1 LT1952-1 R14 33K Boost 2 5 Q1 Si7138 Rcs1 0.005R R3 249R R13 22K Vcc 10, 11 6 +Vin -Vin U2 LTC4440-5 +Vout D2 BAS516 D5 PDZ10B Cin 3x6.8uF +Vo1 470u, 6.3V, 4m 9V-36V Input R11 10k 7, 8 1 Csys 2.2R L1 PA1671.112 33n +Vin L2 1.5mH 100uF, X7R Q10 PBSS8110 Vu1 +Vb R1 C25 +Vin T2A PE-68386 C17 15n 6 5 4 R38 18.2K R34 8.66k R35 82.5k +Vo1 C24 39p Demo Board DC1317A-F schematic * Please change the ref designator to reflect the symbol. 6 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER 7 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1317A-F ACTIVE RESET ISOLATED 9-36V INPUT TO 3.3V @20A DC/DC POWER CONVERTER 8