TL431A3

CYStech Electronics Corp.
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 1/8
Adjustable Precision Shunt Regulators
TL431A3
Description
TO-92
The TL431A3 series are three-terminal adjustable regulators with
guaranteed thermal stability over applicable temperature ranges. The output voltage may be set to any
value between VREF (approximately 2.495 volts) and 36 volts with two external resistors. These devices
have a typical dynamic output impedance of 0.2Ω. Active output circuitry provides a very sharp turn-on
characteristic, making these devices excellent replacement for zener diodes in many applications.
Features
• Programmable output voltage
• Temperature coefficient is 50ppm/°C typical
• Temperature compensated for operation over
• full temperature range
• Low output noise voltage
• Fast turn on response
• Pb-free package
Classification
Rank
VREF
A
B
C
2.495±0.5%
2.495±1%
2.495±2%
Ordering Information
Device
TL431A3-A-BK-G
TL431A3-B-BK-G
Rank
A
TL431A3-C-BK-G
C
TL431A3-A-TB-G
A
TL431A3-B-TB-G
B
TL431A3-C-TB-G
C
TL431A3
Package
Shipping
1000 pcs/ bag, 10 bags/box, 10boxes/carton
B
TO-92
(Pb-free lead plating and
halogen-free package)
2000 pcs / Tape & Box
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 2/8
Absolute Maximum Ratings
(Operating temperature range applies unless otherwise specified)
Characteristics
Symbol
VKA
IK
IREF
PD
PD
RθJA
RθJC
Topr
Tj
Tstg
Cathode Voltage
Cathode Current Range (Continuous)
Reference Input Current Range
Power Dissipation @ TA=25℃
Power Dissipation @ TC=25℃
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Operating Temperature Range
Junction Temperature Range
Storage Temperature Range
Value
37
-100~+150
-0.05~+10
700
1.5
178
83
-40~+125
-40~+150
-65~+150
Unit
V
mA
mA
mW
W
°C/W
°C/W
°C
°C
°C
Functional Block Diagram & Symbol
Functional Block Diagram :
Symbol :
Cathode
Cathode
Reference
+
-
Reference
VREF
Anode
Anode
Test Circuits
IN
II
VZ
IREF
II
IN
R1
IZ
VREF
Fig1. Test Circuit for VZ=VREF
TL431A3
VZ
IN
VZ
IREF
IZ
R2
VREF
Fig 2. Test Circuit for VZ>VREF
Note : VZ=VREF(1+R1/R2)+IREFxR1
Fig3. Test Circuit for Off-State
Current
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 3/8
Electrical Characteristics ( Ta=25°C unless otherwise specified )
Characteristics
Symbol
Test Conditions
Min
Typ Max
Unit
Reference Input Voltage TL431A
2.480 2.495 2.510
VREF VKA=VREF, IK=10mA 2.470 2.495 2.520
V
TL431B
TL431C
2.445 2.495 2.545
V =V , I =10mA
Deviation of Reference Input
4
17
mV
VREF(dev) KA REF K
Voltage Over-Temperature
Tmin≤Ta≤Tmax
IK=10mA,
-1.4 -2.7 mV/V
Ratio of Change in Reference
ΔVREF / ΔVKA=10V-VREF
Input Voltage to the Change in
ΔVKA IK=10mA,
Cathode Voltage
-1.0 -2.0 mV/V
ΔKKA=36V-10V
IK=10mA, R1=10kΩ,
0.63
4
μA
Reference Input Current
IREF
R2=∞
Deviation of Reference Input
I =10mA, R1=10kΩ,
Current Over Full Temperature
IREF(dev) K
0.4
1.2
μA
R2=∞, Ta=Full Range
Range
Minimum Cathode Current for
IK(min) VKA=VREF
0.33 0.5
mA
Regulation
Off-State Cathode Current
IK(off) VKA=36V, VREF=0
0.1
1.0
μA
VKA=VREF, f≤1.0KHz
Dynamic impedance
ZKA
0.2
0.5
Ω
IK=1 to 100mA
TL431A3
CYStek Product Specification
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 4/8
CYStech Electronics Corp.
Characteristic Curves
CATHODE C URR ENT vs C ATHODE VOLTAGE
CATHODE C URR ENT vs C ATHODE VOLTAGE
150
800
I K - C OTHODE C UR R ENT ( u A)
I K - C OTHODE C UR R ENT (mA)
125
100
75
50
25
0
-25
-50
-75
-100
700
600
500
400
300
200
100
0
-100
-200
-2
-1
0
1
2
3
-1
-0. 5
V A K - C ATHODE VOLTAGE (V)
2. 52
350
2. 515
300
Vre f - REF ERENC E INP UT
CUR RENT (nA)
Vre f - R EF ER ENC E INP UT
VOLTAGE (mV)
0. 5
1
1. 5
2
2. 5
3
R EF ERENC E INP UT C URR ENT vs AMB IENT
TEMP ER ATUR E
R EF ERENC E INP UT VOLTAGE vs AMB IENT
TEMP ER ATURE
2. 51
2. 505
2. 5
2. 495
2. 49
2. 485
2. 48
250
200
150
100
50
0
-50
-25
0
25
50
75
100
AMB IENT TEMP ER ATUR E(℃ )
TL431A3
0
V AK - C ATHODE VOLTAGE ( V)
125
0
25
50
75
100
125
AMB IENT TEMP ER ATUR E(℃ )
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 5/8
Characteristic Curves(Cont.)
DYNAMIC IMP EDANC E vs F R EQUENC E
CATHODE VOLTAGE vs R EF ER ENC E INP UT
VOLTAGE
100
Z K A - DYNAMIC IMP EDANC E (Ω)
ΔVre f - REF ER ENC E INP UT
VOLTAGE (mV)
0
-5
-10
-15
-20
-25
-30
0
5
10
15
20
25
30
35
10
1
0. 1
1
40
V KA - C ATHODE VOLTAGE (V)
1000
Po wer Der atin g C u r v e
800
Po wer Dissip atio n - - - P D ( mW )
40
OP EN-LOOP VOLTAGE GAIN (dB )
100
f - F R EQUENC E (KHz )
OP EN-LOOP VOLTAGE GAIN vs F R EQUENCY
30
20
10
700
600
500
400
300
200
100
0
0
1
10
100
f - F R EQUENC Y (KHz )
TL431A3
10
1000
0
50
100
150
200
Am b ien t Tem p er atu r e- - - TA( ℃)
CYStek Product Specification
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 6/8
CYStech Electronics Corp.
TO-92 Taping Outline
H2
H2A H2A
H2
D2
A
L
H3
H4 H
L1
H1
D1
F1F2
T2
T
T1
DIM
A
D
D1
D2
F1,F2
F1,F2
H
H1
H2
H2A
H3
H4
L
L1
P
P1
P2
T
T1
T2
W
W1
-
TL431A3
P1
P
Item
Component body height
Tape Feed Diameter
Lead Diameter
Component Body Diameter
Component Lead Pitch
F1-F2
Height Of Seating Plane
Feed Hole Location
Front To Rear Deflection
Deflection Left Or Right
Component Height
Feed Hole To Bottom Of Component
Lead Length After Component Removal
Lead Wire Enclosure
Feed Hole Pitch
Center Of Seating Plane Location
4 Feed Hole Pitch
Over All Tape Thickness
Total Taped Package Thickness
Carrier Tape Thickness
Tape Width
Adhesive Tape Width
20 pcs Pitch
W1
W
D
P2
Millimeters
Min.
4.33
3.80
0.36
4.33
2.40
15.50
8.50
2.50
12.50
5.95
50.30
0.36
17.50
5.00
253
Max.
4.83
4.20
0.53
4.83
2.90
±0.3
16.50
9.50
1
1
27
21
11
12.90
6.75
51.30
0.55
1.42
0.68
19.00
7.00
255
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 7/8
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
TL431A3
CYStek Product Specification
Spec. No. : C502A3
Issued Date : 2003.03.26
Revised Date : 2013.11.29
Page No. : 8/8
CYStech Electronics Corp.
TO-92 Dimension
Marking:
α2
A
B
1
2
3
Date Code
TL
431
□□
α3
C
D
H
I
G
α1
Style: Pin 1.Reference 2.Anode 3.Cathode
E
F
3-Lead TO-92 Plastic Package
CYStek Package Code: A3
*: Typical
Inches
Min.
Max.
0.1704 0.1902
0.1704 0.1902
0.5000
0.0142 0.0220
*0.0500
0.1323 0.1480
DIM
A
B
C
D
E
F
Millimeters
Min.
Max.
4.33
4.83
4.33
4.83
12.70
0.36
0.56
*1.27
3.36
3.76
DIM
G
H
I
α1
α2
α3
Inches
Min.
Max.
0.0142 0.0220
*0.1000
*0.0500
*5°
*2°
*2°
Millimeters
Min.
Max.
0.36
0.56
*2.54
*1.27
*5°
*2°
*2°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plating.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
TL431A3
CYStek Product Specification