CYStech Electronics Corp. Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 1/ 6 Adjustable Precision Shunt Regulators TL431N3 SOT-23 Description The TL431N3 series are three-terminal adjustable regulators with guaranteed thermal stability over applicable temperature range. The output voltage may be set to any value between VREF (approximately 2.495 volts) and 36 volts with two external resistors. These devices have a typical dynamic output impedance of 0.2Ω. Active output circuitry provides a very sharp turn-on characteristic, making these devices excellent replacement for zener diodes in many applications. Features • Programmable output voltage • Temperature coefficient is 50ppm/°C typical • Temperature compensated for operation over full temperature range • Low output noise voltage • Fast turn on response • Pb-free package Classification Rank VREF A B C 2.495±0.5% 2.495±1% 2.495±2% Absolute Maximum Ratings (Operating temperature range applies unless otherwise specified) Characteristics Cathode Voltage Cathode Current Range (Continuous) Reference Input Current Range Power Dissipation Operating Temperature Range Junction Temperature Range Storage Temperature Range TL431N3 Symbol VKA IK IREF PD Topr Tj Tstg Value 37 -100~+150 -0.05~+10 300 -40~+125 -40~+150 -65~+150 Unit V mA mA mW °C °C °C CYStek Product Specification Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 2/ 6 CYStech Electronics Corp. Functional Block Diagram & Symbol Functional Block Diagram : Symbol : Cathode Cathode Reference + - Reference VREF Anode Anode Test Circuits IN II VZ IREF II IN R1 IZ VREF Fig1. Test Circuit for VZ=VREF VZ IN VZ IREF IZ R2 VREF Fig 2. Test Circuit for VZ>VREF Note : VZ=VREF(1+R1/R2)+IREFxR1 Fig3. Test Circuit for Off-State Current Electrical Characteristics ( Ta=25°C unless otherwise specified ) Characteristics Symbol Test Conditions Reference Input Voltage TL431A VREF VKA=VREF, IK=10mA TL431B TL431C V =V , I =10mA Deviation of Reference Input Voltage VREF(dev) KA REF K Over-Temperature Tmin≤Ta≤Tmax IK=10mA, Ratio of Change in Reference Input ΔVREF / ΔVKA=10V-VREF Voltage to the Change in Cathode ΔVKA IK=10mA, Voltage ΔKKA=36V-10V IK=10mA, R1=10kΩ, Reference Input Current IREF R2=∞ Deviation of Reference Input Current I =10mA, R1=10kΩ, IREF(dev) K Over Full Temperature Range R2=∞, Ta=Full Range Minimum Cathode Current for IK(min) VKA=VREF Regulation Off-State Cathode Current IK(off) VKA=36V, VREF=0 VKA=VREF, f≤1.0KHz Dynamic impedance ZKA IK=1 to 100mA TL431N3 Min Typ Max Unit 2.480 2.495 2.510 2.470 2.495 2.520 V 2.445 2.495 2.545 - 4 17 mV - -1.4 -2.7 mV - -1.0 -2.0 V - 2 4 uA - 0.4 1.2 uA - 0.4 1.0 mA - 0.1 1.0 uA - 0.2 0.5 Ω CYStek Product Specification Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 3/ 6 CYStech Electronics Corp. Characteristic Curves C ATHODE CUR RENT vs C ATHODE VOLTAGE CATHODE C URR ENT vs C ATHODE VOLTAGE 150 800 I K - C OTHODE C UR R ENT ( u A) I K - C OTHODE C UR R ENT (mA) 125 100 75 50 25 0 -25 -50 -75 -100 700 600 500 400 300 200 100 0 -100 -200 -2 -1 0 1 2 3 -1 -0. 5 2. 52 350 2. 515 300 Vre f - R EF ER ENC E INP UT C URR ENT (nA) Vre f - R EF ER ENC E INP UT VOLTAGE (mV) 0. 5 1 1. 5 2 2. 5 3 R EF ERENC E INP UT C URR ENT vs AMB IENT TEMP ER ATUR E REF ER ENCE INP UT VOLTAGE vs AMBIENT TEMP ER ATUR E 2. 51 2. 505 2. 5 2. 495 2. 49 2. 485 2. 48 250 200 150 100 50 0 -50 -25 0 25 50 75 100 AMB IENT TEMP ERATUR E(℃ ) TL431N3 0 V AK - C ATHODE VOLTAGE ( V) V A K - CATHODE VOLTAGE (V) 125 0 25 50 75 100 125 AMB IENT TEMP ER ATUR E(℃ ) CYStek Product Specification CYStech Electronics Corp. Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 4/ 6 Characteristic Curves(Cont.) DYNAMIC IMP EDANC E vs F R EQUENC E CATHODE VOLTAGE vs R EF ER ENC E INP UT VOLTAGE 100 Z K A - DYNAMIC IMP EDANC E (Ω) ΔVre f - R EF ER ENC E INP UT VOLTAGE (mV) 0 -5 -10 -15 -20 -25 -30 0 5 10 15 20 25 30 35 10 1 0. 1 1 40 V KA - C ATHODE VOLTAGE (V) 100 1000 f - F R EQUENC E (KHz ) Po wer Der atin g C u r v e OP EN-LOOP VOLTAGE GAIN vs F R EQUENCY 40 350 Po wer Dissip atio n - - - P D ( mW ) OP EN-LOOP VOLTAGE GAIN (dB ) 10 30 20 10 300 250 200 150 100 50 0 0 1 10 100 1000 0 50 100 150 200 Am b ien t Tem p er atu r e- - - TA( ℃) f - F R EQUENC Y (KHz ) Ordering Information Device TL431N3 TL431N3 Package SOT-23 (Pb-free) Shipping Marking 3000 pcs / Tape & Reel 431 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 5/ 6 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. TL431N3 CYStek Product Specification Spec. No. : C502N3 Issued Date : 2003.04.02 Revised Date : 2008.06.24 Page No. : 6/ 6 CYStech Electronics Corp. SOT-23 Dimension Marking: A L 3 B 431 S 2 1 3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 G V C Style: D K H Pin 1.Reference 3.Anode 2.Cathode J *: Typical Inches Min. Max. 0.1102 0.1204 0.0472 0.0630 0.0335 0.0512 0.0118 0.0197 0.0669 0.0910 0.0005 0.0040 DIM A B C D G H Millimeters Min. Max. 2.80 3.04 1.20 1.60 0.89 1.30 0.30 0.50 1.70 2.30 0.013 0.10 DIM J K L S V Inches Min. Max. 0.0034 0.0070 0.0128 0.0266 0.0335 0.0453 0.0830 0.1083 0.0098 0.0256 Millimeters Min. Max. 0.085 0.177 0.32 0.67 0.85 1.15 2.10 2.75 0.25 0.65 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYCtek sales office. Material: • Lead: 42 Alloy; solder plating • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. TL431N3 CYStek Product Specification