A62S6308A Series Preliminary 64K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 64K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue May 31, 2011 Preliminary (May, 2011, Version 0.0) AMIC Technology, Corp. A62S6308A Series Preliminary 64K X 8 BIT LOW VOLTAGE CMOS SRAM Features Power supply range: 2.7V to 3.6V Access times:55/70 ns (max.) Current: A62S6308A series: Operating: 30mA (max.) Standby: 5μA (max.) Extended operating temperature range: 0°C to 70°C for -S series, -40°C to +85°C for -SU series Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Output enable and two chip enable inputs for easy application Data retention voltage: 2V (min.) Available in 32-pin SOP, TSOP, sTSOP (8 X 13.4mm) forward type packages All Pb-free (Lead-free) products are RoHS compliant General Description Two chip enable inputs are provided for POWER-DOWN and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. The A62S6308A is a low operating current 524,288-bit static random access memory organized as 65,536 words by 8 bits and operates on a low power supply voltage from 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Pin Configurations PRELIMINARY 7 8 9 10 11 12 13 14 15 16 32 31 VCC A15 30 CE2 29 28 27 WE A13 A8 26 25 24 23 22 A9 A11 OE A10 CE1 21 20 19 18 17 I/O7 I/O6 I/O5 I/O4 I/O3 (May, 2011, Version 0.0) A11 A9 A8 A13 WE CE2 A15 VCC NC NC A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A62S6308AV (A62S6308AX) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 ~ ~ 1 2 3 4 5 6 A62S6308AM NC NC A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND TSOP/(sTSOP) (forward type) ~ ~ SOP 1 AMIC Technology, Corp. A62S6308A Series Block Diagram A0 VCC GND A13 ROW 512 X 1024 DECODER MEMORY ARRAY INPUT DATA CIRCUIT SENSE AMPS A14 A15 I/O0 I/O7 CE2 CE1 CONTROL CIRCUIT OE WE Pin Descriptions - SOP Pin No. Symbol 1,2 NC 3 - 12, 23, 25 - 28, 31 Pin Description - TSOP/sTSOP Pin No. Symbol No Connection 1 - 4, 7, 11 - 20, 31 A0 - A15 A0 - A15 Address Inputs 5 WE Write Enable 13 - 15, 17 - 21 I/O0 - I/O7 Data Inputs/Outputs 6 CE2 Chip Enable 16 GND Ground 8 VCC Power Supply 22 Chip Enable 9, 10 NC No Connection CE1 24 OE Output Enable 21 - 23, 25 - 29 I/O0 - I/O7 29 WE Write Enable 24 GND Ground 30 CE2 Chip Enable 30 CE1 Chip Enable 32 VCC Power Supply 32 OE Output Enable PRELIMINARY Description (May, 2011, Version 0.0) 2 Description Address Inputs Data Inputs/Outputs AMIC Technology, Corp. A62S6308A Series Recommended DC Operating Conditions (TA = 0°C to +70°C, or -40°C to +85°C) Symbol Parameter VCC Supply Voltage GND Ground Min. Typ. Max. Unit 2.7 3.0 3.6 V 0 0 0 V VIH Input High Voltage 2.2 - VCC + 0.3 V VIL Input Low Voltage -0.3 - +0.6 V CL Output Load - - 30 pF TTL Output Load - - 1 - Absolute Maximum Ratings* *Comments VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C, or -40°C to +85°C Storage Temperature, Tstg . .. . . . . . . . -55°C to + 125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics Symbol (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V, GND = 0V) Parameter Min. Max. Unit Conditions ⎜ILI⎥ Input Leakage Current - 1 μA VIN = GND to VCC ⎜ILO⎥ Output Leakage Current - 1 μA CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC Active Power Supply Current - 3 mA CE1 = VIL, CE2 = VIH II/O = 0mA - 30 mA Min. Cycle, Duty = 100% CE1 = VIL, CE2 = VIH II/O = 0mA - 3 mA CE1 = VIL, CE2 = VIH VIH = VCC, VIL = 0V f = 1MHZ, II/O = 0mA ICC ICC1 Dynamic Operating Current ICC2 PRELIMINARY (May, 2011, Version 0.0) 3 AMIC Technology, Corp. A62S6308A Series DC Electrical Characteristics (continued) Symbol Parameter Min. Max. Unit - 0.5 mA VCC ≤ 3.3V CE1 = VIH or CE2 = VIL ISB Conditions Standby Power - 5 μA VCC ≤ 3.3V CE1 ≥ VCC - 0.2V or CE2 ≤ 0.2V VIN ≥ 0V Supply Current ISB1 VOL Output Low Voltage - 0.4 V IOL = 2.1mA VOH Output High Voltage 2.2 - V IOH = -1.0mA Truth Table CE1 CE2 OE WE I/O Operation H X X X High Z ISB, ISB1 X L X X High Z ISB, ISB1 Output Disable L H H H High Z ICC, ICC1, ICC2 Read L H L H DOUT ICC, ICC1, ICC2 Write L H X L DIN ICC, ICC1, ICC2 Mode Standby Supply Current Note: X = H or L Capacitance (TA = 25°C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance 6 pF VIN = 0V CI/O* Input/Output Capacitance 8 pF VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (May, 2011, Version 0.0) 4 AMIC Technology, Corp. A62S6308A Series AC Characteristics (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V) Symbol A62S6308A-55S/SU Parameter A62S6308A-70S/SU Unit Min. Max. Min. Max. 55 - 70 - ns - 55 - 70 ns CE1 - 55 - 70 ns CE2 - 55 - 70 ns - 30 - 35 ns CE1 10 - 10 - ns CE2 10 - 10 - ns 5 - 5 - ns CE1 0 20 0 25 ns CE2 0 20 0 25 ns Read Cycle tRC Read Cycle Time tAA Address Access Time tACE1 Chip Enable Access Time tACE2 tOE Output Enable to Output Valid tCLZ1 Chip Enable to Output in Low Z tCLZ2 tOLZ Output Enable to Output in Low Z tCHZ1 Chip Disable to Output in High Z tCHZ2 tOHZ Output Disable to Output in High Z 0 20 0 25 ns tOH Output Hold from Address Change 5 - 10 - ns tWC Write Cycle Time 55 - 70 - ns tCW Chip Enable to End of Write 50 - 60 - ns tAS Address Setup Time 0 - 0 - ns tAW Address Valid to End of Write 50 - 60 - ns tWP Write Pulse Width 40 - 50 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z 0 25 0 25 ns tDW Data to Write Time Overlap 25 - 30 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 5 - 5 - ns Read Cycle Notes: tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (May, 2011, Version 0.0) 5 AMIC Technology, Corp. A62S6308A Series Timing Waveforms Read Cycle 1(1, 2, 4) tRC Address tAA tOH tOH DOUT Read Cycle 2 (1, 3, 4, 6) CE1 tACE1 tCLZ15 tCHZ15 DOUT Read Cycle 3 (1, 4, 7 ,8) CE2 tACE2 tCHZ25 tCLZ25 DOUT PRELIMINARY (May, 2011, Version 0.0) 6 AMIC Technology, Corp. A62S6308A Series Timing Waveforms (continued) Read Cycle 4 (1) tRC Address tAA OE tOE tOH tOLZ5 CE1 tACE1 tCHZ15 tCLZ15 CE2 tACE2 tOHZ5 tCHZ25 tCLZ25 DOUT Notes: 1. 2. 3. 4. 5. 6. 7. 8. WE is high for Read Cycle. Device is continuously enabled CE1 = VIL and CE2 = VIH. Address valid prior to or coincident with CE1 transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. CE2 is high. CE1 is low. Address valid prior to or coincident with CE2 transition high. PRELIMINARY (May, 2011, Version 0.0) 7 AMIC Technology, Corp. A62S6308A Series Timing Waveforms (continued) Write Cycle 1(6) (Write Enable Controlled) tWC Address tAW tWR3 tCW5 CE1 (4) CE2 (4) tAS1 tWP2 WE tDW tDH DIN tWHZ tOW DOUT PRELIMINARY (May, 2011, Version 0.0) 8 AMIC Technology, Corp. A62S6308A Series Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) tWC Address tWR3 tAW tCW5 CE1 tAS1 CE2 (4) (4) tCW5 tWP2 WE tDW tDH DIN tWHZ7 DOUT tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE1, a high CE2 and a low WE . tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. Notes: 1. 2. 3. 4. PRELIMINARY (May, 2011, Version 0.0) 9 AMIC Technology, Corp. A62S6308A Series AC Test Conditions Input Pulse Levels 0.4V to 2.4V Input Rise and Fall Time 5 ns Input and Output Timing Reference Levels 1.5V Output Load See Figures 1 and 2 TTL TTL CL CL 5pF 30pF * Including scope and jig. * Including scope and jig. Figure 1. Output Load Data Retention Characteristics Symbol Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW (TA = 0°C to +70°C or -40°C to +85°C) Parameter Min. Max. Unit 2.0 3.6 V CE1 ≥ VCC - 0.2V VDR2 2.0 3.6 V CE2 ≤ 0.2V ICCDR1 - 1* μA VCC = 2.0V CE1 ≥ VCC - 0.2V VIN ≥ 0V - 1* μA VCC = 2.0V CE2 ≤ 0.2V VIN ≥ 0V 0 - ns tRC - ns 5 - ms VDR1 Conditions VCC for Data Retention Data Retention Current ICCDR2 tCDR Chip Disable to Data Retention Time tR Operation Recovery Time tVR VCC Rise Time from Data Retention Voltage to Operating Voltage * A62S6308A-55S/70S A62S6308A-55SU/70SU PRELIMINARY (May, 2011, Version 0.0) See Retention Waveform ICCDR: Max. 1μA at TA = 0°C to +40°C ICCDR: Max. 1μA at TA = 0°C to +40°C 10 AMIC Technology, Corp. A62S6308A Series Low VCC Data Retention Waveform (1) ( CE1 Controlled) DATA RETENTION MODE VCC 2.7V tCDR 2.7V tR VDR ≥ 2V tVR CE1 VIH VIH CE1 ≥ VDR - 0.2V Low VCC Data Retention Waveform (2) (CE2 Controlled) DATA RETENTION MODE VCC 2.7V tCDR 2.7V tR VDR ≥ 2V tVR CE2 VIL VIL CE2 < 0.2V PRELIMINARY (May, 2011, Version 0.0) 11 AMIC Technology, Corp. A62S6308A Series Ordering Information Part No. Access Time (ns) Operating Current Max. (mA) Standby Current Max. (μA) Package A62S6308AM-55SF 32L Pb-Free SOP A62S6308AM-55SUF 32L Pb-Free SOP A62S6308AV-55SF 32L Pb-Free TSOP 55 30 5 A62S6308AV-55SUF 32L Pb-Free TSOP A62S6308AX-55SF 32L Pb-Free sTSOP A62S6308AX-55SUF 32L Pb-Free sTSOP A62S6308AM-70SF 32L Pb-Free SOP A62S6308AM-70SUF 32L Pb-Free SOP A62S6308AV-70SF 32L Pb-Free TSOP 70 30 5 A62S6308AV-70SUF 32L Pb-Free TSOP A62S6308AX-70SF 32L Pb-Free sTSOP A62S6308AX-70SUF 32L Pb-Free sTSOP PRELIMINARY (May, 2011, Version 0.0) 12 AMIC Technology, Corp. A62S6308A Series Package Information SOP (W.B.) 32L Outline Dimensions HE 17 E 32 unit: inches/mm θ L 1 b 16 Detail F D Seating Plane LE A1 e S A A2 c D y See Detail F Dimensions in inches Symbol A Dimensions in mm Min Nom Max Min Nom Max - - 0.118 - - 3.00 A1 0.004 - - 0.10 - - A2 0.101 0.106 0.111 2.57 2.69 2.82 b 0.014 0.016 0.020 0.36 0.41 0.51 c 0.006 0.008 0.012 0.15 0.20 0.31 D - 0.805 0.817 - 20.45 20.75 E 0.440 0.445 0.450 11.18 11.30 11.43 e 0.044 0.050 0.056 1.12 1.27 1.42 HE 0.546 0.556 0.566 13.87 14.12 14.38 L 0.023 0.031 0.039 0.58 0.79 0.99 LE 0.047 0.055 0.063 1.19 1.40 1.60 S - - 0.036 - - 0.91 y - - 0.004 - - 0.10 θ 0° - 10° 0° - 10° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (May, 2011, Version 0.0) 13 AMIC Technology, Corp. A62S6308A Series Package Information TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm A A1 c E A2 e D θ L LE HD Detail "A" D Detail "A" y S Dimensions in inches Symbol b Dimensions in mm Min Nom Max Min Nom Max A - - 0.047 - - 1.20 A1 0.002 - 0.006 0.05 - 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.18 0.22 0.27 c 0.004 - 0.008 0.11 - 0.20 D 0.720 0.724 0.728 18.30 18.40 18.50 E - 0.315 0.319 - 8.00 8.10 e 0.020 BSC 0.50 BSC HD 0.779 0.787 0.795 19.80 20.00 20.20 L 0.016 0.020 0.024 0.40 0.50 0.60 LE - 0.032 - - 0.80 - S - - 0.020 - - 0.50 y - - 0.003 - - 0.08 θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (May, 2011, Version 0.0) 14 AMIC Technology, Corp. A62S6308A Series Package Information sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions A A1 c E A2 e unit: inches/mm θ L LE D1 D Detail "A" D Detail "A" 0.076MM S b SEATING PLANE Dimensions in inches Symbol Dimensions in mm Min Nom Max Min Nom Max A - - 0.049 - - 1.25 A1 0.002 - - 0.05 - - A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.0056 0.0059 0.0062 0.142 0.150 0.158 E 0.311 0.315 0.319 7.90 8.00 8.10 e 0.020 TYP 0.50 TYP D 0.520 0.528 0.535 13.20 13.40 13.60 D1 0.461 0.465 0.469 11.70 11.80 11.90 L 0.012 0.020 0.028 0.30 0.50 0.70 LE 0.0275 0.0315 0.0355 0.700 0.800 0.900 5° 0° S θ 0.0109 TYP 0° 3° 0.278 TYP 3° 5° Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (May, 2011, Version 0.0) 15 AMIC Technology, Corp.