A627308 Series Preliminary 128K X 8 BIT CMOS SRAM Document Title 128K X 8 BIT CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue August 15, 2000 Preliminary 0.1 Omit 100ns grade items October 25, 2000 Change ICC1 from 70mA to 45mA Change ISB1 from 25µA to 15µA 0.2 PRELIMINARY Change ISB1 from 15µA to 25µA (February, 2001, Version 0.2) February 6, 2001 AMIC Technology, Inc. A627308 Series Preliminary 128K X 8 BIT CMOS SRAM Features n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, sTSOP (8X 13.4mm) forward type packages n Power supply range: 4.5V to 5.5V n Access times: 70 ns (max.) n Current: Operating: 45mA (max.) Standby: 25µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL compatible General Description The A627308 is a low operating current 1048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a power supply voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for power down and a write enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations 1 32 VCC 2 31 A15 A14 3 30 CE2 A12 4 29 WE A7 5 28 A13 A6 6 27 A8 A5 7 26 A9 A4 8 25 A11 A3 9 24 OE A2 10 A1 11 23 A10 22 CE1 A0 12 21 I/O7 I/O 0 13 20 I/O6 I/O 1 14 19 I/O5 I/O 2 15 18 I/O4 GND 16 17 I/O3 (February, 2001, Version 0.2) A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ~ NC A16 A627308M PRELIMINARY n TSOP/(sTSOP) (forward type) A627308V (A627308X) ~ ~ n SOP 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE1 I/O7 I/O 6 I/O 5 I/O4 I/O 3 GND I/O 2 I/O1 I/O 0 A0 A1 A2 A3 AMIC Technology, Inc. A627308 Series Block Diagram VCC A0 GND A14 ROW 512 X 2048 DECODER MEMORY ARRAY INPUT DATA CIRCUIT COLUMN I/O A15 A16 I/O0 I/O7 CE2 CE1 CONTROL CIRCUIT OE WE Pin Descriptions - SOP Pin Description - TSOP/sTSOP Pin No. Symbol Pin No. Symbol 2 - 12, 23, 25 - 28, 31 A0 - A16 Address Inputs 1 - 4, 7, 10 - 20, 31 A0 - A16 Address Inputs 13 - 15, 17 - 21 I/O0 - I/O7 Data Inputs/Outputs 21 - 23, 25 - 29 I/O0 - I/O7 Data Inputs/Outputs 22 CE1 Chip Enable 1 30 CE1 Chip Enable 1 30 CE2 Chip Enable 2 6 CE2 Chip Enable 2 24 OE Output Enable 32 OE Output Enable 29 WE Write Enable 5 WE Write Enable 32 VCC Power Supply 8 VCC Power Supply 16 GND Ground 24 GND Ground 1 NC No Connection 9 NC PRELIMINARY Description (February, 2001, Version 0.2) 2 Description No Connection AMIC Technology, Inc. A627308 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C) Symbol Parameter VCC Supply Voltage GND Ground Min. Typ. Max. Unit 4.5 5.0 5.5 V 0 0 0 V VIH Input High Voltage 2.2 - VCC + 0.5 V VIL Input Low Voltage -0.5 - +0.8 V CL Output Load - - 30 pF TTL Output Load - - 1 - Absolute Maximum Ratings* *Comments VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 7.0V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . -25°C to + 85°C Storage Temperature, Tstg . .. . . . . . . . -55°C to + 125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics Symbol (TA = 0°C to + 70°C, VCC = 5.0V±10%, GND = 0V) Parameter ILI Input Leakage Current ILO Output Leakage Current ICC ICC1 ICC2 PRELIMINARY Active Power Supply Current Dynamic Operating Current Dynamic Operating Current (February, 2001, Version 0.2) A627308-70S Unit Conditions Min. Max. - 1 µA VIN = GND to VCC - 1 µA CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC - 7 mA CE1 = VIL, CE2 = VIH II/O = 0mA - 45 mA Min. Cycle, Duty = 100% CE1 = VIL, CE2 = VIH II/O = 0mA - 7 mA CE1 = VIL, CE2 = VIH VIH = VCC , VIL = 0V F = 1MHz, II/O = 0mA 3 AMIC Technology, Inc. A627308 Series DC Electrical Characteristics (continued) Symbol A627308-70S Parameter Unit Conditions Min. Max. - 0.5 mA CE1 = VIH or CE2 = VIL - 25 µA CE2 ≤ 0.2V, or CE1 ≥ VCC - 0.2V ISB Standby Power Supply Current ISB1 VOL Output Low Voltage - 0.4 V IOL = 2.1mA VOH Output High Voltage 2.4 - V IOH = -1.0mA Truth Table Mode CE1 CE2 OE WE I/O Operation H X X X High Z ISB, ISB1 X L X X High Z ISB, ISB1 Output Disable L H H H High Z ICC, ICC1, ICC2 Read L H L H DOUT ICC, ICC1, ICC2 Write L H X L DIN ICC, ICC1, ICC2 Standby Supply Current Note: X = H or L Capacitance (TA = 25°C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance - 6 pF VIN = 0V CI/O* Input/Output Capacitance - 8 pF VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (February, 2001, Version 0.2) 4 AMIC Technology, Inc. A627308 Series AC Characteristics (TA = 0°C to + 70°, VCC = 5.0V±10%) Symbol A627308-70S Parameter Unit Min. Max. 70 - ns - 70 ns CE1 - 70 ns CE2 - 70 ns - 35 ns CE1 10 - ns CE2 10 - ns 5 - ns CE1 0 25 ns CE2 0 25 ns Read Cycle tRC Read Cycle Time tAA Address Access Time tACE1 Chip Enable Access Time tACE2 tOE Output Enable to Output Valid tCLZ1 Chip Enable to Output in Low Z tCLZ2 tOLZ Output Enable to Output in Low Z tCHZ1 Chip Disable to Output in High Z tCHZ2 tOHZ Output Disable to Output in High Z 0 25 ns tOH Output Hold from Address Change 10 - ns tWC Write Cycle Time 70 - ns tCW Chip Enable to End of Write 60 - ns tAS Address Setup Time 0 - ns tAW Address Valid to End of Write 60 - ns tWP Write Pulse Width 50 - ns tWR Write Recovery Time 0 - ns tWHZ Write to Output in High Z 0 30 ns tDW Data to Write Time Overlap 30 - ns tDH Data Hold from Write Time 0 - ns tOW Output Active from End of Write 5 - ns Write Cycle Notes: tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (February, 2001, Version 0.2) 5 AMIC Technology, Inc. A627308 Series Timing Waveforms Read Cycle 1(1) tRC Address tAA OE tOE tOH tOLZ5 CE1 tACE1 tCHZ1 5 tCLZ1 5 CE2 tACE2 tOHZ5 tCHZ2 5 tCLZ2 5 DOUT Read Cycle 2 (1, 2, 4) tRC Address tAA tOH tOH DOUT PRELIMINARY (February, 2001, Version 0.2) 6 AMIC Technology, Inc. A627308 Series Timing Waveforms (continued) Read Cycle 3 (1, 3, 4, 6) CE1 tACE1 tCLZ15 tCHZ15 DOUT Read Cycle 4 (1, 4, 7, 8) CE2 tACE2 tCHZ25 tCLZ25 DOUT Notes: 1. 2. 3. 4. 5. 6. 7. 8. WE is high for Read Cycle. Device is continuously enabled CE1 = VIL and CE2 = VIH. Address valid prior to or coincident with CE1 transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. CE2 is high. CE1 is low. Address valid prior to or coincident with CE2 transition high. PRELIMINARY (February, 2001, Version 0.2) 7 AMIC Technology, Inc. A627308 Series Timing Waveforms (continued) Write Cycle 1(6) (Write Enable Controlled) tWC Address tAW tWR3 tCW5 CE1 (4) CE2 (4) tAS1 tWP2 WE tDW tDH DIN tWHZ tOW DOUT PRELIMINARY (February, 2001, Version 0.2) 8 AMIC Technology, Inc. A627308 Series Timing Waveforms (continued) Write Cycle 2(6) (Chip Enable Controlled) tWC Address tWR3 tAW tCW5 CE1 tAS1 CE2 (4) (4) tCW5 tWP2 WE tDW tDH DIN tWHZ7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE1 , a high CE2 and a low WE . tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. PRELIMINARY (February, 2001, Version 0.2) 9 AMIC Technology, Inc. A627308 Series AC Test Conditions Input Pulse Levels 0V to 3V Input Rise and Fall Time 5 ns Input and Output Timing Reference Levels 1.5V Output Load See Figures 1 and 2 TTL TTL CL CL 30pF 5pF * Including scope and jig. * Including scope and jig. Figure 1. Output Load Data Retention Characteristics Symbol Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW (TA = 0°C to + 70°C) Parameter Min. Max. Unit Conditions VDR VCC for Data Retention 2.0 5.5 V CE2 ≤ 0.2V, or CE1 ≥ VCC - 0.2V ICCDR Data Retention Current - 10* µA VCC = 2.0V, CE2 ≤ 0.2V, or CE1 ≥ VCC - 0.2V tCDR Chip Disable to Data Retention Time 0 - ns tR Operation Recovery Time tRC - ns tVR VCC Rise Time from Data Retention Voltage to Operating Voltage 5 - ms * A627308-70S PRELIMINARY See Retention Waveform ICCDR: Max. 3µA at TA = 0°C to + 40°C (February, 2001, Version 0.2) 10 AMIC Technology, Inc. A627308 Series Low VCC Data Retention Waveform (1) ( CE1 Controlled) DATA RETENTION MODE VCC 4.5V tCDR 4.5V tR VDR ≥ 2V tVR CE1 VIH VIH CE1 ≥ VDR - 0.2V Low VCC Data Retention Waveform (2) (CE2 Controlled) DATA RETENTION MODE VCC 4.5V tCDR 4.5V tR VDR ≥ 2V tVR CE2 VIL VIL CE2 ≤ 0.2V PRELIMINARY (February, 2001, Version 0.2) 11 AMIC Technology, Inc. A627308 Series Ordering Information Part No. Access Time (ns) Operating Current Max. (mA) Standby Current Max. (µ µA) A627308M-70S A627308V-70S 32L SOP 70 45 A627308X-70S PRELIMINARY Package 25 32L TSOP 32L sTSOP (February, 2001, Version 0.2) 12 AMIC Technology, Inc. A627308 Series Package Information SOP (W.B.) 32L Outline Dimensions unit: inches/mm HE 17 E 32 θ L 1 b 16 Detail F D Seating Plane LE A1 e S A A2 c D y See Detail F Dimensions in inches Symbol Min Nom Max Dimensions in mm Min Nom Max 3.00 A - - 0.118 - - A1 0.004 - - 0.10 - - A2 0.101 0.106 0.111 2.57 2.69 2.82 b 0.014 0.016 0.020 0.36 0.41 0.51 c 0.006 0.008 0.012 0.15 0.20 0.31 D - 0.805 0.817 - 20.45 20.75 E 0.440 0.445 0.450 11.18 11.30 11.43 e 0.044 0.050 0.056 1.12 1.27 1.42 HE 0.546 0.556 0.566 13.87 14.12 14.38 L 0.023 0.031 0.039 0.58 0.79 0.99 LE 0.047 0.055 0.063 1.19 1.40 1.60 S - - 0.036 - - 0.91 y - - 0.004 - - 0.10 θ 0° - 10° 0° - 10° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (February, 2001, Version 0.2) 13 AMIC Technology, Inc. A627308 Series Package Information TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm A A1 c E A2 e D θ L LE HD Detail "A" D Detail "A" y S Dimensions in inches Symbol b Dimensions in mm Min Nom Max Min Nom Max A - - 0.047 - - 1.20 A1 0.002 - 0.006 0.05 - 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.18 0.22 0.27 c 0.004 - 0.008 0.11 - 0.20 D 0.720 0.724 0.728 18.30 18.40 18.50 E - 0.315 0.319 - 8.00 8.10 e 0.020 BSC 0.50 BSC HD 0.779 0.787 0.795 19.80 20.00 20.20 L 0.016 0.020 0.024 0.40 0.50 0.60 LE - 0.032 - - 0.80 - S - - 0.020 - - 0.50 y - - 0.003 - - 0.08 θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (February, 2001, Version 0.2) 14 AMIC Technology, Inc. A627308 Series Package Information sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions A A1 c E A2 e unit: inches/mm θ L LE D1 D Detail "A" D Detail "A" 0.076MM S b SEATING PLANE Dimensions in inches Symbol Dimensions in mm Min Nom Max Min Nom Max A - - 0.049 - - 1.25 A1 0.002 - - 0.05 - - A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.0056 0.0059 0.0062 0.142 0.150 0.158 E 0.311 0.315 0.319 7.90 8.00 8.10 e 0.020 TYP 0.50 TYP D 0.520 0.528 0.535 13.20 13.40 13.60 D1 0.461 0.465 0.469 11.70 11.80 11.90 L 0.012 0.020 0.028 0.30 0.50 0.70 LE 0.0275 0.0315 0.0355 0.700 0.800 0.900 S θ 0.0109 TYP 0° 3° 0.278 TYP 5° 0° 3° 5° Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (February, 2001, Version 0.2) 15 AMIC Technology, Inc.