Future Technology Devices International Ltd V-Eval Board Document Version 1.0 Future Technology Devices International Ltd (FTDI) 373 Scotland Street, Glasgow G5 8QB United Kingdom Tel.: +44 (0) 141 429 2777 Fax: + 44 (0) 141 429 2758 E-Mail (Support): [email protected] Web: http://www.vinculum.com Vinculum is part of Future Technology Devices International Ltd. Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminary information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, 373 Scotland Street, Glasgow G5 8QB United Kingdom. Scotland Registered Number: SC136640 © Copyright 2007 Future Technology Devices International Ltd V-Eval Board Version 1.0 Table of Contents 1 2 3 Introduction ............................................................................................................................................... 6 1.1 Handling the board ........................................................................................................................... 6 1.2 Environmental requirements ............................................................................................................ 6 Board description ...................................................................................................................................... 7 2.1 V-Eval Board features ...................................................................................................................... 7 2.2 Specifications ................................................................................................................................... 7 V-Eval Board components and interfaces. ............................................................................................... 8 3.1 Block Diagram .................................................................................................................................. 9 3.2 Functional Block Description. ......................................................................................................... 10 3.2.1 Components. ..................................................................................................................10 3.2.2 Interfaces. ......................................................................................................................11 4 Testing the board. ................................................................................................................................... 12 5 Detailed description of board components. ............................................................................................ 13 6 5.1 Power select jumper JP9................................................................................................................ 13 5.2 ADBUS port connector CN6........................................................................................................... 14 5.3 ACBUS connector CN8 .................................................................................................................. 15 5.4 BDBUS port connector CN11......................................................................................................... 16 5.5 UART interface connector CN9...................................................................................................... 17 5.6 SPI interface connector CN12........................................................................................................ 18 5.7 FIFO interface connector CN5 ....................................................................................................... 19 5.8 Prototyping area ............................................................................................................................. 20 5.9 USB1 interface CN2 ....................................................................................................................... 22 5.10 USB2 interface CN3. ...................................................................................................................... 22 5.11 PS2-1 interface. CN10. .................................................................................................................. 23 5.12 PS2-2 interface. CN7. .................................................................................................................... 24 5.13 Monitor port mode select jumpers JP1, JP2 .................................................................................. 25 5.14 User LEDs. LED6 – LED10. ........................................................................................................... 26 5.15 LED enable/disable jumpers JP10 – JP14..................................................................................... 26 5.16 User push button switches ............................................................................................................. 27 5.17 Host USB power jumpers JP15, JP16. .......................................................................................... 27 5.18 PS2-1, PS2-2 Enable jumpers JP4, JP5, JP5, JP6. ...................................................................... 28 5.19 Remote Wakeup jumper JP3. ........................................................................................................ 28 5.20 Reset Push-button Switch .............................................................................................................. 29 5.21 ‘PROG’ LED ................................................................................................................................... 29 Connecting to host PC ............................................................................................................................ 30 6.1 7 Drivers installation. ......................................................................................................................... 30 V-Eval Board Control Panel application.................................................................................................. 34 7.1 Terminal Mode ............................................................................................................................... 34 © Copyright 2008 Future Technology Devices International Ltd 1 V-Eval Board Version 1.0 7.1.1 ‘Options - Mode’ tab .......................................................................................................34 7.1.2 Options - ‘RS232 Setup’ tab: .........................................................................................35 7.1.3 Options - ‘Disk Transfer’ tab...........................................................................................36 7.1.4 Options - ‘Slave File I/O’ tab ..........................................................................................37 7.2 Spy Mode ....................................................................................................................................... 38 7.3 Programming Mode........................................................................................................................ 39 8 V-Eval Board Schematics. ...................................................................................................................... 40 9 Contact Information................................................................................................................................. 41 © Copyright 2008 Future Technology Devices International Ltd 2 V-Eval Board Version 1.0 List of Tables Table 1.0 Document references.......................................................................................................5 Table 1-1 Acronyms and Abbreviations ...........................................Error! Bookmark not defined. Table 4-1 ADBUS port connector CN6. .........................................................................................14 Table 4-2 ACBUS port connector CN8 ..........................................................................................15 Table 4-3 BDBUS port connector CN11 ........................................................................................16 Table 4-4 UART interface connector CN9 .....................................................................................17 Table 4-5 SPI Interface connector CN12 .......................................................................................18 Table 4-6 FIFO Interface connector CN5.......................................................................................19 Table 4-7 Prototyping area.............................................................................................................21 Table 4-8 USB1 host/slave connector. CN2 ..................................................................................22 Table 4-9 USB2 host/slave connector. CN3 ..................................................................................22 Table 4-10 PS2-1 connector. CN10 .................................................................................................23 Table 4-11 PS2 - 2 connector. CN7 .................................................................................................24 Table 4-12 Monitor interface type selection jumpers JP1, JP2........................................................25 Table 4-13 User LEDs connections..................................................................................................26 Table 4-14 LED Enable/Disable jumpers. ........................................................................................26 Table 4-15 User Switches ................................................................................................................27 Table 4-16 PS2 enable jumpers.......................................................................................................28 © Copyright 2008 Future Technology Devices International Ltd 3 V-Eval Board Version 1.0 List of Figures Figure 3-1 Board layout. ....................................................................................................................8 Figure 3-2 Block diagram. .................................................................................................................9 Figure 4-1 Power connector. ...........................................................................................................12 Figure 5-1 Power select jumper.......................................................................................................13 Figure 5-2 ADBUS port connector...................................................................................................14 Figure 5-3 ACBUS port connector CN8. .........................................................................................15 Figure 5-4 BDBUS port connector CN11. .......................................................................................16 Figure 5-5 UART interface connector CN9. ....................................................................................17 Figure 5-6 SPI interface connector CN12. ......................................................................................18 Figure 5-7 FIFO interface connector CN5. ......................................................................................19 Figure 5-8 Prototyping area.............................................................................................................20 Figure 5-9 USB1 interface CN2.......................................................................................................22 Figure 5-10 USB2 interface CN3.......................................................................................................22 Figure 5-11 PS2 - 1 interface CN10. .................................................................................................23 Figure 5-12 PS2 - 2 interface CN7. ...................................................................................................24 Figure 5-13 Monitor mode select jumpers JP1, JP2. ........................................................................25 Figure 5-14 User LEDs. .....................................................................................................................26 Figure 5-15 LED Enable/Disable jumpers. ........................................................................................26 Figure 5-16 User push button switches. ............................................................................................27 Figure 5-17 USB power enable jumpers. ..........................................................................................27 Figure 5-18 USB power enable jumpers. ..........................................................................................28 Figure 5-19 Remote Wakeup jumper. ...............................................................................................28 Figure 5-20 Reset Switch ..................................................................................................................29 Figure 5-21 LED ‘PROG’ ...................................................................................................................29 Figure 6-1 Drivers installation..........................................................................................................30 Figure 6-2 Drivers installation..........................................................................................................30 Figure 6-3 Drivers installation..........................................................................................................31 Figure 6-4 Drivers installation..........................................................................................................31 Figure 6-5 Drivers installation..........................................................................................................32 Figure 6-6 Drivers installation..........................................................................................................32 Figure 7-1 Control Panel – Terminal mode .....................................................................................34 Figure 7-2 Control Panel – Options – RS232 Setup .......................................................................35 Figure 7-3 Control Panel – Options – Disk Transfer .......................................................................36 Figure 7-4 Control Panel – Options – Slave File I/O .......................................................................37 Figure 7-5 Control Panel – Spy Mode .............................................................................................38 Figure 7-6 Control Panel – Programming Mode..............................................................................39 © Copyright 2008 Future Technology Devices International Ltd 4 V-Eval Board Version 1.0 Reference This document does not describe the hardware interfaces required to connect a microcontroller to a VNC1L device, nor does it provide application notes. The following documents are available from FTDI and other sources for this purpose: Document reference Description Vinculum Website The main website for the Vinculum family of USB Host Controllers http://www.vinculum.com DS_VNC1L-1A Vinculum Embedded USB Host Controller IC Data Sheet http://www.vinculum.com Vinculum Firmware User Manual Vinculum Embedded USB Host Controller IC Firmware User Manual http://www.vinculum.com FTDI FT2232 FT2232D Data Sheet http://www.ftdichip.com USB 2.0 Universal Serial Bus Specification Revision 2.0 USB Implementers Forum http://www.usb.org Table 1.0 Document references. © Copyright 2008 Future Technology Devices International Ltd 5 V-Eval Board Version 1.0 1 Introduction The V-Eval Kit is a hardware platform that designers can use to develop embedded USB host systems based on FTDI’s VNC1L devices. Features include: Inbuilt VNC1L USB device programmer / terminal emulator / command monitor hardware. Two VNC1L USB Host / Slave ports. Generous Prototyping area for standard DIP and SIL devices. Multiple IO port connectors grouped by port name and/or function. LEDs and switches for user interaction. PS/2 keyboard and mouse ports. Downloadable programming, terminal emulation and debug monitor software. Downloadable HID class example project ( VNC1L controlled USB Rocket Launcher ) including PIC source code in “C”. The V-Eval kit includes the following hardware items as standard 1 x V-Eval development board. 1 x 5V/1A universal plug top PSU – UK, US, European and Japanese versions available. 1 x USB A/B cable to connect to a host PC in programming / terminal emulation or debugging modes. 1 x USB gender changer for USB slave mode applications. Before you proceed please check that all the contents of the package are not damaged. Ensure that your kit includes a proper version of power supply, depending on the region where you live V-Eval application software and project examples can be downloaded from: www.vinculum.com/prd_v-eval.htm 1.1 Handling the board Static discharge precaution – Without proper anti-static handling the board can be damaged. Therefore, take anti-static precautions while handling the board. 1.2 Environmental requirements The V-Eval Board must be stored between -40°C and 80°C. The recommended operating temperature is between 0°C and 55°C © Copyright 2008 Future Technology Devices International Ltd 6 V-Eval Board Version 1.0 2 Board description V-Eval Board is intended to use as a hardware platform for easy evaluation of FTDI’s Vinculum VNC1 series embedded USB host devices. The V-Eval Board includes all the components you need to start developing USB host systems based on VNC1L devices. 2.1 V-Eval Board features VNC1L – Embedded USB host chip Two USB type A connectors for connecting to USB slave peripherals VNC1L IO port connectors grouped by port name and/or function. PS/2 Keyboard and Mouse connectors FT2232D – dual USB-UART device for VNC1L programming & debug functions One USB type B connector for PC host connection to FT2232D. Five user-programmable LEDs. Two of them are driven by default firmware. Five user- programmable push-button switches. 2.2 Specifications Board supply voltage: 4.75V … 5.25V Board supply current: 60mA (with no USB devices on USB1 or USB2 port) IO connectors power output: 5V/150mA, 3.3V/150mA Dimensions: 130mm x 146mm x 15mm (L x W x H) © Copyright 2008 Future Technology Devices International Ltd 7 V-Eval Board Version 1.0 3 V-Eval Board components and interfaces. This chapter describes the operational and connectivity information for V-Eval Board major components and interfaces. Figure 3-1 V-Eval Board layout. © Copyright 2008 Future Technology Devices International Ltd 8 V-Eval Board Version 1.0 3.1 Block Diagram Host USB2 CN3 PS2 – 2 CN7 Slave USB CN4 PS2 – 1 CN10 SPI IF Host USB1 CN2 CH.A 74CBT3257 UART IF VNC1L FT2232D FIFO IF CH.B Figure 3-2 BDBUS[7..0] Prototype area PROG#,RESET ACBUS[6..0] BCBUS Keyboard & LEDs ADBUS[7..0] V-Eval Board block diagram. © Copyright 2008 Future Technology Devices International Ltd 9 V-Eval Board Version 1.0 3.2 Functional Block Description. 3.2.1 Components. Component Board designator Description VNC1L IC U2 VNC1L Embedded USB Host device USB-UART bridge U3 FT2232D Dual USB UART/FIFO device Configuration memory U4 9346 Serial SPI EEPROM for FT2232 configuration data UART multiplexer U5 74CBT3257 4-bit, 1to2, FET Multiplexer/Demultiplexer 3.3V regulator U1 AIC1735-33 Ultra low dropout 3.3V voltage regulator 12MHz crystal Y1 12MHz crystal for VNC1-L 6MHz crystal Y2 6MHz crystal for FT2232D Single 5V DC power supply CN1 Board adapter for included 5V DC power supply Power switch SW1 Power On/Off switch Power source select JP9 Power source selection jumper. Reset button SW2 Push-button switch for manual reset of VNC1L device Keyboard SW3-SW7 Five user push-button switches User LEDs LED6-LED10 Five green user LEDs Power LED LED1 Green LED A_RX LED LED3 Green LED A_TX LED LED4 Yellow LED B_RX LED LED5 Green LED PROG LED LED2 Red LED LEDs enable jumpers JP10-JP14 Enable/disable user-defined LEDs MODE-0 and MODE-1 jumpers (1) JP1, JP2 Monitor interface select jumpers PS2 jumpers JP4-JP7 PS2 interface enable jumpers. REMOTE WAKEUP JP3 VNC1L remote wakeup jumper VBUS jumpers JP15, JP16 USB1, USB2 power bus enable jumpers USB terminal ON/OFF JP8 USB terminal enable/disable jumper Notes (1) Table 3-1 refer to table 5-12 for more information about monitor interface configurations. V-Eval Board components. © Copyright 2008 Future Technology Devices International Ltd 10 V-Eval Board Version 1.0 3.2.2 Interfaces. Component USB1, USB2 (2) PS2-1, PS2-2 (3) SPI (4) UART FIFO (4) (4) Board designator Description CN2, CN3 VNC1L USB host ports 1&2 CN10, CN7 VNC1L PS2 ports 1&2 CN12 VNC1L SPI interface pins CN9 VNC1L UART interface pins CN5 VNC1-L FIFO interface pins AD[7..0] (4) CN6 VNC1L ADBUS IO port pins AC[6..0] (4) CN8 VNC1L ACBUS IO port pins BD[7..0] (4) CN11 VNC1L BDBUS IO port pins Prototyping area (4) - All of VNC1-L IO ports and PROG#, RESET# pins are brought on to this area Notes (2) (3) (4) Table 3-2 When a VDSC firmware is loaded in to the VNC1L flash memory USB1 (CN2) connector is configured as a slave USB port. You need to use a gender changer supplied to connect this port to USB host port. PS2-1 (CN10) and PS2-2 (CN7) ports are not used in any of current VNC1L’s firmware versions. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to those pins. V-Eval Board interfaces. © Copyright 2008 Future Technology Devices International Ltd 11 V-Eval Board Version 1.0 4 Testing the board. Make sure that the Power Select jumper JP9 is in P.S. position (pins 2&3 shorted). Connect the 5V DC/1A power supply included in V-Eval Kit to the power adapter connector (CN1), connect USB A/B cable to USB B connector (CN4) on V-Eval Board and to a free USB port on host PC. Switch SW1 to the ON position (towards board edge). LED1 – POWER should now be on. Figure 4-1 Power connector. All of the board components draw power either directly from this 5V supply or from 3.3V regulator that is powered by this 5V supply. The V-Eval Board comes with VDAP Disk And Peripheral Firmware version pre-programmed in to the VNC1L program flash memory. After the power is applied to the board the POWER LED (LED1) illuminating and VNC1L (loaded with default firmware) starting to play 2 seconds LED pattern on user LEDs - LED7 and LED8. For more information about firmware functionality please refer to the Vinculum web site at http://www.vinculum.com/documents.html#vfwspecs in the “Vinculum Firmware Specifications” section. © Copyright 2008 Future Technology Devices International Ltd 12 V-Eval Board Version 1.0 5 Detailed description of board components. 5.1 Power select jumper JP9. Figure 5-1 Power select jumper. V-Eval Board can draw its power either from wall 5V/1A DC Power Supply or from USB B type connector (CN4) when connected to the host PC. To enable USB power supply feature, switch the jumper JP9 to USB position, pins 1&2 shorted (pin 1 has a rectangle shape on the bottom side of the board). Warning! Please remember that every device connected to the PC through USB port can draw NO MORE than 500mA from host PC 5V power bus. © Copyright 2008 Future Technology Devices International Ltd 13 V-Eval Board Version 1.0 5.2 ADBUS port connector CN6. Figure 5-2 ADBUS port connector. The VNC1L’s eight ADBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Connector pin number Signal name VCN1L pin name VCN1L pin number IO type Description (5) 1 ADBUS0 31 IO ADBUS port, data bit0 AD1 (5) 2 ADBUS1 32 IO ADBUS port, data bit1 AD2 (5) 3 ADBUS2 33 IO ADBUS port, data bit2 AD3 (5) 4 ADBUS3 34 IO ADBUS port, data bit3 AD4 (5) 5 ADBUS4 35 IO ADBUS port, data bit4 (5) 6 ADBUS5 36 IO ADBUS port, data bit5 AD6 (5) 7 ADBUS6 37 IO ADBUS port, data bit6 (5) 8 ADBUS7 38 IO ADBUS port, data bit7 3.3V (6) 9 - 3.3V power rail. GND 10 - Ground pin AD0 AD5 AD7 (7) 11 - 5V power rail. GND 12 - Ground pin 5V Notes: (5) (6) (7) Table 5-1 All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. ADBUS port connector CN6. © Copyright 2008 Future Technology Devices International Ltd 14 V-Eval Board Version 1.0 5.3 ACBUS connector CN8 Figure 5-3 ACBUS port connector CN8. The VNC1L’s eight ACBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Connector pin number VCN1L pin name (8) 1 ACBUS0 41 IO ACBUS port data bit0 AC1 (8) 2 ACBUS1 42 IO ACBUS port data bit1 (8) 3 ACBUS2 43 IO ACBUS port data bit2 AC3 (8) 4 ACBUS3 44 IO ACBUS port data bit3 AC4 (8) 5 ACBUS4 45 IO ACBUS port data bit4 AC5 (8) 6 ACBUS5 46 IO ACBUS port data bit5 AC6 (8) 7 ACBUS6 47 IO ACBUS port data bit6 AC7 (8) 8 ACBUS7 48 IO ACBUS port data bit7 3.3V (9) 9 - 3.3V power rail. Can be used to power external devices 10 - Ground pin 11 - 5V power rail. Can be used to power external devices 12 - Ground pin Signal name AC0 AC2 GND 5V (10) GND Notes: (8) (9) (10) Table 5-2 VCN1L pin number IO type Description All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. ACBUS port connector CN8 © Copyright 2008 Future Technology Devices International Ltd 15 V-Eval Board Version 1.0 5.4 BDBUS port connector CN11. Figure 5-4 BDBUS port connector CN11. The VNC1L’s eight BDBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Signal name Connector pin number VCN1L pin name VCN1L pin number IO type Description BD0 (11) 1 BDBUS0 11 IO BDBUS port data bit0 BD1 (11) 2 BDBUS1 12 IO BDBUS port data bit1 (11) 3 BDBUS2 13 IO BDBUS port data bit2 BD3 (11) 4 BDBUS3 14 IO BDBUS port data bit3 (11) 5 BDBUS4 15 IO BDBUS port data bit4 BD5 (11) 6 BDBUS5 16 IO BDBUS port data bit5 BD6 (11) 7 BDBUS6 18 IO BDBUS port data bit6 BD7 (11) 8 BDBUS7 19 IO BDBUS port data bit7 3.3V (12) 9 - 3.3V power rail. Can be used to power external devices 10 - Ground pin 11 - 5V power rail. Can be used to power external devices 12 - Ground pin BD2 BD4 GND 5V (13) GND Notes: (11) (12) (13) Table 5-3 All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. BDBUS port connector CN11 © Copyright 2008 Future Technology Devices International Ltd 16 V-Eval Board Version 1.0 5.5 UART interface connector CN9. Figure 5-5 UART interface connector CN9. For easy connection to peripherals all UART pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Signal name Connector pin number VCN1L pin name VCN1L pin number IO type Description (14) 1 ADBUS0 31 O Transmit data RXD (14) 2 ADBUS1 32 I Receive data 3 ADBUS2 33 O Request To Send. TXD RTS# (14) CTS# (14) 4 ADBUS3 34 I Clear To Send. DTR# (14) 5 ADBUS4 35 O Data Terminal Ready. DSR# (14) 6 ADBUS5 36 I Data Set Ready. DCD# (14) 7 ADBUS6 37 I Data Carrier Detect. RI# (14) 8 ADBUS7 38 I Ring Indicator. TXDEN# (14) 9 ACBUS0 41 O Transmit Enable. 3.3V power rail. Can be used to power external devices 3.3V (15) GND 5V (16) Notes: (14) (15) (16) Table 5-4 10 - - - 11 - - - Ground pin - 5V power rail. Can be used to power external devices 12 - - All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. UART interface connector CN9 © Copyright 2008 Future Technology Devices International Ltd 17 V-Eval Board Version 1.0 5.6 SPI interface connector CN12. Figure 5-6 SPI interface connector CN12. For easy connection to peripherals all Serial Peripheral Interface (SPI) pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Signal name 3.3V (18) GND Connector pin number Description 3.3V power rail. Can be used to power external devices 2 - Ground pin - 5V power rail. Can be used to power external devices O SPI interface Clock signal. SCLK (17) 4 SDI IO type - 3 (17) VCN1L pin number 1 (19) 5V VCN1L pin name ADBUS0 31 5 ADBUS1 32 I SPI interface Data In signal. SDO (17) 6 ADBUS2 33 O SPI interface Data Out signal. CS (17) 7 ADBUS3 34 O SPI interface Chip Select signal. GND 8 - Ground pin Notes: (17) (18) (19) Table 5-5 All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. SPI Interface connector CN12 © Copyright 2008 Future Technology Devices International Ltd 18 V-Eval Board Version 1.0 5.7 FIFO interface connector CN5 Figure 5-7 FIFO interface connector CN5. For easy connection to peripherals all FIFO interface pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics. Signal name Connector pin number VCN1L pin name ADBUS0 VCN1L pin number 31 IO FIFO interface Data Bit0. IO type Description D0 (20) D1 (20) 2 ADBUS1 32 IO FIFO interface Data Bit1. D2 (20) 3 ADBUS2 33 IO FIFO interface Data Bit2. ADBUS3 34 IO FIFO interface Data Bit3. ADBUS4 35 IO FIFO interface Data Bit4. ADBUS5 36 IO FIFO interface Data Bit5. IO FIFO interface Data Bit6. IO 1 D3 (20) D4 (20) D5 (20) D6 (20) 7 ADBUS6 37 D7 (20) 8 ADBUS7 38 4 5 6 FIFO interface Data Bit7. FIFO interface control line. When low data is available to read on D[7..0] pins FIFO interface control line. When low data can be written to the D[7..0] pins Write latch signal. Active high Read latch signal. Active low 3.3V power rail. Can be used to power external devices RXF# (20) 9 ACBUS0 41 O TXE# (20) 10 ACBUS1 42 O WR (20) 11 ACBUS2 43 I RD# (20) 12 ACBUS3 44 I 13 - - - 14 - - - Ground pin - 5V power rail. Can be used to power external devices 3.3V (21) GND 5V (22) Notes: (20) (21) (22) Table 5-6 15 - - All VNC1L’s IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. FIFO Interface connector CN5 © Copyright 2008 Future Technology Devices International Ltd 19 V-Eval Board Version 1.0 5.8 Prototyping area Figure 5-8 Prototyping area. A prototype area consisting of an array of 800 0.1-inch pitch holes is provided. This area can be used to add custom components to the V-Eval Board. Connections to the 5V, 3.3 V planes and ground plane of the V-Eval Board are included. The silk-screen text on the board indicates which holes are connected to which planes. Only top-most row is connected to VNC1L IO ports, power and ground planes. All the other holes are not connected to anything on the board. Signal pins are shared between other IO connectors on the board. For more information refer to the V-Eval Board schematics. Signal name GND 5V 1 (25) 3.3V Connector pin number (24) VCN1L pin name VCN1L pin number - - IO type - 2 - - - 3 - - - Description Ground pin 5V power rail. Can be used to power external devices 3.3V power rail. Can be used to power external devices GND 4 - - - Ground pin AD0 5 ADBUS0 31 IO ADBUS port Data Bit0. AD1 6 ADBUS1 32 IO ADBUS port Data Bit1. AD2 7 ADBUS2 33 IO ADBUS port Data Bit2. AD3 8 ADBUS3 34 IO ADBUS port Data Bit3. AD4 9 ADBUS4 35 IO ADBUS port Data Bit4. AD5 10 ADBUS5 36 IO ADBUS port Data Bit5. AD6 11 ADBUS6 37 IO ADBUS port Data Bit6. AD7 12 ADBUS7 38 IO ADBUS port Data Bit7. AC0 13 ACBUS0 41 IO ACBUS port Data Bit0. AC1 14 ACBUS1 42 IO ACBUS port Data Bit1. AC2 15 ACBUS2 43 IO ACBUS port Data Bit2. AC3 16 ACBUS3 44 IO ACBUS port Data Bit3. AC4 17 ACBUS4 45 IO ACBUS port Data Bit4. (23) 18 ACBUS5 46 IO ACBUS port Data Bit5/MODE0. AC6 (23) 19 ACBUS6 47 IO ACBUS port Data Bit6/MODE1. AC5 GND 20 - - - Ground pin BD0 21 BDBUS0 11 IO BDBUS port Data Bit0. BD1 22 BDBUS1 12 IO BDBUS port Data Bit1. BD2 23 BDBUS2 13 IO BDBUS port Data Bit2. BD3 24 BDBUS3 14 IO BDBUS port Data Bit3. BD4 25 BDBUS4 15 IO BDBUS port Data Bit4. BD5 26 BDBUS5 16 IO BDBUS port Data Bit5. © Copyright 2008 Future Technology Devices International Ltd 20 V-Eval Board Version 1.0 BD6 27 BDBUS6 18 IO BDBUS port Data Bit6. BD7 28 BDBUS7 19 IO BDBUS port Data Bit7. BC0 29 BCBUS0 20 IO BCBUS port Data Bit0. BC1 30 BCBUS1 21 IO BCBUS port Data Bit1. BC2 31 BCBUS2 22 IO BCBUS port Data Bit2. BC3 32 BCBUS3 23 IO BCBUS port Data Bit3. GND 33 - - - Ground pin PROG# 34 PROG# 10 I VNC1L PROG# pin RESET# 35 RESET# 9 I VNC1L RESET# pin GND 36 - - - Ground pin 37 - - - GND 3.3V (24) 38 - - - 5V (25) 39 - - - GND 40 - - - Notes: (23) (24) (25) Table 5-7 Ground pin 3.3V power rail. Can be used to power external devices 5V power rail. Can be used to power external devices Ground pin Refer to table xx for more information about firmware functionality of these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. Prototyping area © Copyright 2008 Future Technology Devices International Ltd 21 V-Eval Board Version 1.0 5.9 USB1 interface CN2 Figure 5-9 USB1 interface CN2. VNC1L USB1 transceiver pins are brought on this connector. Depending of firmware version this port can be configured as host or slave port. Signal name VCN1L pin name VCN1L pin number IO type Description 5V power rail. Can be used to power external devices 5V (26) 1 - USB1-DM 2 USB1 DM 26 IO USB1 transceiver, data line Minus USB1-DP 3 USB1 DP 25 IO USB1 transceiver, data line Plus - GND 4 - - Ground pin Shield 5, 6 - - Connector shield. Connected to ground. Notes: (26) Table 5-8 5.10 Connector pin number This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. USB1 host/slave connector. CN2 USB2 interface CN3. Figure 5-10 USB2 interface CN3. VNC1L USB2 transceiver pins are brought on this connector. Depending of firmware version this port can be configured as host or slave port. Signal name Connector pin number VCN1L pin name VCN1L pin number IO type Description 5V (27) 1 - - - 5V power rail. Can be used to power external devices USB1-DM 2 USB1 DM 29 IO USB2 transceiver, data line Minus USB1-DP 3 USB1 DP 28 IO USB2 transceiver, data line Plus GND 4 - - - Ground pin Shield 5, 6 - - - Connector shield. Connected to ground. Notes: (27) Table 5-9 This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. USB2 host/slave connector. CN3 © Copyright 2008 Future Technology Devices International Ltd 22 V-Eval Board Version 1.0 5.11 PS2-1 interface. CN10. Figure 5-11 PS2 - 1 interface CN10. VNC1L has a two PS2 interfaces. PS2 – 1 interface pins are brought on this connector. PS2 Keyboard or Mouse can be connected to this connector. Currently PS2 ports are not implemented in any of current firmware versions. Signal name Connector pin number VCN1L pin name VCN1L pin number IO type Description PS2-1 CLK 5 BCBUS0 20 O PS2-1 DATA 1 BCBUS1 21 IO PS2 interface 1 clock signal. PS2 interface 1 data signal 4 - - - 5V power rail. Can be used to power external devices GND 3 - - - Ground pin NC 2 - - - Not Connected 5V (28) NC 6 - - - Not Connected Shield 7 - - - Connector shield. Connected to ground. Notes: (28) This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. Table 5-10 PS2-1 connector. CN10 © Copyright 2008 Future Technology Devices International Ltd 23 V-Eval Board Version 1.0 5.12 PS2-2 interface. CN7. Figure 5-12 PS2 - 2 interface CN7. VNC1L has a two PS2 interfaces. PS2 – 2 interface pins are brought on this connector. PS2 Keyboard or Mouse can be connected to this connector. Currently PS2 ports are not implemented in any of current firmware versions. Signal name Connector pin number VCN1L pin name VCN1L pin number IO type Description PS2-2 CLK 5 BCBUS2 22 O PS2-2 DATA 1 BCBUS3 23 IO PS2 interface 2 data signal - 5V power rail. Can be used to power external devices 5V (29) 4 - - PS2 interface 2 clock signal. GND 3 - - - Ground pin NC 2 - - - Not Connected NC 6 - - - Not Connected Shield 7 - - - Connector shield. Connected to ground. Notes: (29) This pin is connected to the board’s 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. Table 5-11 PS2 - 2 connector. CN7 © Copyright 2008 Future Technology Devices International Ltd 24 V-Eval Board Version 1.0 5.13 Monitor port mode select jumpers JP1, JP2 Figure 5-13 Monitor mode select jumpers JP1, JP2. Those jumpers provide an interface type selection for VNC1L command monitor. For more information about command monitor port modes please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs JP1 Pin 1,2 (30) JP2 Pin3,4 Pin 1,2 (30) Interface type Pin 3,4 SHORTED OPENED SHORTED OPENED UART (31) SHORTED OPENED OPENED SHORTED FIFO (31) OPENED SHORTED SHORTED OPENED SPI (31) OPENED Notes: (30) (31) SHORTED OPENED SHORTED UART (31) Pin No.1 has a rectangle shape on the bottom side of the board. For more detailed information about interface modes please refer to the VNC1L data sheet. Table 5-12 Monitor interface type selection jumpers JP1, JP2 © Copyright 2008 Future Technology Devices International Ltd 25 V-Eval Board Version 1.0 5.14 User LEDs. LED6 – LED10. Figure 5-14 User LEDs. Five green LEDs is provided on board. LED7 & LED8 are controlled by default firmware. LED6, LED9, LED10 can be driven by using IOW (IO Write) command. For more information about IOW command please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs Designator VCN1L pin name LED6 BDBUS4 LED7 BDBUS5 LED8 BDBUS6 LED9 BDBUS7 LED10 ACBUS5 VCN1L pin number Table 5-13 User LEDs connections. 5.15 LED enable/disable jumpers JP10 – JP14. Figure 5-15 LED Enable/Disable jumpers. Every user-defined LED have an enable/disable jumper. When jumper is closed LED will be illuminate when driven low by one of the VNC1L pins. When jumper is opened LED is disconnected from the VCN1L pin. Designator LED affected JP10 LED6 JP11 LED7 JP12 LED8 JP13 LED9 JP14 LED10 Table 5-14 LED Enable/Disable jumpers. © Copyright 2008 Future Technology Devices International Ltd 26 V-Eval Board Version 1.0 5.16 User push button switches Figure 5-16 User push button switches. Push – button switches connected straight to VNC1L pins. When switch is pressed down, logic LOW appears on VNC1L’s corresponding pin. The state of the SW3 – SW7 can be read by using IOR (IO Read) command. For more information about IOR command please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs Designator VNC1L pin name VNC1L pin number SW3 BDBUS0 11 SW4 BDBUS1 12 SW5 BDBUS2 13 SW6 BDBUS3 14 SW7 ACBUS6 47 Table 5-15 User Switches 5.17 Host USB power jumpers JP15, JP16. Figure 5-17 USB power enable jumpers. When either USB1 and/or USB2 ports are used as a host ports, the jumpers JP15 and/or JP16 accordingly should be closed to allow peripheral devices to draw power from board’s +5V power rail. Warning! When you intended to use these ports as a USB slave ports you need to remove shunts from jumpers JP15, JP16. Failed to do so can cause damage either to the computer or to the V-Eval Board. © Copyright 2008 Future Technology Devices International Ltd 27 V-Eval Board Version 1.0 5.18 PS2-1, PS2-2 Enable jumpers JP4, JP5, JP5, JP6. Figure 5-18 USB power enable jumpers. These jumpers are provided to connect/disconnect PS2 ports from VNC1L device. Currently PS2 ports are not used in any firmware versions. Make sure that JP4, JP5, JP6 and JP7 are left opened. Designator Signal name VNC1L pin JP4 PS2-2 Data BCBUS3 JP5 PS2-2 Clk BCBUS2 JP6 PS2-1 Data BCBUS1 JP7 PS2-1 Clk BCBUS0 Table 5-16 PS2 enable jumpers 5.19 Remote Wakeup jumper JP3. Figure 5-19 Remote Wakeup jumper. Some versions of firmware are putting VNC1L device in to the Suspend Monitor (SUM) mode when it is idle to reduce the power consumption. To wakeup VNC1L every time data is arrived on its RXD pin JP3 jumper is provided to connect together RXD and RI# pins. When RI# pin is driven low, VNC1L will resume from the SUM mode immediately. To enable remote wakeup feature place shunt on jumper JP3. © Copyright 2008 Future Technology Devices International Ltd 28 V-Eval Board Version 1.0 5.20 Reset Push-button Switch Figure 5-20 Reset Switch To manually reset VNC1L device a ‘RESET’ Push-button switch SW2 is provided. 5.21 ‘PROG’ LED Figure 5-21 LED ‘PROG’ This red LED is provided to indicate that VNC1L is in Flash programming mode. © Copyright 2008 Future Technology Devices International Ltd 29 V-Eval Board Version 1.0 6 Connecting to host PC Connect USB A/B cable to board’s CN4 USB connector. Connect the other end of cable to a free USB connector on your computer. Power up the board. The new hardware will be detected and Found New Hardware Wizard will run. 6.1 Drivers installation. Figure 6-1 Drivers installation Please select the ‘No, not this time’ option and click Next button. Figure 6-2 Drivers installation Select ‘Install from specific location (Advanced)’ option and click ‘Next’ button. © Copyright 2008 Future Technology Devices International Ltd 30 V-Eval Board Version 1.0 Figure 6-3 Drivers installation Click ‘Browse’ button, navigate to drivers directory and click ‘Next’ button. Figure 6-4 Drivers installation Click ‘Continue Anyway’ button. © Copyright 2008 Future Technology Devices International Ltd 31 V-Eval Board Version 1.0 Figure 6-5 Drivers installation The driver files will now be copied to your system. Figure 6-6 Drivers installation Click ‘Finnish’ button to complete installation. © Copyright 2008 Future Technology Devices International Ltd 32 V-Eval Board Version 1.0 The USB device built into the V-Eval Board is a composite USB device. It has two USB Serial Converters and two USB Serial Ports. After you click Finish, a new Found New Hardware Wizard window appears asking to install drivers for another device. This is for the “USB Serial Converter B” part of the composite USB device. Follow the same instructions as above to install the drivers for this device. The Found New Hardware Wizard will appears two times more. This is to install the drivers for the “USB Serial Port”. Again, follow the same instructions above to install the drivers for this device. For more information about drivers installation please refer to the FTDI’s web site at http://www.ftdichip.com/Drivers/D2XX.htm You can find a drivers installation guide is at http://www.ftdichip.com/Documents/InstallGuides.htm © Copyright 2008 Future Technology Devices International Ltd 33 V-Eval Board Version 1.0 7 V-Eval Board Control Panel application. To demonstrate basic functions of the V-Eval Board the CD-ROM containing Control Panel application is supplied. Please run program ‘VEval.exe’. Form the drop-down list at the top of program window select ‘V-Eval-1 Board’ port. Click ‘Open’ button to open communication channel between V-Eval Board and Control Panel application. Control Panel can work in one of three modes: 7.1 Terminal Mode This mode works similarly to Hyper Terminal program. Additionally there are few options to control the VNC1L device. Upper window is for sending commands and data to VNC1L device and displaying responses from it. Every character you type in this window will be immediately sent over USB Serial Port to VNC1L device monitor port. Lower window displays all communication traffic in HEX format. On right hand side of Control Panel window additional options to control the VNC1L device are provided. 7.1.1 ‘Options - Mode’ tab Figure 7-1 Control Panel – Terminal mode ‘Reset VNC1’ – if you click this option the Control Panel will put VNC1L in reset state by pulling its ‘RESET’ pin low. ‘Run VNC1’ – click this option to release VNC1L from reset state by pulling ‘RESET’ pin high. ‘Suspend’ – this option will put VNC1L device in suspend state. ‘Resume’ button – click this button to resume VNC1L device from suspend state. ‘Command Mode’ – when this option is enabled the VNC1L DSR# pin is pulled high by the Control Panel App. You can send commands to VNC1L monitor port to configure communication parameters or to configure a suitable FTDI device connected to USB1 port on V-Eval Board. Access to Flash Disk connected to USB2 port on V-Eval Board is also allowed. © Copyright 2008 Future Technology Devices International Ltd 34 V-Eval Board Version 1.0 ‘Data Mode’ – if this option is enabled the VNC1L is in data mode. The DSR# pin of VNC1L is pulled low. This mode is provided to send/receive data to/from any device connected to USB1 or USB2 ports on VNC1L EVB. The VNC1L will act like a bridge between device connected to his USB host ports and Control Panel Application. The commands will not be interpreted and executed by VNC1L command monitor. ‘Enable RTS’ – this option enables serial interface of Control Panel. V-Eval Board can send data to Control Panel receive buffer. ‘Disable RTS’ – if this option is checked the V-Eval Board is not allowed to send data to Control Panel App. 7.1.2 Options - ‘RS232 Setup’ tab: Figure 7-2 Control Panel – Options – RS232 Setup Here you can change communication interface baudrate. Select desired baurate from ‘BaudRate’ dropdown list and click ‘Set’ button. © Copyright 2008 Future Technology Devices International Ltd 35 V-Eval Board Version 1.0 7.1.3 Options - ‘Disk Transfer’ tab Figure 7-3 Control Panel – Options – Disk Transfer This tab is provided to demonstrate file transfer between Flash Disk connected to USB2 port on V-Eval Board and Control Panel App. ‘Send File (OPW/WRF)’ button – click this button to open the Open File dialog window. Navigate to file that you want to send to Flash Disk and click ‘OK’. First OPW (Open File For Writing) command is sent to VNC1L device if specified file name is not on Flash Disk, VNC1L device is creating the new file and open it for writing. Then WRF (Write File) command is sent followed by value of ‘Block Size to use for Write’ edit box or if the ‘Use File Size’ check box is checked the size of file is sent after the WRF command. After the prompt is received from VNC1L device the file contents are sent to Flash Disk. If ‘Use File Size’ check box is checked entire file is sent to Flash Disk in one chunk of data. ‘Receive File (RD)’ button – click this button to specify name of file to read to (file with the same name must be on Flash Disk) click OK. The contents of file specified will be read back to your PC’s hard disk. ‘Receive File (OPR/RDF)’ button – this button works similarly to ‘Read File (RD)’ except you can specify ‘Block Size to use for Read’ to read the file in specified pieces of data or check ‘Use File Size’ to read entire file in one chunk of data. © Copyright 2008 Future Technology Devices International Ltd 36 V-Eval Board Version 1.0 7.1.4 Options - ‘Slave File I/O’ tab Figure 7-4 Control Panel – Options – Slave File I/O This tab demonstrates ability to transfer data between an FTDI (FT232, FT245, FT2232) device connected to USB1, USB2 port on V-Eval Board and Control Panel App. Before data transmission is possible you need to Set Current (SC) device and switch VNC1L to data mode. ‘Send File’ button – click this button, navigate to file you want to sent and click OK. File will be sent to FT2xx slave device on USB1 port of V-Eval Board. ‘Rcv File’ button – click this button to open the Open File dialog and set the name of file you want to receive, Click OK. All data received from FT2xx device connected to USB1 or USB2 port on V-Eval Board will be saved on your PC’s hard disk. After the file has been received please click ‘Close File’ button. © Copyright 2008 Future Technology Devices International Ltd 37 V-Eval Board Version 1.0 7.2 Spy Mode Figure 7-5 Control Panel – Spy Mode This mode is intended to track all communication between V-Eval Board and other serial device (e.g. Microcontroller) connected to V-Eval Board. To open spy select desired baudrate from drop-down list and click ‘Set’ button, then click ‘Open Spy’ button. You can change the baudrate when spy is already opened. Simply select new baurate and click ‘Set’ button. Upper window displays data in ASCII format. All data received by VNC1L device is displayed in red colour and all data transmitted by VNC1L device is displayed in blue colour. Lower window displays data in HEX format for debug purposes. Like in ASCII window all data received by VNC1L device is displayed in red and all data transmitted by VNC1L is displayed in blue. If ‘Track Commands’ check box is checked all decoded commands and answers will be displayed in green colour. You need to setup the ‘Extended Cmd Set’ or ‘Short Cmd Set’ and ‘Input is Hex’ or ‘Input is ASCII’ to spy to work properly, according to V-Eval Board communication parameters. © Copyright 2008 Future Technology Devices International Ltd 38 V-Eval Board Version 1.0 7.3 Programming Mode Figure 7-6 Control Panel – Programming Mode You can reprogram VNC1L device’s Flash Program Memory using this mode. The interface is very straight forward, and all reprogramming process is done automatically. Simply click ‘Select File’ button, navigate to VNC1L’s ROM file and then click ‘Program’ button. © Copyright 2008 Future Technology Devices International Ltd 39 V-Eval Board Version 1.0 8 V-Eval Board Schematics. The V-Eval Board schematics can be found at the end of this document. © Copyright 2008 Future Technology Devices International Ltd 40 V-Eval Board Version 1.0 9 Contact Information Head Office - Glasgow, UK Future Technology Devices International Limited 373 Scotland Street Glasgow G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 Fax: +44 (0) 141 429 2758 E-Mail (Sales): [email protected] E-Mail (Support): [email protected] E-Mail (General Enquiries): [email protected] Web Site URL: http://www.vinculum.com Web Shop URL: http://apple.clickandbuild.com/cnb/shop/ftdichip Branch Office - Taiwan Future Technology Devices International Limited (Taiwan) 4F, No 16-1, Sec. 6 Mincyuan East Road Neihu District Taipei 114 Taiwan, R.O.C. Tel: +886 2 8791 3570 Fax: +886 2 8791 3576 E-Mail (Sales): [email protected] E-Mail (Support): [email protected] E-Mail (General Enquiries): [email protected] Web Site URL: http://www.vinculum.com Branch Office - Hillsboro, Oregon, USA Future Technology Devices International Limited (USA) 7235 NW Evergreen Parkway, Suite 600 Hillsboro, OR 97124-5803 USA Tel: +1 (503) 547-0988 Fax: +1 (503) 547-0987 E-Mail (Sales): [email protected] E-Mail (Support): [email protected] E-Mail (General Enquiries): [email protected] Web Site URL: http://www.vinculum.com Distributors and Sales Representatives Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) in your country. © Copyright 2008 Future Technology Devices International Ltd 41 1 2 3 VCC3V3 4 VCC3V3 FB1 FB2 600R/0.5A A VCC5V LED2 Red Programming Mode C6 100nF BC[3..0] BC[3..0] 11 12 13 14 15 16 18 19 BC0 BC1 BC2 BC3 20 21 22 23 17 30 40 VCCIO VCCIO VCCIO USB1DP 26 USB1DM USB1DP R7 USB2DM (ACBUS0) (ACBUS1) (ACBUS2) (ACBUS3) (ACBUS4) (ACBUS5) (ACBUS6) (ACBUS7) USB2DP RESET PROG (BDBUS0) (BDBUS1) (BDBUS2) (BDBUS3) (BDBUS4) (BDBUS5) (BDBUS6) (BDBUS7) 2xPGB1010603 FB3 R9 C11 100nF USB2DM R10 USB2DP GND 27R USB2DM USB2DP 9 RESET# 10 PROG# RESET# C13 47pF PROG# PLLFLTR XTIN 6 XTOUT TEST 5 SHLD C R11 180R 8 C17 68pF VCC3V3 C18 10nF AC5 AC6 JP1 GND MODE0 | MODE1 | Interface type 0 | 0 | SERIAL UART 0 | 1 | SPI 1 | 0 | FIFO 1 | 1 | SERIAL UART C23 47uF Interface type configuration jumpers C15 1nF Decoupling capacitors. Place close to IC XL4 Title R12 47k XL5 Size: A4 Number: 1 JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JP2 R13 47k PLL_EN AD1 SIP3 MODE0 SIP3 MODE1 R14 47k JP3 SIP2 Remote Wakeup GND Revision: 1 Sheet 1 of 5 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com File: VNC1L_Eval.SchDoc 2 3 AD7 GND Future Technology Devices International Ltd. V-Eval-1 Board VNC1L Block Date: 13/02/2008 Time: 09:31:07 1 USB SKT A Y1 12MHz GND XL3 CR4 4 C16 68pF C19 C20 C21 C22 100nF 100nF 100nF 100nF XL2 CR3 B 7 Interface mode select jumpers: XL1 C14 47pF 600R/0.5A C12 10uF JP16 SIP2 CN3 1 VBUS 2 D3 D+ 4 GND 2xPGB1010603 (BCBUS0)/PS2CLK1 (BCBUS1)/PS2DATA1 (BCBUS2)/PS2CLK2 (BCBUS3)/PS2DATA2 GND SHLD GND VCC3V3 D USB SKT A USB1DP 27R 28 CR2 GND R8 27R 29 CR1 USB1DM 27R 25 C10 47pF VCC5V AGND C BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 USB1DM GND PROG# A 1 BD[7..0] (ADBUS0) (ADBUS1) (ADBUS2) (ADBUS3) (ADBUS4) (ADBUS5) (ADBUS6) (ADBUS7) R5 R6 10k 10k C9 47pF 2 BD[7..0] AC0 41 AC1 42 AC2 43 44 AC3 AC4 45 AC5 46 47 AC6 PLL_EN 48 B 31 32 33 34 35 36 37 38 GND GND GND GND AC[6..0] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 VCORE GND AD[7..0] U2 VNC1-1L 1 24 27 39 AC[6..0] AVCC AD[7..0] 3 C8 100nF 2 R4 330R 600R/0.5A C7 10uF JP15 SIP2 CN2 1 VBUS 2 D3 D+ 4 GND 4 D 1 2 3 4 5 VCC3V3 VCC5V 6 7 8 VCC3V3 VCC5V A A CN5 RP1 8x10k C36 100nF VCC5V C37 10uF C38 10uF GND IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 C39 100nF GND J1 IO_RESET# IO_PROG# B BC3 BC2 BC1 BC0 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 R36 R37 R39 R40 R41 R42 R44 R45 R46 R47 R48 R49 AC6 AC5 AC4 AC3 AC2 AC1 AC0 AD7 AD6 AD5 AD4 R50 R51 R52 R53 R54 R55 R56 R59 R60 R61 R62 AD2 AD0 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R R63 100R R65 IO_BC3 IO_BC2 IO_BC1 IO_BC0 IO_BD7 IO_BD6 IO_BD5 IO_BD4 IO_BD3 IO_BD2 IO_BD1 IO_BD0 IO_AC6 IO_AC5 IO_AC4 IO_AC3 IO_AC2 IO_AC1 IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 100R C56 C57 100nF 10uF C GND C54 100nF GND C55 10uF VCC5V 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GND C40 10uF 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 IO_AC3 IO_AC2 IO_AC1 IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Header 12 GP PORT AD[7..0] C41 100nF VCC3V3 C44 10uF GND VCC3V3 VCC5V GND WR RD# TXE# RXF# D7 D6 D5 D4 D3 D2 D1 D0 VCC5V FB5 Header 16 FIFO INTERFACE C42 C43 R34 100nF 10uF 4k7 C45 100nF GND CN8 12 11 10 9 8 7 6 5 4 3 2 1 RP2 8x10k IO_AC6 IO_AC5 IO_AC4 IO_AC3 IO_AC2 IO_AC1 IO_AC0 VCC5V GND C48 10uF IO_BC3 GND VCC3V3 VCC5V IO_BC2 CN9 AC6 AC5 AC4 AC3 AC2 AC1 AC0 12 11 10 9 8 7 6 5 4 3 2 1 IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 Header 12 GP PORT AC[6..0] C49 100nF VCC3V3 GND 600R/0.5A R35 4k7 CN7 JP4 R38 SIP2 100R JP5 R43 SIP2 100R 1 2 3 4 5 6 C46 47pF TXDEN# RI# DCD# DSR# DTR# CTS# RTS# RXD TXD C47 47pF CR7 CR8 B CN_PS2-6PIN 2xPGB1010603 SHLD PS2 MOUSE GND VCC5V FB6 C50 C51 R57 100nF 10uF 4k7 Header 12 UART INTERFACE 600R/0.5A R58 4k7 GND GND VCC3V3 VCC5V C52 10uF C53 100nF IO_BC1 CN11 RP3 8x10k 12 11 10 9 8 7 6 5 4 3 2 1 IO_BD7 IO_BD6 IO_BD5 IO_BD4 IO_BD3 IO_BD2 IO_BD1 IO_BD0 PROTOTYPE_AREA GND VCC5V GND C60 10uF GND IO_BC0 VCC3V3 VCC5V BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 CN10 JP6 R64 SIP2 100R JP7 R66 SIP2 100R 1 2 3 4 5 6 C58 47pF C59 47pF CR9 CR10 S VCC3V3 12 11 10 9 8 7 6 5 4 3 2 1 S CN6 CN_PS2-6PIN C CN12 1 2 3 4 5 6 7 8 IO_AD0 IO_AD1 IO_AD2 IO_AD3 Header 12 GP PORT BD[7..0] C61 100nF VCC3V3 GND 2xPGB1010603 GND SHLD PS2 KEYBOARD SCLK SDI SDO CS Header 8 SPI INTERFACE GND IO_AD1 IO_AD3 IO_RESET# IO_PROG# C62 10uF IO_AD1 C63 100nF IO_AD3 GND IO_RESET# IO_PROG# D D AD[7..0] AD[7..0] AC[6..0] AC[6..0] Title BD[7..0] BD[7..0] XL7 XL8 XL9 XL10 Size: A3 BC[3..0] BC[3..0] Number: 2 Date: 13/02/2008 Time: 09:31:57 JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm 1 2 3 Future Technology Devices International Ltd. V-Eval-1 Board IO Connectors Revision: 1 Sheet 2 of 5 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com File: VNC1L_Eval_IO.SchDoc 4 5 6 7 8 1 2 3 4 A A VBUS SW1 JP9 VCC5V U1 AIC1735-33CY/PY Vin SW-SPDT B Vout C1 47uF B R1 220R GND SIP3 CN1 VCC3V3 C2 100nF C3 10uF C4 100nF LED1 Green 3 2 1 Power Jack 2.1mm GND GND R2 POWER ON No fit 1M C5 No fit 1nF/250V GND SHLD Shields to system ground connection, at power jack only C C R3 0R GND FID1 FID_MARK D FID3 FID_MARK FID2 FID_MARK MH1 Mounting hole 3.5mm FID4 FID_MARK MH3 Mounting hole 3.5mm SHLD MH2 Mounting hole 3.5mm MH4 Mounting hole 3.5mm Title LOG1 Vinculum Logo XL16 Logo Vinculum 15mm Size: A4 Number: 5 Revision: 1 Date: 13/02/2008 Time: 09:32:32 JUMPER-2.54mm 1 2 Future Technology Devices International Ltd. V-Eval-1 Board Power Supply Sheet 5 of 5 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com File: VNC1L_Eval_PWR.SchDoc 3 4 D 1 2 3 4 A A VCC3V3 User LEDs R73 BD0 100R B R74 RESET# BD1 R75 LED10 LED9 LED8 LED7 LED6 Green Green Green Green Green R79 220R JP10 SIP2 BD4 R80 220R JP11 SIP2 BD5 220R JP12 SIP2 BD6 R82 220R JP13 SIP2 BD7 R83 220R JP14 SIP2 AC5 B 100R BD2 100R R76 100R R78 BD3 100R R72 AC6 100R SW2 SW3 GND GND SW4 GND SW5 GND SW6 GND R81 SW7 GND LED Enable jumpers LOCAL KEYBOARD BD[7..0] C AC[6..0] Title D XL11 XL12 XL13 XL14 XL15 BD[7..0] C AC[6..0] Size: A4 Number: 3 Revision: 1 Date: 13/02/2008 Time: 09:32:59 JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm 1 Future Technology Devices International Ltd. V-Eval-1 Board Keyboard & LEDs Sheet 3 of 5 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com File: VNC1L_Eval_KBRD_LEDS.SchDoc 2 3 4 D 1 2 VBUS 3 VCC5V 4 VCC3V3 R15 470R A C27 10uF VCC3V3 C28 C29 R16 R17 100nF 100nF 10k 10k LED3 Green R18 220R U3 6 CN4 GND GND GND R23 27R R25 27R C32 47pF C33 47pF 2xPGB1010603 5 C35 27pF FT_RESET# 4 48 GND R32 10k U4 C 1 VCC NC X16 GND CS SK DIN DOUT EEPROM_93C46 1 2 3 4 2 R33 2k2 47 RESET 40 39 38 37 36 35 33 32 EECS EESK EEDATA TEST GND GND R31 20k XTOUT R21 100R R22 100R R24 100R 15 13 12 11 10 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 A_TXD AD0 A_RTS# AD2 AD5 AD4 AD6 AD7 IO_AD1 AD1 B_RTS# IO_AD3 R30 100R B_DTR# IO_RESET# B_RI# VCC3V3 C64 100nF AD1 R68 100R 4 AD3 R69 100R 7 RESET# R70 100R 9 PROG# R71 100R 12 8 Title JUMPER-2.54mm 2 1A 1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 2A 3A 4A GND 2 3 5 6 11 10 14 13 A_TXD IO_AD1 A_RTS# IO_AD3 B_RTS# IO_RESET# B_DTR# IO_PROG# GND Future Technology Devices International Ltd. V-Eval-1 Board FT2232D Interface Size: A4 Number: 4 Revision: 1 Date: 13/02/2008 Time: 09:33:30 1 VCC GND XL6 GND OE S C 16 SN74CBT3257D B_RI# SIP3 D IO_PROG# U5 15 1 JP8 IO_RESET# VCC5V R67 10k FT2232D AD[7..0] R77 100R IO_AD3 IO_PROG# B_RXLED# B IO_AD1 100R 41 PWREN RESET# PROG# R29 GND AD[7..0] R20 220R RESET# PROG# B_RI# GND A A_RXLED# A_TXLED# 30 29 28 27 26 BCBUS0 BCBUS1 BCBUS2 BCBUS3 SI/WU B 25 34 GND XTIN Y2 6MHz 44 24 23 22 21 20 19 17 16 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 SI/WU A GND GND R28 10k 8 7 6 5 RSTOUT 1 27pF SHLD GND 2 VCC5V VCC5V USBDP C34 43 B USBDM 9 18 R27 0R CR6 7 R26 1k5 USB SKT-B CR5 8 3V3OUT AGND VBUS DD+ GND GND 45 1 2 3 4 R19 220R LED5 Green A_RXLED# A_TXLED# B_RXLED# 14 31 C31 100nF VCCIOA VCCIOB C30 100nF 3 42 C25 C26 100nF 100nF VCC VCC C24 10uF AVCC C65 10nF 46 GND LED4 Yellow Sheet 4 of 5 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com File: VNC1L_Eval_FT2232D_IF.SchDoc 3 4 D