RENESAS M62343GP

M62343GP
8-Bit, 3-Channel D/A Converter (Buffered)
REJ03F0075-0300
Rev.3.00
Mar 25, 2008
Description
The M62343GP is a CMOS-structure semiconductor integrated circuit incorporating three 8-bit D/A converter channels
with output buffer op-amps.
Serial data transfer type input can easily be used through a combination of three lines: DI, CLK, and LD.
Outputs incorporate buffer op-amps that have a drive capacity of 1 mA or above for both sink and source, and can
operate over the entire voltage range from almost ground to VCC (0 to 5 V), making peripheral elements unnecessary
and enabling configuration of a system with few component parts.
This product is currently under development, and specifications and other details may be modified at a future date.
Features
• Data transfer format
10-bit serial data input type
• Output buffer op-amps
Operable over entire voltage range from almost ground to VCC (0 to 5 V)
• High output current capacity
±1 mA or higher
Application
Signal gain setting and automatic adjustment in DSC, CTV, and display monitors, conversion from digital data to
analog data in consumer and industrial products
Block Diagram
VCC
LD
CLK
DI
GND
4
8
7
6
5
10-bit shift register
Power-on
reset
8
Channel
decoder
8-bit latch
8-bit latch
8-bit latch
8-bit upper
segment R-2R
8-bit upper
segment R-2R
8-bit upper
segment R-2R
+ −
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 1 of 7
+ −
+ −
1
2
3
AO1
AO2
AO3
M62343GP
Pin Arrangement
M62343GP
AO1
1
8
LD
AO2
2
7
CLK
AO3
3
6
DI
VCC
4
5
GND
(Top view)
Outline: PTSP0008JB-B (TTP-8DV) (recommend)
PTSP0008JA-A (8P2J-A) (discontinued PKG)
Pin Description
Pin No.
6
7
Symbol
DI
CLK
Function
Serial data input pin. Inputs serial data with a 10-bit data length.
Serial clock input pin. Input signal from DI pin is input to 10-bit shift register at rise of
shift clock.
8
LD
Load pin. When “H” level is input to LD pin, value in 10-bit shift register is loaded into
decoder and D/A output register.
1
2
3
4
5
AO1
AO2
AO3
VCC
GND
8-bit resolution D/A converter output pins
(After power-on, all channels are reset and DAC data 00h is output.)
Power supply voltage pin
GND pin
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 2 of 7
M62343GP
Absolute Maximum Ratings
Item
Power supply voltage
Input voltage
Output voltage
Internal power consumption
Operating ambient temperature
Storage temperature
Symbol
Rated Value
–0.3 to 7.0
–0.3 to VCC+0.3 ≤ 7.0
–0.3 to VCC+0.3 ≤ 7.0
200
–20 to +85
–40 to +125
VCC
Vin
VO
Pd
Topr
Tstg
Unit
V
V
V
mW
°C
°C
Electrical Characteristics
(Unless specified otherwise, VCC = +5 V ±10%, GND = 0 V, Ta = -20ºC to 85ºC)
Symbol
Specification Values
Min
Typ
Max
Unit
Power supply voltage
Power supply current
VCC
ICC
2.7
0
5.0
0.8
5.5
2.7
V
mA
0
0.6
1.8
Input leakage current
Input voltage “L”
IILK
VIL
–10
0
—
—
10
0.2Vcc
µA
V
Input voltage “H”
VIH
Buffer amp output
voltage range
VAO
IAO
—
—
—
—
Vcc
Vcc−0.1
Vcc−0.2
1.0
V
V
Buffer amp output
drive range
0.5Vcc
0.1
0.1
–1.0
mA
Upper saturation voltage = 0.3 V
Lower saturation voltage = 0.2 V
Differential
nonlinearity error
Nonlinearity error
Zero point error
Full-scale error
SDL
–1.0
—
1.0
LSB
VCC = 5.12 V (20 mV/LSB)
No load (IAO = 0)
SL
SZERO
SFULL
—
—
—
1.5
2.0
2.0
0.1
LSB
LSB
LSB
µF
5.0
—
Ω
Item
Oscillation limit output
capacitance
CO
–1.5
–2.0
–2.0
—
Buffer amp output
impedance
RO
—
Test Conditions
At CLK = 1 MHz operation, IAO = 0 µA
D/A data: 6 Ah (at maximum current)
DI = CLK = LD = GND, IAO = 0 µA
VIN = 0 to VCC
IAO = ±100 µA
IAO = ±500 µA
AC Characteristics
(Unless specified otherwise, VCC = +5 V ±10%, GND = 0 V, Ta = -20ºC to 85ºC)
Symbol
Specification Values
Min
Typ
Max
Clock “L” pulse width
Clock “H” pulse width
Clock rise time
Clock fall time
Data setup time
Data hold time
Load setup time
Load hold time
Load “H” pulse width
tCKL
tCKH
tCR
tCF
tDCH
tCHD
tCHL
tLDC
tLDH
200
200
—
—
30
60
200
100
100
—
—
—
—
—
—
—
—
—
—
—
200
200
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
D-A output settling time
tLDD
—
—
300
µs
Item
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 3 of 7
Unit
Test Conditions
Until output reaches last 1/2 LSB
M62343GP
Timing Chart
tCR
tCKH
tCF
CLK
tCKL
tLDC
DI
tDCH
tCHD
tLDH
LD
tCHL
tLDD
D/A
output
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 4 of 7
M62343GP
Digital Data Format
First
MSB
Last
LSB
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
for channel
address
For D/A output
D/A Data
D0
0
1
0
1
D1
0
0
1
1
D2
0
0
0
0
D3
0
0
0
0
D4
0
0
0
0
D5
0
0
0
0
D6
0
0
0
0
D7
0
0
0
0
D-A output
VCC/256×1
VCC/256×2
VCC/256×3
VCC/256×4
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VCC/256×255
VCC/256×256
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
⋅⋅
⋅
Channel Select Data
D8
0
1
0
1
D9
0
0
1
1
Channel Selection
AO1 selected
AO2 selected
AO3 selected
Don’t care
Data Timing Chart (Model)
DI
D9
D8
D7
CLK
LD
D/A
output
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 5 of 7
D6
.....
.....
D3
D2
D1
D0
M62343GP
Usage Notes
1. With this IC, D/A converter upper reference voltage setting is performed by means of the power supply voltage. If
ripples or spikes are imposed on this pin, conversion accuracy may fall. When using this IC, a capacitor must be
inserted between the power supply pin and GND in order to ensure stable D/A conversion.
2. The output buffer amps of this IC are highly tolerant of capacitive loads. Therefore, connecting capacitors (0.1 µF
max.) between the output pins and ground in order to eliminate jitter or noise due to output line wiring presents no
problems whatever in terms of operation.
Sample Standard Application Circuit
1
AO1
2
AO2
3
AO3
4
+
10 µF
V CC
LD 8
Analog voltage
output pins
CLK 7
DI 6
5V
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 6 of 7
GND 5
MCU
M62343GP
Package Dimensions
Package Name
TSSOP-8
JEITA Package Code
P-TSSOP8-4.4 × 3-0.65
RENESAS Code
PTSP0008JB-B
Previous Code
TTP-8DV
MASS[Typ.]
0.034g
F
*1 D
8
5
c
Index mark
HE
*2 E
bp
4
1
Z
NOTE)
1. DIMENSIONS "*1(Nom)" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
Terminal cross section
*3 bp
(Ni/Pd/Au plating)
x M
e
Reference Dimension in Millimeters
Symbol
Min
D
E
A2
A1
A
bp
b1
c
c1
A1
A
L1
L
y
HE
e
x
y
Z
L
L1
Detail F
JEITA Package Code
P-TSSOP8-4.4x3-0.65
Previous Code
8P2J-A
0.10 0.15
0.20
0°
8°
6.20 6.40 6.60
0.65
0.13
0.10
0.805
0.40 0.50 0.60
1.0
MASS[Typ.]
0.04g
5
*1
E
8
RENESAS Code
PTSP0008JA-A
0.03 0.07 0.10
1.10
0.15 0.20 0.25
HE
Package Name
TSSOP-8
Nom Max
3.00 3.30
4.40
F
A2
1
A1
4
Index mark
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
c
*2
D
L
A
Reference Dimension in Millimeters
Symbol
e
y
*3 bp
x
Detail F
D
E
A2
A
A1
bp
c
HE
e
x
y
L
REJ03F0075-0300 Rev.3.00 Mar 25, 2008
Page 7 of 7
Min
2.9
4.3
Nom Max
3.0 3.1
4.4 4.5
1.0
1.2
0.1 0.2
0
0.2 0.25 0.32
0.14 0.15 0.2
0°
8°
6.2 6.4 6.6
0.65
0.13
0.10
0.3 0.5 0.7
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