TS556 Low-power dual CMOS timer Datasheet - production data Description The TS556 is a dual CMOS timer which offers a very low consumption: (Icc(TYP) TS556 = 220 µA at VCC = 5 V versus Icc(TYP) NE556(a) = 6 mA), SO14 (plastic micropackage) and high frequency: (f(max.) TS556 = 2.7 MHz versus f(max.) NE556(a) = 0.1 MHz) Pin connections (top view) In both monostable and astable modes, timing remains very accurate. Discharge 1 14 +VS Threshold Control Voltage Reset 2 13 Discharge 3 12 4 11 Threshold Control Voltage Reset Output 5 10 Trigger 6 9 Output GND 7 8 Trigger The TS556 provides reduced supply current spikes during output transitions, which enables the use of lower decoupling capacitors compared to those required by bipolar NE556(a). Due to the high input impedance (1012 Ω), timing capacitors can also be minimized. Features • Very low power consumption: – 220 µA typ at VCC = 5 V – 180 µA typ at VCC = 3 V • High maximum astable frequency 2.7 MHz • Pin-to-pin and functionally compatible with bipolar NE556(a) • Wide voltage range: 2 V to 16 V • Supply current spikes reduced during output transitions • High input impedance: 1012 Ω • Output compatible with TTL, CMOS and logic MOS a. Terminated product June 2015 This is information on a product in full production. DocID4078 Rev 3 1/19 www.st.com Contents TS556 Contents 1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 2 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 4.1 Monostable operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Astable operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 SO14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 DocID4078 Rev 3 TS556 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Parameter VCC Supply voltage IOUT Output current (1) Value Unit 18 V ± 100 mA Rthja Thermal resistance junction to ambient Rthjc Thermal resistance junction to case (1) 31 Junction Temperature 150 Tj Tstg ESD 105 Storage Temperature Range -65 to 150 Human body model (HBM) (2) 1200 Machine model (MM) (3) Charged device model (CDM) °C/W °C V 200 (4) 1000 1. Short-circuits can cause excessive heating. These values are typical and specified for a four layers PCB. 2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins remain floating. 4. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground. Table 2. Operating conditions Symbol Parameter VCC Supply voltage IOUT Output sink current Output source current Toper Operating free air temperature range DocID4078 Rev 3 Value Unit 2 to 16 V 10 50 mA -40 to 125 °C 3/19 19 R1 4/19 R2 DocID4078 Rev 3 50k Ω R6 50k Ω R5 50k Ω R4 50k Ω R3 C ontrol Volta ge 50k Ω Τ1 Τ5 Τ4 Τ2 Τ6 Thres hold Τ7 Τ8 Τ9 R7 Τ11 Τ10 Τ14 Τ15 Τ12 Τ18 Τ13 GND Τ16 Τ20 CC R ESET Τ17 Τ19 T rigger Τ21 Τ22 Τ23 Τ25 Τ24 Τ26 Τ28 Τ27 Τ29 Τ30 Τ32 Τ31 Τ33 Τ35 Dis charge Τ34 Output 2 50k Ω V Schematic diagram TS556 Schematic diagram Figure 1. Schematic diagram (1/2 TS556) TS556 Schematic diagram Figure 2. Block diagram VCC Reset TS556 4 / 10 14 R R1 2 / 12 Threshold Control Voltage Q + Output 5/9 R - A 3 / 11 S R + Trigger 6/8 - B R 1 / 13 Discharge 7 Ground Table 3. Functions table Reset Trigger Low x Low High Note: High Threshold x Output Low High High Low Low Previous state Low: level voltage ≤ minimum voltage specified High: level voltage ≥ maximum voltage specified x: irrelevant DocID4078 Rev 3 5/19 19 Electrical characteristics 3 TS556 Electrical characteristics Table 4. Static electrical characteristics VCC = 2 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol 6/19 Parameter Min. Typ. Max. Unit 130 400 400 µA 1.3 1.4 1.5 0.05 0.2 0.25 1 100 0.1 0.3 0.35 ICC Supply current (no load, high and low states) Tmin ≤Tamb ≤Tmax VCL Control voltage level Tmin ≤Tamb ≤Tmax VDIS Discharge saturation voltage (Idis = 1 mA) Tmin ≤Tamb ≤Tmax IDIS Discharge pin leakage current VOL Low level output voltage (Isink = 1 mA) Tmin ≤Tamb ≤Tmax VOH High level output voltage (Isource = -0.3 mA) Tmin ≤Tamb ≤Tmax 1.5 1.5 1.9 VTRIG Trigger voltage Tmin ≤Tamb ≤Tmax 0.4 0.3 0.67 ITRIG Trigger current 10 ITH Threshold current 10 VRESET Reset voltage Tmin ≤Tamb ≤Tmax IRESET Reset current 1.2 1.1 0.4 0.3 1.1 10 DocID4078 Rev 3 V nA V 0.95 1.05 pA 1.5 2.0 V pA TS556 Electrical characteristics Table 5. Static electrical characteristics VCC = 3 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 180 460 460 µA 2 2.2 2.3 0.05 0.2 0.25 1 100 0.1 0.3 0.35 ICC Supply current (no load, high and low states) Tmin ≤Tamb ≤Tmax VCL Control voltage level Tmin ≤Tamb ≤Tmax VDIS Discharge saturation voltage (Idis = 1 mA) Tmin ≤Tamb ≤Tmax IDIS Discharge pin leakage current VOL Low level output voltage (Isink = 1 mA) Tmin ≤Tamb ≤Tmax VOH High level output voltage (Isource = -0.3 mA) Tmin ≤Tamb ≤Tmax 2.5 2.5 2.9 VTRIG Trigger voltage Tmin ≤Tamb ≤Tmax 0.9 0.8 1 ITRIG Trigger current 10 ITH Threshold current 10 VRESET Reset voltage Tmin ≤Tamb ≤Tmax IRESET Reset current 1.8 1.7 0.4 0.3 1.1 10 DocID4078 Rev 3 V nA V 1.1 1.2 pA 1.5 2.0 V pA 7/19 19 Electrical characteristics TS556 Table 6. Dynamic electrical characteristics VCC = 3 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Timing accuracy (monostable) (1) R = 10 kΩ, C = 0.1 µF, VCC= 2 V R = 10 kΩ, C = 0.1 µF, VCC = 3 V fmax 0.5 Timing shift with temperature (1) Tmin ≤Tamb ≤Tmax 75 Maximum astable frequency (2) RA = 470 Ω, RB = 200 Ω, C = 200 pF 2 — 5 0.5 tR Output rise time (Cload = 10 pF) 25 tF Output fall time (Cload = 10 pF) 20 Trigger propagation delay 100 Minimum reset pulse width (Vtrig = 3 V) 350 tRPW 1. See Figure 4 2. See Figure 6 DocID4078 Rev 3 Unit % %/V Timing shift with supply voltage variations (astable mode) (2) RA = RB = 10 kΩ, C = 0.1 µF, VCC = 3 to 5 V tPD Max. 1 1 Timing shift with supply voltage variations (monostable) (1) R = 10 kΩ, C = 0.1 µF, VCC = 3 V ± 0.3 V Astable frequency accuracy (2) RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF 8/19 Typ. ppm/°C MHz — % %/V ns TS556 Electrical characteristics Table 7. Static electrical characteristics VCC = 5 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 220 500 500 µA 3.3 3.8 3.9 0.2 0.3 0.35 1 100 0.3 0.6 0.8 ICC Supply current (no load, high and low states) Tmin ≤Tamb ≤Tmax VCL Control voltage level Tmin ≤Tamb ≤Tmax VDIS Discharge saturation voltage (Idis = 10 mA) Tmin ≤Tamb ≤Tmax IDIS Discharge pin leakage current VOL Low level output voltage (Isink = 8 mA) Tmin ≤Tamb ≤Tmax VOH High level output voltage (Isource = -2 mA) Tmin ≤Tamb ≤Tmax 4.4 4.4 4.6 VTRIG Trigger voltage Tmin ≤Tamb ≤Tmax 1.36 1.26 1.67 ITRIG Trigger current 10 ITH Threshold current 10 VRESET Reset voltage Tmin ≤Tamb ≤Tmax IRESET Reset current 2.9 2.8 0.4 0.3 1.1 10 DocID4078 Rev 3 V nA V 1.96 2.06 pA 1.5 2.0 V pA 9/19 19 Electrical characteristics TS556 Table 8. Dynamic electrical characteristics VCC = 5 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Timing accuracy (monostable) (1) R = 10 kΩ, C = 0.1 µF Maximum astable frequency (2) RA = 470 Ω, RB = 200 Ω, C = 200 pF 2.7 Output fall time (Cload = 10 pF) 20 Trigger propagation delay 100 Minimum reset pulse width (Vtrig = 5 V) 350 DocID4078 Rev 3 % 0.1 tF 2. See Figure 6 MHz %/V 25 1. See Figure 4 ppm/°C — 3 Output rise time (Cload = 10 pF) tRPW 10/19 — tR tPD % %/V 75 Timing shift with supply voltage variations (astable mode) (2) RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF, VCC = 5 to 12 V Unit 0.38 Timing shift with temperature (1) Tmin. ≤Tamb ≤Tmax Astable frequency accuracy (2) RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF Max. 2 Timing shift with supply voltage variations (monostable) (1) R = 10 kΩ, C = 0.1 µF, VCC = 5 V ± 1 V fmax Typ. ns TS556 Electrical characteristics Table 9. Static electrical characteristics VCC = 12 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 340 800 800 µA 8 8.6 8.7 0.09 1.6 2.0 1 100 1.2 2 2.8 ICC Supply current (no load, high and low states) Tmin ≤Tamb ≤Tmax VCL Control voltage level Tmin ≤Tamb ≤Tmax VDIS Discharge saturation voltage (Idis = 80 mA) Tmin ≤Tamb ≤Tmax IDIS Discharge pin leakage current VOL Low level output voltage (Isink = 50 mA) Tmin ≤Tamb ≤Tmax VOH High level output voltage (Isource = -10 mA) Tmin ≤Tamb ≤Tmax 10.5 10.5 11 VTRIG Trigger voltage Tmin ≤Tamb ≤Tmax 3.2 3.1 4 ITRIG Trigger current 10 ITH Threshold current 10 VRESET Reset voltage Tmin ≤Tamb ≤Tmax IRESET Reset current 7.4 7.3 0.4 0.3 1.1 V nA V 4.8 4.9 pA 1.5 2.0 10 V pA Table 10. Dynamic electrical characteristics VCC = 12 V, Tamb = 25 °C, reset to VCC (unless otherwise specified) Symbol Parameter Min. Timing accuracy (monostable) (1) R = 10 kΩ, C = 0.1 µF Astable frequency accuracy (2) RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF Timing shift with supply voltage variations (astable mode) RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF, VCC = 5 to 12 V Unit % %/V 0.38 Timing shift with temperature Tmin ≤Tamb ≤Tmax, VCC = 5 V Maximum astable frequency RA = 470 Ω, RB = 200 Ω, C = 200 pF, VCC = 5 V Max. 4 Timing shift with supply voltage variations (monostable) R = 10 kΩ, C = 0.1 µF, VCC = 5 V ± 1 V fmax Typ. ppm/°C 75 — — 2.7 3 0.1 MHz % %/V 1. See Figure 4 2. See Figure 6 DocID4078 Rev 3 11/19 19 Electrical characteristics TS556 Figure 3. Supply current (per timer) versus supply voltage S U P P L Y C U R R E NT , I CC ( A) 300 200 100 0 4 8 12 SUPPLY VOLTAGE, V C C (V) 12/19 DocID4078 Rev 3 16 TS556 Application information 4 Application information 4.1 Monostable operation In monostable mode, the timer operates like a one-shot generator. Referring to Figure 2, the external capacitor is initially held discharged by a transistor inside the timer, as shown in Figure 4. Figure 4. Application schematic VC C Reset R Trigger 1/2 TS556 C Out Control Voltage 0.01 F The circuit triggers on a negative-going input signal when the level reaches 1/3 VCC. Once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this interval. The duration of the output HIGH state is given by t = 1.1 R x C. It can be noticed that since the charge rate and the threshold level of the comparator are both directly proportional to the supply voltage, the timing interval is independent of the supply. Applying a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2) during the timing cycle, discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. While the reset pulse is applied, the output is driven to the LOW state. When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentially with the time constant τ = R x C. When the voltage across the capacitor equals 2/3 VCC, the comparator resets the flip-flop which then discharges the capacitor rapidly and drives the output to its LOW state. Figure 5 shows the actual waveforms generated in this mode of operation. When reset is not used, it should be tied high to avoid any possible or false triggering. Figure 5. Timing diagram t = 0.1 ms / div INPUT = 2.0V/div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 2.0V/div R = 9.1k , C = 0.01 F , R L = 1.0k DocID4078 Rev 3 13/19 19 Application information 4.2 TS556 Astable operation When the circuit is connected as shown in Figure 6 (pins 2 and 6 connected) it triggers itself and runs as a multivibrator. The external capacitor charges through RA and RB and discharges through RB only. Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operation, C charges and discharges between 1/3 VCC and 2/3 VCC. As in the triggered mode, the charge and discharge times and therefore frequency, are independent of the supply voltage. Figure 6. Application schematic VC C Reset RA Out 1/2 TS556 Control Voltage 0.01 F RB C Figure 7 shows the actual waveforms generated in this mode of operation. The charge time (output HIGH) is given by: t1 = 0.693 (RA + RB) C and the discharge time (output LOW) by: t2 = 0.693 x RB x C Thus the total period, T, is given by: T = t1 + t2 = 0.693 (RA + 2RB) C The frequency of oscillation is then: 1 1.44 f = --- = -------------------------------------T (RA + 2RB )C The duty cycle is given by: RB D = --------------------------RA + 2RB Figure 7. Timing diagram t = 0.5 ms / div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 1.0V/div R = R = 4.8 k , C = 0.1 F , R L = 1.0k A B 14/19 DocID4078 Rev 3 TS556 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID4078 Rev 3 15/19 19 Package information 5.1 TS556 SO14 package information Figure 8. SO14 package outline Table 11. SO14 mechanical data Dimensions Millimeters Inches Ref. Min. Typ. Max. Min. 1.35 1.75 0.05 0.068 A1 0.10 0.25 0.004 0.009 A2 1.10 1.65 0.04 0.06 B 0.33 0.51 0.01 0.02 C 0.19 0.25 0.007 0.009 D 8.55 8.75 0.33 0.34 E 3.80 4.0 0.15 0.15 1.27 0.05 H 5.80 6.20 0.22 0.24 h 0.25 0.50 0.009 0.02 L 0.40 1.27 0.015 0.05 k ddd 16/19 Max. A e Note: Typ. 8° (max.) 0.10 0.004 D and F dimensions do not include mold flash or protrusions. Mold flash or protrusions must not exceed 0.15 mm. DocID4078 Rev 3 TS556 6 Ordering information Ordering information Table 12. Order code table Order code TS556IDTTR Temperature range Package Packaging Marking -40 °C to 125 °C SO14 Tape and reel 556I DocID4078 Rev 3 17/19 19 Revision history 7 TS556 Revision history Table 13. Document revision history Date Revision 01-Feb-2003 1 Initial release. 2 Document reformatted. Added output current, ESD and thermal resistance values in Table 1: Absolute maximum ratings. Added output current values in Table 2: Operating conditions. Updated Section 5.1: DIP14 package information and Section 5.1: SO14 package information. 3 Features and Description: added footnote to NE556 product to explain it is terminated. Removed all references to DIP14 package Removed all temperature ranges except -40 to 125 °C Table 12: Order code table: removed all order codes of revision 2 and added new order code TS556IDTTR. 28-Oct-2008 30-Jun-2015 18/19 Changes DocID4078 Rev 3 TS556 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID4078 Rev 3 19/19 19