CDB4220/1/2/3/4 Evaluation Board for CS4220/1/2/3/4 Features General Description l Demonstrates The CDB4220 evaluation board is an excellent means for quickly evaluating the CS4220/1/2/3/4 family of stereo audio CODECS. Evaluation requires an analog signal source and analyzer, digital signal source and analyzer, PC compatible computer for device control and a power supply. recommended layout and grounding arrangements l CS8412 receives AES/EBU, S/PDIF and EIAJ-340 compatible data l CS8402A transmits AES/EBU, S/PDIF and EIAJ-340 compatible data l Stereo Analog I/O l DSP port for external serial audio I/O l Windows 95® software interface to control CS4221/2/4 l Digital and Analog patch areas System timing can be provided by the CS8412 digital audio receiver, DSP Port or an on-board oscillator. Stereo analog input (XLR) and stereo analog output (coax) is provided. Digital I/O is provided through either the S/PDIF or DSP port. An SPI/I2C serial control port allows the CS4221/2/4 to be configured and controlled using the supplied Windows 95® software. ORDERING INFORMATION: CDB4220, CDB4221, CDB4222, CDB4223, CDB4224 Control Port CS4221/22/24 Analog Input (XLR) Analog Input Buffer CS8402A S/PDIF Outputs CS422x Analog Output (Coax) Analog Output Buffer CS8412 S/PDIF Inputs DSP Port for Clocks & Data Preliminary Product Information P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright Cirrus Logic, Inc. 2000 (All Rights Reserved) APR ‘00 DS284DB1 1 CDB4220/1/2/3/4 TABLE OF CONTENTS 1. 2. 3. 4. 5. 6. 7. 8. 9. CDB4220 SYSTEM OVERVIEW .............................................................................................. 3 CS4220/1/2/3/4 CODEC ........................................................................................................... 3 CS8412 DIGITAL AUDIO RECEIVER ...................................................................................... 3 CS8402A DIGITAL AUDIO TRANSMITTER ............................................................................ 3 ANALOG INPUT BUFFER ....................................................................................................... 3 ANALOG OUTPUT BUFFER ................................................................................................... 3 DSP PORT ................................................................................................................................ 3 POWER SUPPLY CIRCUITRY ................................................................................................. 3 CDB4221/2/4 CONTROL PORT SOFTWARE ......................................................................... 4 LIST OF FIGURES Figure 1. Analog In .......................................................................................................................... 7 Figure 2. Analog Out ....................................................................................................................... 8 Figure 3. I/O for Clocks and Data.................................................................................................... 9 Figure 4. CS422x .......................................................................................................................... 10 Figure 5. Control Port Interface ..................................................................................................... 11 Figure 6. Power Supply ................................................................................................................. 12 Figure 7. CS8412 Digital Audio Receiver...................................................................................... 13 Figure 8. CS8402A Digital Audio Transmitter ............................................................................... 14 Figure 9. Top ................................................................................................................................. 15 Figure 10. Top Silkscreen ............................................................................................................. 16 Figure 11. Bottom Silkscreen ........................................................................................................ 17 LIST OF TABLES Table 1. CDB4220-4 Jumper Selectable Options ........................................................................... 5 Table 2. CDB4220-4 Default Jumper Settings ................................................................................ 6 Table 3. System Connections ......................................................................................................... 6 Contacting Cirrus Logic Support For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts/ Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com. 2 DS284DB1 CDB4220/1/2/3/4 1. CDB4220 SYSTEM OVERVIEW The CDB4220 evaluation board is an excellent means of quickly evaluating the CS4220/1/2/3/4 family of stereo audio codecs. Input and output analog interfaces are provided, and a CS8412 digital audio interface receiver and CS8402A digital audio interface transmitter provide an easy interface to digital audio signal sources including the majority of digital audio test equipment. The evaluation board allows you to supply external clock and data signals through the 20-pin DSP port. divides the MCLK by 2 to generate the proper clock signal. 5. ANALOG INPUT BUFFER The CDB4220 schematic is partitioned into eleven schematics as shown in Figures 1 though 11. The analog inputs of the CDB4220/1/2/3/4 use dual op-amps to implement the AC coupled input buffer. This buffer also performs DC level shifting; a resistive divider supplies an approximate 2.3V bias voltage to the op-amps to set the input bias to the converter inputs. The inputs are digitally filtered after conversion to eliminate any offset. A nominal 5.66 Vpp drive to the buffer will apply a 2V rms differential input to the CS4220/1/2/3/4 resulting in a full-scale output. 2. CS4220/1/2/3/4 CODEC 6. ANALOG OUTPUT BUFFER A complete description of each member of the CS4220/1/2/3/4 family is included in each respective product datasheet. Each DAC output drives an op-amp that is configured as a differential to single-ended converter. This circuit also performs two-pole Butterworth filtering and is AC coupled to the output jack. Note that the signal paths through the evaluation board are non-inverting. 3. CS8412 DIGITAL AUDIO RECEIVER Performance of the DAC can be quickly tested by connecting a S/PDIF audio source to the CS8412. The S/PDIF signal may be input through either the optical or coax connector, see Figure 7. Please note that the two input connectors must not be driven simultaneously. The interface for the CS8412 includes a serial bit clock, serial data, left-right clock (FSYNC) and a 256 Fs master clock. The recovered MCLK, SCLK and LRCK provide the necessary clocks for the CS4220/1/2/3/4. 4. CS8402A DIGITAL AUDIO TRANSMITTER Performance of the ADC can be quickly tested by connecting an analog generator to the left and right inputs and connecting the S/PDIF optical or coaxial output to audio test equipment. The evaluation board relies on the CS8412 or external clocking signals input through the DSP port for all clocking. The recovered clock from the CS8412 receiver has a frequency of 256 Fs. The CS8402A requires a master clock frequency of 128 Fs, and the 74HC74 DS284DB1 7. DSP PORT The DSP HEADER (J5) port provides an interface to the serial audio clocks and data of the CS4220/1/2/3/4 and may be used to interface to external digital signal processors for ease in evaluating complete digital audio system solutions. Please note that when the DSP HEADER port is enabled, care should be exercised in using these signals because these lines require the proper buffers to enabled. By setting the DSP mode byte through the control port (CS4221/2/4) or setting the appropriate jumpers (CS4220/3), the data format can be modified to accommodate different DSP processors. 8. POWER SUPPLY CIRCUITRY Power is supplied to the evaluation board through four binding posts (-12V, +12V, AGND, +5VA) as shown in Figure 6. The +5VA input provides the +5 Volt power to the CS4220/1/2/3/4. Digital power is derived from the analog supply with a resistor and 3 CDB4220/1/2/3/4 additional decoupling capacitors. The ±12 V binding posts carry power to the analog input and output buffers. All power supply connections are bypassed with transient suppression diodes and bulk filtering capacitors. 9. CDB4221/2/4 CONTROL PORT SOFTWARE The CDB4220 is shipped with Windows based software for interfacing with the CS4221/2/4 control port through the DB25 connector, J18. The software can be used to communicate with the CS4221/2/4 in either SPI or I2C mode. Please note that the control port registers are write-only when SPI mode is used. Run SETUP.EXE from the distribution diskette to install the software. Further documentation for the software is available on the distribution diskette in the plain text format file, README.TXT. 4 DS284DB1 CDB4220/1/2/3/4 JUMPER PURPOSE POSITION DISABLE DSP SLAVE FUNCTION SELECTED J6 Select DSP port as slave J7 Select DSP port as master DISABLE Configures DSP Port for master mode operation* DSP MASTER J8 Enable DSP port, enabling serial data I/O DISABLE Enables DSP Port operation* DSP ENABLE Disables DSP Port operation* J9 Selects CS422x MCLK source J10 Selects Loopback or Normal routing of data 1 0 Loopback - Routes SDOUT from A/D to SDIN of D/A Normal Operation J11 Selects which codec is on the evaluation board 1 0 CS4220/1/3/4 CS4222 J12 DEM0 1 0 See CS422x datasheet for details J13 DIF0(SDA/CDIN) 1 0 See CS422x datasheet for details J14 DIF1 1 0 See CS422x datasheet for details J15 CS422x Master/Slave Select 1 0 CS422x is configured for slave mode operation CS422x is configured for master mode operation J16 SMUTE (CS4222 only) 1 0 Disables Soft Mute function of CS4222 Enables Soft Mute function of CS4222 J17 DEM1 1 0 See CS422x datasheet for details J19 Selects which codec is on the evaluation board 4220/3 4221/2/4 J24 CS8412 Master/Slave Select S M J25 RCV PWR OPEN CONNECT Disables +5V power to CS8412 Supplies +5V power to CS8412 J26 CS8412 SDATA Routing OPEN CONNECT Routes SDATA to SDIN of CS422x 8412 DSP Configures DSP Port for slave mode operation* CS422x MCLK supplied from CS8412 CS422x MCLK supplied from DSP Port CS4220/3 CS4221/2/4 CS8412 is configured for slave mode operation CS8412 is configured for master mode operation J27 CS8412 SCK Routing OPEN CONNECT Routes SCK to SCLK of CS422x J29 CS8412 FSYNC Routing OPEN CONNECT Routes FSYNC to LRCK of CS422x OPEN CONNECT Routes SDOUT to SDATA of CS8402A J31 CS422x SDOUT Routing Table 1. CDB4220-4 Jumper Selectable Options * DSP Port jumper labels on evaluation board are backwards. Please see schematic for clarification. DS284DB1 5 CDB4220/1/2/3/4 J6 J7 J8 J9 J10 J11 PURPOSE Select DSP port as slave* Select DSP port as master* Enable DSP port, enabling serial data I/O* Selects CS422x MCLK source Selects Loopback/Normal routing of data Selects which codec is on the evaluation board DEM0 DIF0(SDA/CDIN) DIF1 CS422x Master/Slave Select J12 J13 J14 J15 J16 SMUTE (CS4222 only) J17 DEM1 J19 Selects which codec is on the evaluation board J24 CS8412 Master/Slave Select J25 RCV PWR J26 CS8412 SDATA Routing J27 CS8412 SCK Routing J29 CS8412 FSYNC Routing J31 CS422x SDOUT Routing CS4220 SLAVE MASTER ENABLE CS4221 SLAVE MASTER ENABLE CS4222 SLAVE MASTER ENABLE CS4223 SLAVE MASTER ENABLE CS4224 SLAVE MASTER ENABLE 8412 1 1 8412 1 1 8412 1 0 8412 1 1 8412 1 1 1 0 0 1 OPEN OPEN 1 OPEN 1 OPEN 1 1 OPEN 1 1 1 0 0 1 OPEN OPEN 1 OPEN 1 OPEN 1 1 OPEN 0 1 0 1 1 OPEN 0 M CONNECT OPEN CONNECT CONNECT CONNECT M CONNECT OPEN CONNECT CONNECT CONNECT M CONNECT OPEN CONNECT CONNECT CONNECT M CONNECT OPEN CONNECT CONNECT CONNECT M CONNECT OPEN CONNECT CONNECT CONNECT Table 2. CDB4220-4 Default Jumper Settings * DSP Port jumper labels on evaluation board are backwards. Please see schematic for clarification. CONNECTOR INPUT/OUTPUT +5VA Input +5 Volt Power SIGNAL PRESENT AGND Input Analog Ground connection from power supply +12V Input +12 Volt Power for op-amps -12V Input -12 Volt Power for op-amps LEFT Input Left channel analog input through XLR connector RIGHT Input Right channel analog input through XLR connector ANALOG OUT LEFT Output Left channel analog output through coaxial connector ANALOG OUT RIGHT Output Right channel analog output through coaxial connector XMITTER Output Digital audio interface output through coaxial connector XMITTER OPT2 Output Digital audio interface output through optical connector RCVR Input Digital audio interface input through coaxial connector OPT1 RCVR Input Digital audio interface input through optical connector J18 Input/Output I/O for I2C or SPI control port signals through DB25 connector DSP HEADER Input/Output I/O for external serial audio data and clock signals Table 3. System Connections 6 DS284DB1 DS284DB1 + 2 - U1A 22 10uF 50V C4 C5 R3 100pF 100pF 7.87K OPA2134 -12V 1 C3 R2 OPA2134 1 U3B 7 6 5 C6 2200pF 4 2 1 10K 1M C7 .1uF C9 C10 R6 100pF 100pF 7.87K -12V R7 5 10K U1B 7 R8 AINL- -12V C15 C16 R14 100pF 100pF 7.87K 2 + 2 - U2A OPA2134 RIGHT -12V 1 AINR+ R13 C17 +12V .1uF 150 R15 10K 8 22 8.45K 3 C14 + 10K C12 8 7.87K 10uF 50V C13 .1uF 4 1 R12 A5V R10 R11 + +12V 150 10uF 50V C11 .1uF 4 7.87K OPA2134 1 + 1 6 + R9 +12V - 10uF 50V 8 C8 J2 150 R5 R4 +12V TP1 3 AINL+ 10pF 8 LEFT J1 3 4 1 + + 7.87K C2 - R1 C1 .1uF 8 +12V 3 TP2 1 1 U3A 3 - 2 C18 2200pF C20 C21 R16 100pF 100pF 7.87K 4 -12V R18 1M + 1 6 R20 7.87K U2B 7 R17 10K OPA2134 R19 C22 C23 .1uF 4 5 + +12V - 10uF 50V 8 C19 -12V Figure 1. Analog In 10pF 150 AINR- 7 CDB4220/1/2/3/4 2 1 OPA2134 + 8 1 + C24 AOUTL+ R21 R22 2 8.25K C25 1.82K C27 .1uF C26 10uF 50V 390pF R23 8.25K +12V 8 1800pF TP3 3 + J3 PHONO-JACK LEFT 1 1 2 U4A 4 -12V OPA2134 AOUTL- 1 + C28 R24 R25 2 8.25K C29 390pF 1.82K C30 +12V 10uF 50V R26 1800pF + 8.25K + AOUTR+ 1 + C31 R27 8.25K R28 C32 -12V 1.82K R29 8.25K C33 -12V C34 .1uF 390pF 4 1800pF C70 1uF 50V 2 10uF 50V C69 1uF 50V TP4 5 + 1 - U4B 8 6 7 OPA2134 J4 PHONO-JACK RIGHT +12V + 1 R30 R31 2 8.25K C37 C36 390pF 1.82K 10uF 50V R32 1800pF 8.25K DS284DB1 Figure 2. Analog Out CDB4220/1/2/3/4 C35 AOUTR- DS284DB1 D5V 1 14 NC VCC A5V U7C C38 7 74VHC125 .1uF 8 GND Out U5 9 .1uF 74VHC125 14 XCO C72 .1uF 8 10 12.288 MHz U6A 74VHC125 3 HDR10X2 D5V U6B 6 5 MCLK_DSP SCLK_422x 8 HDR3X1 D5V J7 DISABLE 1 2 3 4 19 17 15 13 11 9 7 5 3 1 DSP SLAVE 1 2 3 J6 HDR3X1 9 DISABLE DSP MASTER 13 J5 10 DSP Header 20 18 16 14 12 10 8 6 4 2 2 1 7 C71 U6C U6D 11 12 74VHC125 LRCK_422x 74VHC125 74VHC125 U7A XTO DISABLE 1 J9 DSP ENABLE HDR3X1 NOT STUFFED 6 SDIN_422x D5V 1 2 3 HDR3X1 R33 NOT STUFFED 5 R34 U7B D5V TP6 R35 74VHC125 Y1 49.9 13 1 MCLK_DSP C39 39pF CRYSTAL C40 12 11 39pF U7D 74VHC125 Figure 3. I/O for Clocks and Data 9 CDB4220/1/2/3/4 1 2 3 SDOUT_422x 4 TP5 J8 XTI 2 1 MCLK_8412 3 10 SDIN_422x J10 LOOP BACK R36 49.9 1 2 3 SDOUT_422x R37 49.9 C41 2.2 Ohms 1uF 50V .1uF C42 + NC NC U8 CS422x XTO /RST XTI AOUTLLRCK AOUTL+ AOUTR+ SCLK AOUTRVD DGND AGND VA SDOUT SDIN AINL+ DIF1 (SCL/CCLK) AINLDIF0 (SDA/CDIN) DEM1 (I2C/SPI) DEM0 (AD0/CS) ANIR+ 5V/3.3V AINRNC NC TP7 TP8 TP9 TP10TP11TP12TP13TP14TP15TP16TP17 1 1 1 1 1 1 1 1 1 1 AINR- AINR+ I2C/SPI AINL- AINL+ AOUTR- AOUTL+ AOUTL- XTI XTO LRCK_422x R39 49.9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 /RST_422x SCL/CCLK SDA/CDIN AD0/CS R40 R38 49.9 AOUTR+ SCLK_422x HDR3X1 A5V 28 27 26 25 24 23 22 21 20 19 18 17 16 15 C43 C44 .1uF 1uF 50V + TP18TP19TP20TP21TP22TP23TP24TP25TP26TP27TP28 1 1 1 1 1 1 1 1 1 1 1 1 2 3 A5V 4220/1/3/4 4222 J11 HDR3X1 R42 R43 R44 R45 47K 47K 2K 47K 47K 47K 47K DIF1 S/M /SMUTE DEM1 A5V A5V R47 A5V 1 2 3 1 2 3 A5V 1 2 3 SDA/CDIN A5V 1 2 3 1 2 3 A5V 1 2 3 DIF0 DEM0 R46 J12 J13 J14 J15 J16 J17 HDR3X1 HDR3X1 HDR3X1 HDR3X1 HDR3X1 HDR3X1 DS284DB1 Figure 4. CS422x CDB4220/1/2/3/4 R41 DS284DB1 D5V RN1 D5V 1K R48 1 47K D5V D1 D2 D3 D4 D5 D6 D7 D8 11 1 10 CLK OC GND Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 19 18 17 16 15 14 13 12 3 SDA/CDIN 74HCT125 SCL/CCLK AD0/CS I2C/SPI 2 20 2 3 4 5 6 7 8 9 U9A 2 .1uF _WRITE_EN _/RST_422x _SCL/CCLK _WRITE_SDA _AD0/CS _I2C/SPI D1 BAT85 U10 74HCT574 D5V 4220/3 4221/2/4 D5V D2 R55 R56 74HCT125 J19 HDR3X1 S1 1 5 R57 511 RESET 13 4.99K 511K 3 B3W_1100 9 C46 1uF 50V 12 U9D 74HCT125 C47 D5V .1uF Figure 5. Control Port Interface U9C 8 /RST_422x + 11 CDB4220/1/2/3/4 11 BAT85 10 5 Schottky Diodes D5V 2 _LATCH U9B 6 1 _READ_SDA 1 74HCT125 1 2 3 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 C45 D5V 4 J18 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 1 2 3 4 5 6 7 8 R49 R50 R51 R52 R53 R54 DB25M_RA 12 TP29 J20 TP30 R58 A5V D5V 2 C48 D3 RED .1uF C51 + TP31 .1uF 100uF 6.3V 1 100uF 6.3V 1 TP32 DGND 1 1 C49 2.2 Ohms C50 + P6KE6.8A J21 1 1 1 BLACK TP33 J22 +12V 2 1 1 C52 D4 BLUE C53 + P6KE13A .1uF TP34 1 1 100uF 16V 2 C54 C55 + D5 J23 P6KE13A .1uF TP35 100uF 16V 1 1 GREEN DS284DB1 Figure 6. Power Supply CDB4220/1/2/3/4 -12V 1 DS284DB1 D6 1 R59 1.10K 2 S/M LED D5V R60 J25 HDR2X1 C57 + 1uF 50V OPT1 OUT 2 L1 47uH 3 VCC 4 GND2 5 .01uF 1 GND1 CS8412 .1uF TP36 TP37 TP39 TP40 TP42 TP43 C58 D5V TP44 C61 1 1 1 1 1 1 1 1 2 3 4 5 6 7 8 9 10 11 12 13 1 14 TP46 C CD/F1 CC/F0 CB/E2 CA/E1 /C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U VERF CE/F2 SDATA ERF M1 M0 VA+ AGND FILT MCK M2 M3 SEL CBL 28 27 1 26 25 1 24 23 22 21 20 19 18 17 16 15 1 CONNECT TP38 .1uF R63 1 2 3 TP41 C59 J26 HDR3X1 SDIN_422x + C60 OPEN .1uF 1uF 50V 1 TP45 TP47 R64 R65 NC HDR3X1 R61 10 U11 NC 47K Receiver Power C56 6 J24 1 2 3 R62 49.9 1 2 3 J32 HDR3X1 1K 47K MCLK_8412 47K C62 TORX173 .047uF PHONO-JACK C63 .01uF J28 J27 1 2 3 J29 HDR3X1 R66 SCLK_422x 75 HDR3X1 LRCK_422x Figure 7. CS8412 Digital Audio Receiver 13 CDB4220/1/2/3/4 1 2 3 14 Q 12 D 11 CLK 6 Q Q 9 Q 8 74HC74 1 13 74HC74 U12B PR CL 5 CL U12A 4 CLK PR D 3 SCLK_422x LRCK_422x SDOUT_422x MCLK_8412 2 10 D5V D5V PHONO-JACK T1 D5V .1uF R67 374 J30 2 C64 1 8 4 5 R68 6 90.9 TRANSFORMER C65 SDOUT to 8402 .1uF J31 HDR2X1 OPT2 D5V D5V U13 NC CS8402 R69 /C7/C3 TRNPT/FC1 /PRO M2 /C1/FC0 M1 /C6/C2 M0 MCK TXP SCK VD+ FSYNC GND SDATA TXN V /RST C/SBF CBL/SBC U EM0/C9 /C9/C15 EM1/C8 24 23 22 21 20 19 18 17 16 15 14 13 GND 2 CLR 3 VCC 4 INPUT 6.19K D5V C67 .1uF 1 + C66 C68 1uF 50V .1uF NC 6 5 TOTX173 TP48 DS284DB1 /RST_422x Figure 8. CS8402A Digital Audio Transmitter CDB4220/1/2/3/4 1 2 3 4 5 6 7 8 9 10 11 12 1 DS284DB1 15 CDB4220/1/2/3/4 Figure 9. Top 16 CDB4220/1/2/3/4 DS284DB1 Figure 10. Top Silkscreen DS284DB1 17 CDB4220/1/2/3/4 Figure 11. Bottom Silkscreen