RD74LVC1G98 Configurable Multiple–Function Gate REJ03D0730–0100 Rev.1.00 Jul 26, 2006 Description The RD74LVC1G98 has configurable multiple–function gate in a 6-pin package. The Output state is determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non– Inverted Buffer, Data Selector. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • • • • • • The basic gate function is lined up as Renesas uni logic series. Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Output current: ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±24 mA (@VCC = 3.0 V) ±32 mA (@VCC = 4.5 V) • All the logical input has hysteresis voltage for the slow transition. • Ordering Information Part Name RD74LVC1G98WPE Package Type Package Code (Previous Code) Package Abbreviation WCSP-6 pin SXBG0006LA-A (TBS-6BV) WP Article Indication Marking Year code Month code K1YM Rev.1.00 Jul 26, 2006 page 1 of 9 Taping Abbreviation (Quantity) E (3,000 pcs/reel) RD74LVC1G98 Function Table Inputs IN1 L L H H L L H H IN2 L L L L H H H H Output Y H H L L H L H L IN0 L H L H L H L H H: High level L: Low level Pin Arrangement Height 0.4 mm 0.4 mm pitch 0.17 mm 6–Ball (WP) IN0 3 4 Y GND 2 5 VCC IN1 1 6 (Bottom view) 1.1 mm 0.7 mm Pin#1 INDEX IN2 (Top view) Logic Diagram IN0 Y IN1 IN2 Rev.1.00 Jul 26, 2006 page 2 of 9 RD74LVC1G98 Function Selection Table Logic Function 2 to 1 data Selector 2–inputs NAND 2–inputs NOR with one input inverted 2–inputs AND with one input inverted 2–inputs NAND with one input inverted 2–inputs OR with one input inverted 2–inputs NOR Non–Invert Buffer Inverter Rev.1.00 Jul 26, 2006 page 3 of 9 Figure No. 1 2 3 3 4 4 5 6 7 RD74LVC1G98 Logic Configurations VCC A/B A B A Y 1 (IN1) (IN2) 6 A/B 2 (GND) (VCC) 5 B 3 (IN0) (Y) 4 Y Figure 1 2 to 1 Data Selector VCC VCC A B A B 1 (IN1) (IN2) 6 A Y 2 (GND) (VCC) 5 Y B 3 (IN0) (Y) 4 1 (IN1) A B Y A B Y (IN2) 6 A 2 (GND) (VCC) 5 B Y 3 (IN0) (Y) 4 Y Figure 3 2–inputs NOR Gate with A input inverted Figure 2 2–inputs NAND Gate VCC VCC A B A B B 1 (IN1) (IN2) 6 A Y 2 (GND) (VCC) 5 Y 3 (IN0) (Y) 4 Y Figure 4 2–inputs NAND Gate with A input inverted A B Y A B Y B 1 (IN1) (IN2) 6 A 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Y Figure 5 2–inputs NOR Gate VCC 1 (IN1) A Y (IN2) 6 A 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Figure 6 Non–Invert Buffer Rev.1.00 Jul 26, 2006 page 4 of 9 VCC A A Y Y 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Figure 7 Inverter Y RD74LVC1G98 Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range *1, 2 VO Input clamp current Output clamp current Continuous output current IIK IOK IO Ratings –0.5 to 6.5 –0.5 to 6.5 –0.5 to VCC + 0.5 –0.5 to 6.5 –50 –50 ±50 ICC or IGND ±100 mA θja Tstg 123 –65 to 150 °C/W °C Continuous current through VCC or GND Package Thermal impedance Storage temperature Notes: Symbol VCC VI Unit V V V mA mA mA Test Conditions Output : H or L VCC : OFF VI < 0 VO < 0 VO = 0 to VCC WP The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. Recommended Operating Conditions Item Supply voltage range Input voltage range Output voltage range Symbol VCC VI VO IOL Output current IOH Min 1.65 0 0 — — — — Max 5.5 5.5 VCC 4 8 16 24 — — — — — 32 –4 –8 –16 –24 — Operating free-air temperature Ta –40 Note: Unused or floating inputs must be held high or low. Rev.1.00 Jul 26, 2006 page 5 of 9 –32 85 Unit V V V Conditions VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V mA VCC = 4.5 V VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V °C RD74LVC1G98 Electrical Characteristics Ta = –40 to 85°C Item Symbol Min 0.8 1.2 1.6 2.3 0.4 0.6 0.9 1.5 0.4 0.4 0.4 0.4 VCC–0.1 1.2 1.9 2.4 2.3 Typ — — — — — — — — — — — — — — — — — Max 1.4 1.7 2.3 3.0 0.7 1.0 1.4 2.0 0.7 0.8 0.9 1.0 — — — — — 3.8 — — — — — — — — — IIN 4.5 0 to 5.5 — — — — — 0.1 0.45 0.3 0.4 0.55 0.55 ±5 ICC 5.5 — — 10 VT+ Threshold voltage VT– ∆VT VOH VCC (V) 1.8 2.5 3.3 5.0 1.8 2.5 3.3 5.0 1.8 2.5 3.3 5.0 1.65 to 5.5 1.65 2.3 3.0 Output voltage VOL 4.5 1.65 to 5.5 1.65 2.3 3.0 Input current Quiescent supply current Unit Test condition V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –16 mA IOH = –24 mA V µA IOH = –32 mA IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = 5.5 V or GND VIN = VCC or GND, IO = 0 µA One input at VCC–0.6 V, Other input at VCC or GND Output leakage current IOFF 0 — — ±10 µA VIN or VO = 0 to 5.5 V Input capacitance CIN 3.3 — 3.5 — pF VIN = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. ∆ICC Rev.1.00 Jul 26, 2006 page 6 of 9 3 to 5.5 — — 500 RD74LVC1G98 Switching Characteristics VCC = 1.8±0.15 V Item Symbol tPLH tPHL Propagation delay time Ta = –40 to 85°C Min Max 3.2 14.4 Unit ns Test Conditions CL = 30 pF, RL = 1.0 kΩ FROM (Input) TO (Output) IN Y VCC = 2.5±0.2 V Item Symbol tPLH tPHL Propagation delay time Ta = –40 to 85°C Min Max 2.0 8.3 Unit ns Test Conditions CL = 30 pF, RL = 500 Ω FROM (Input) TO (Output) IN Y VCC = 3.3±0.3 V Item Symbol tPLH tPHL Propagation delay time Ta = –40 to 85°C Min Max 1.5 6.3 Unit ns Test Conditions CL = 50 pF, RL = 500 Ω FROM (Input) TO (Output) IN Y VCC = 5.0±0.5 V Item Symbol tPLH tPHL Propagation delay time Ta = –40 to 85°C Min Max 1.1 5.1 Unit ns Test Conditions CL = 50 pF, RL = 500 Ω FROM (Input) TO (Output) IN Y Operating Characteristics Item Symbol Power dissipation capacitance CPD 1.8 2.5 3.3 Min — — — Ta = 25°C Typ 23 23 23 Max — — — 5.0 — 26 — VCC (V) Unit pF Test Circuit Measurement point From Output CL * RL Note: CL includes probe and jig capacitance. Rev.1.00 Jul 26, 2006 page 7 of 9 Test Conditions f = 10 MHz RD74LVC1G98 • Waveforms tr tf Input VI 90% 90% Vref Vref 10% 10% t PLH GND t PHL VOH In phase output Vref Vref VOL VOH Vref Out of phase output Vref t PHL VOL t PLH Inputs VCC (V) Vref CL RL ≤ 2 ns VCC / 2 30 pF 1.0 kΩ ≤ 2 ns VCC / 2 30 pF 500 Ω 3 V ≤ 2.5 ns 1.5 V 50 pF 500 Ω VCC ≤ 2.5 ns VCC / 2 50 pF 500 Ω VI tr / tf 1.8±0.15 VCC 2.5±0.2 VCC 3.3±0.3 5.0±0.5 Notes: 1. Input waveform : PRR ≤ 10 MHz, Zo = 50 Ω. 2. The output are measured one at a time with one transition per measurement. Rev.1.00 Jul 26, 2006 page 8 of 9 RD74LVC1G98 Package Dimensions JEITA Package Code S-XFBGA6-0.7x1.1-0.40 RENESAS Code SXBG0006LA-A MASS[Typ.] 0.001g Previous Code TBS-6BV D e ZD ZE C E B e B A 1 Pin #1 index 2 C 6×φb φx M C A B φx M C C Reference Symbol Dimension in Millimeters Min Nom A A A2 A1 Seating plane y C A1 D *Reference value. 0.110 0.140 (0.235) * A2 b 0.19 0.15 0.70 E 1.10 e 0.40 x 0.05 y Rev.1.00 Jul 26, 2006 page 9 of 9 Max 0.40 0.05 ZD 0.15 ZE 0.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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