LC75843UGAGEVB LC75843UGA LCD Driver IC Evaluation Board User'sManual Overview http://onsemi.com The LC75843UGAGEVB is an evaluation board for operation check of 1/1 to 1/4 duty general-purpose LCD driver IC (LC75843UGA). This evaluation board has a power supply circuit, a controller circuit, an LCD driver IC circuit, an LCD panel circuit, an LED circuit. Therefore, this evaluation board can facilitate the operation check (state setting and waveform monitor, etc.) of the LCD driver IC. In addition, this evaluation board can automatically demonstrate. EVAL BOARD USER’S MANUAL • Capable of Waveform Monitor of All Common • Features • This Evaluation Board is Equipped with a Controller, • • • and the Control of the LCD Driver IC is Possible by Serial Communication (CCB* Format) The 1/4 Duty LCD Panel is Implemented Capable of the LED Control by the General-purpose Port of the LCD Driver IC (Capable of the LED Brightness Adjustment by the PWM Control) • Outputs, All Segment Outputs and All General-purpose Port Outputs This Evaluation Board can Separate the Signal between Each Circuit Block. Therefore the External Input to an LCD Driver IC is Possible This Evaluation Board has the Demonstration Mode which Automatically Performs LCD Display and LED Control by Controller Control This Evaluation Board is Pb-free and RoHS Compliant *CCB® is ON Semiconductor’s original format. All addresses are managed by ON Semiconductor for this format. LCD Panel Circuit LCD Driver IC Circuit (LC75843UGA) Power Supply Circuit LED Circuit Controller Circuit Figure 1. Appearance of LCD Driver IC Evaluation Board (LC75843UGAGEVB) © Semiconductor Components Industries, LLC, 2014 April, 2014 − Rev. 0 1 Publication Order Number: EVBUM2231/D LC75843UGAGEVB SPECIFICATIONS Table 1. RECOMMENDED OPERATING CONDITIONS Value/Ratings Parameter Symbol Conditions Min Typ Max Unit 7.0 9.0 12.0 V Specifications of LCD Driver IC Evaluation Board (LC75843UGAGEVB) Main Power Supply Voltage 9Vin Pull-up Power Supply Voltage for LED VOUP When the jump socket of the JPUP is removed and an external power supply is inputted from VOUP pin. 4.5 5.0 6.3 V Main Power Supply Current IDD9V 9Vin = 9.0 V, When the switch of the P1 is set to H(1) and moving the “All ON test (DEMO mode = “1”)” mode. (This condition is a maximum current flow) − 125 − mA 200 mm × 150 mm, t = 1.6 mm Board Size Board Material Glass Epoxy (FR4), 2-levels, Copper Foil 35 mm Specifications of LCD Driver IC (LC75843UGA) Power Supply Voltage VDD When the jump socket of the JP5V is removed and an external power supply is inputted from VDD5V pin. 4.5 − 6.3 V Input High Level Voltage VIH1 When the jump sockets of the JPINH, JPCE, JPCL and JPDI are removed and an external signal is inputted from CE, CL, DI and INH pins. 0.4 VDD − 6.3 V VIH2 When the jump sockets of the JPGND, JP38K and JP300K are removed and an external clock is inputted from OSCI pin. 0.4 VDD − 6.3 V VIL1 When the jump sockets of the JPINH, JPCE, JPCL and JPDI are removed and an external signal is inputted from CE, CL, DI and INH pins. 0 − 0.2 VDD V VIL2 When the jump sockets of the JPGND, JP38K and JP300K are removed and an external clock is inputted from OSCI pin. 0 − 0.2 VDD V CCB Serial Clock Operating Frequency fCL When the jump socket of the JPCL is removed and an external signal is inputted from CL pin. − − 3.125 MHz External Clock Operating Frequency fCK When the jump sockets of the JPGND, JP38K and JP300K are removed and an external clock is inputted from OSCI pin. 10 300 600 kHz External Clock Duty Cycle DCK When the jump sockets of the JPGND, JP38K and JP300K are removed and an external clock is inputted from OSCI pin. 30 50 70 % Input Low Level Voltage Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. NOTE: We have a case to change these specifications without a notice for improvement. http://onsemi.com 2 LC75843UGAGEVB BLOCK DIAGRAM The following figure shows the block diagram of the LC75843UGAGEVB. 9Vin circuit Power Supply Circuit 1.5 V 3.3 V 5.0 V VDD Controller Circuit (FPGA) LCD Driver IC (LC75843UGA) 300 kHz Clock 1 38 kHz Clock 4 S1/P1 to S4/P4 4 LED Circuit (4ch) OSCI INH CE CL DI VSS S5 to S24, S28 COM1 to COM4 21 LCD Panel (1/4 duty) 4 Figure 2. Block Diagram of LCD Driver IC Evaluation Board (LC75843UGAGEVB) TEST PROCEDURE When the All Circuits in the LC75843UGAGEVB Board Are Used Oscilloscope Power Supply POW BUSY SEND GND 9Vin LCD Panel INH CH1 CH2 CH3 CH4 ON ERROR OFF POWER GND IC IC GND JPP4 JPP3 JPP2 JPP1 DEMO mode Jump Socket JPGND JP38K JP300K GND For example, CH1 : COM1 CH2 : S5 CH3 : S28 CH4 : S2/P2 L, L,L,L,L,H,L,H,L,L,L,L,L, OSCI VOUP L,L,L,L,L,L, JPINH JPCE JPCL JPDI JP5V JPUP DT0 DT1 INH CE CL DI VDD5V GND Figure 3. The Test Constitution when the All Circuits in the LC75843UGAGEVB Board Are Used http://onsemi.com 3 LC75843UGAGEVB 4. An automatic demonstration mode is selected by moving “DEMO mode” switch to the “9” position. 5. Set the following switches. About the setting contents details of the switch, refer to “Explanation of the Switches of Setting the Control Data”. 1. Connect the test setup as shown in Figure 3. 2. Insert the jump sockets of the JP5V, JPGND, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4, and remove the jump sockets of the DT0, DT1, JP38K and JP300K. 3. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. (The red LED monitor of the “POW” is turned on) Switches Functions Contents Which Are Set PF0 to PF3 PWM output waveform frame frequency select. The PWM output waveform frame frequency is 195 [Hz] by moving “PF0, PF1, PF2, PF3” switch to the “L(0), L(0), L(0), L(0)” position. FC0 to FC3 Common/Segment output waveform frame frequency select. The common/segment output waveform frame frequency is 97 [Hz] by moving “FC0, FC1, FC2, FC3” switch to the “L(0), H(1), L(0), H(1)” position. General-purpose output port (S1/P1) function select. L(0) : Low level output mode EXF P1 External clock operating frequency mode select at OC = H(1). L(0) : 300 kHz input operating mode OC Fundamental clock operating mode select. L(0) : Internal oscillator clock operating mode SC Display on/off select. L(0) : Normal display mode BU Power saving mode select. L(0) : Normal mode PWM output waveform duty select. When switch of the “DEMO mode” is set to “9”, duty of the PWM output waveform is automatically set, therefore switches of the “W0 to W5” are set to “L(0), L(0), L(0), L(0), L(0), L(0)” position. W0 to W5 • The customer can confirm that LEDs from P1 to P4 6. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the “Command Set” switch. (The green LED monitor of the “BUSY” and “INH” are turned on) 7. The customer can confirm the movement of the LCD display and LED brightness adjustment by the automatic demonstration. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). change brightly gradually. For example, when the DEMO mode is “9” • The green LED monitor of the “SEND” flashes quickly. • The customer can confirm that a “AUTO” characters and a PWM duty value are displayed to LCD. to http://onsemi.com 4 LC75843UGAGEVB When the External Power Supply Is Used Oscilloscope Power Supply POW BUSY SEND ON OFF LCD Panel INH GND 9Vin CH1 CH2 CH3 CH4 ERROR POWER GND IC IC GND JPP4 JPP3 JPP2JPP1 DEMO mode Jump Socket JPGND JP38K JP300K L, L,L,L,L,H,L,H,L,L,L,L,L, GND For example, CH1 : COM1 CH2 : S5 CH3 : S28 CH4 : S2/P2 Power Supply OSCI VOUP JPINH JPCE JPCL JPDI JP5V L,L,L,L,L,L, VDD5V GND JPUP DT0 DT1 INH CE CL DI Figure 4. The Test Constitution when the External Power Supply Is Used 3. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. (The red LED monitor of the “POW” is turned on) 4. Supply the voltage of the external power supply to “VDD5V” pin. The following specification shows the allowable operating ranges of LC75843UGA. 1. Connect the test setup as shown in Figure 4. 2. Insert the jump sockets of the JPGND, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4, and remove the jump sockets of the DT0, DT1, JP38K, JP300K and JP5V. Parameter Power Supply Voltage for LC75843UGA Symbol Min Typ Max Unit VDD 4.5 − 6.3 V “Explanation of the Switches of Setting the Control Data”. 5. An automatic demonstration mode is selected by moving “DEMO mode” switch to the “9” position. 6. Set the following switches. About the setting contents details of the switch, refer to http://onsemi.com 5 LC75843UGAGEVB Functions Switches Contents Which Are Set PF0 to PF3 PWM output waveform frame frequency select. The PWM output waveform frame frequency is 195 [Hz] by moving “PF0, PF1, PF2, PF3” switch to the “L(0), L(0), L(0), L(0)” position. FC0 to FC3 Common/Segment output waveform frame frequency select. The common/segment output waveform frame frequency is 97 [Hz] by moving “FC0, FC1, FC2, FC3” switch to the “L(0), H(1), L(0), H(1)” position. General-purpose output port (S1/P1) function select. L(0) : Low level output mode EXF External clock operating frequency mode select at OC = H(1). L(0) : 300kHz input operating mode OC Fundamental clock operating mode select. L(0) : Internal oscillator clock operating mode SC Display on/off select. L(0) : Normal display mode BU Power saving mode select. L(0) : Normal mode PWM output waveform duty select. When switch of the “DEMO mode” is set to “9”, duty of the PWM output waveform is automatically set, therefore switches of the “W0 to W5” are set to “L(0), L(0), L(0), L(0), L(0), L(0)” position. 7. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the “Command Set” switch. (The green LED monitor of the “BUSY” and “INH” are turned on) 8. The customer can confirm the movement of the LCD display and LED brightness adjustment by the automatic demonstration. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). (The green LED monitor of the “SEND” flashes quickly) P1 W0 to W5 When the Customer’s Original Controller Board Is Used Oscilloscope Power Supply POW BUSY SEND GND 9Vin OFF LCD Panel INH ON CH1 CH2 CH3 CH4 ERROR POWER GND IC IC GND JPP4 JPP3 JPP2 JPP1 DEMO mode Jump Socket JPGND JP38K JP300K L, L,L,L,L,L,L,L,L,L,L,L,L, GND OSCI VOUP L,L,L,L,L,L, For example, CH1 : COM1 CH2 : S5 CH3 : S28 CH4 : S2/P2 JPINH JPCE JPCL JPDI JP5V INH CE CL DI VDD5V GND JPUP Customer’s Original Controller Board DT0 DT1 GND DI CL CE INH Figure 5. The Test Constitution when the Customer’s Original Controller Board Is Used http://onsemi.com 6 LC75843UGAGEVB 4. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. (The red LED monitor of the “POW” is turned on) 5. The CCB serial data are transferred from a customer’s original controller board to LCD driver IC. The following specification shows the allowable operating ranges of LC75843UGA. 1. Connect the test setup as shown in Figure 5. 2. Insert the jump sockets of the JP5V, JPGND, JPUP, JPP1, JPP2, JPP3 and JPP4, and remove the jump sockets of the DT0, DT1, JP38K, JP300K, JPINH, JPCE, JPCL and JPDI. 3. The switch does not need to set because the switch on the evaluation board are not used. Parameter Symbol Min Typ Max Unit Input High Level Voltage VIH1 0.4 VDD − 6.3 V Input Low Level Voltage VIL1 0 − 0.2 VDD V CCB Serial Clock Operating Frequency fCL − − 3.125 MHz 6. Confirm a result of LCD display and the LED display controlled by the customer’s original controller board. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). When the LCD Display Is Driven by the External Clock Input Oscilloscope Power Supply POW BUSY SEND ON OFF LCD Panel INH GND 9Vin CH1 CH2 CH3 CH4 ERROR POWER GND IC IC GND JPP4 JPP3 JPP2 JPP1 DEMO mode Jump Socket JPGND GND JP38K JP300K For example, CH1 : COM1 CH2 : S5 CH3 : S28 CH4 : S2/P2 Clock Oscillator L, L,L,L,L,H,L,H,L,L,H,L,L, OSCI VOUP L,L,L,L,L,L, JPINH JPCE JPCL JPDI JP5V JPUP DT0 DT1 INH CE CL DI VDD5V GND Figure 6. The Test Constitution when the LCD Display Is Driven by the External Clock Input position. (The red LED monitor of the “POW” is turned on) 4. An automatic demonstration mode is selected by moving “DEMO mode” switch to the “9” position. 5. Set the following switches. About the setting contents details of the switch, refer to “Explanation of the Switches of Setting the Control Data”. When the LCD Display Is Driven by the Clock Oscillator 1. Connect the test setup as shown in Figure 6. 2. Insert the jump sockets of the JP5V, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4, and remove the jump sockets of the DT0, DT1, JPGND, JP38K and JP300K. 3. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” http://onsemi.com 7 LC75843UGAGEVB Functions Switches Contents Which Are Set PF0 to PF3 PWM output waveform frame frequency select. The PWM output waveform frame frequency is 195 [Hz] by moving “PF0, PF1, PF2, PF3” switch to the “L(0), L(0), L(0), L(0)” position. FC0 to FC3 Common/Segment output waveform frame frequency select. The common/segment output waveform frame frequency is 97 [Hz] by moving “FC0, FC1, FC2, FC3” switch to the “L(0), H(1), L(0), H(1)” position. General-purpose output port (S1/P1) function select. L(0) : Low level output mode EXF External clock operating frequency mode select at OC = H(1). L(0) : 300kHz input operating mode OC Fundamental clock operating mode select. H(1) : External clock operating mode SC Display on/off select. L(0) : Normal display mode BU Power saving mode select. L(0) : Normal mode PWM output waveform duty select. When switch of the “DEMO mode” is set to “9”, duty of the PWM output waveform is automatically set, therefore switches of the “W0 to W5” are set to “L(0), L(0), L(0), L(0), L(0), L(0)” position. P1 W0 to W5 6. Supply the external clock to “OSCI” pin. The following specification shows the allowable operating ranges of LC75843UGA. Parameter Symbol Min Typ Max Unit Input High Level Voltage VIH2 0.4 VDD − 6.3 V Input Low Level Voltage VIL2 0 − 0.2 VDD V External Clock Operating Frequency fCK 10 300 600 kHz External Clock Duty Cycle DCK 30 50 70 % 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the “Command Set” switch. (The green LED monitor of the “BUSY” and “INH” are turned on) 5. The customer can confirm the movement of the LCD display and LED brightness adjustment by the automatic demonstration. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). 7. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the “Command Set” switch. (The green LED monitor of the “BUSY” and “INH” are turned on) 8. The customer can confirm the movement of the LCD display and LED brightness adjustment by the automatic demonstration. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). When the LCD Display Is Driven by the 300 [kHz] External Clock Input 1. The LCD display is turned off by pushing the switch of “Command Set” and “PWM Set” at the same time more than two seconds. (The green LED monitor of the “BUSY” and “INH” are turned off) 2. Insert the jump socket of the JP300K, and remove the jump sockets of the JPGND and JP38K. The 301.205 [MHz] (50 MHz × 166 clock) clock output by the controller is input into an LCD driver IC by inserting a jump socket of the JP300K. 3. Move “OC” switch to the “H(1)” position and “EXF” switch to the “L(0)” position. When the LCD Display Is Driven by the 38 [kHz] External Clock Input 1. The LCD display is turned off by pushing the switch of “Command Set” and “PWM Set” at the same time more than two seconds. (The green LED monitor of the “BUSY” and “INH” are turned off) 2. Insert the jump socket of the JP38K, and remove the jump sockets of the JPGND and JP300K. The 37.994 [MHz] (50 MHz × 1316 clock) clock output by the controller is input into an LCD driver IC by inserting a jump socket of the JP38K. 3. Move “OC” switch to the “H(1)” position and “EXF” switch to the “H(1)” position. http://onsemi.com 8 LC75843UGAGEVB 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the “Command Set” switch. (The green LED monitor of the “BUSY” and “INH” are turned on) 5. The customer can confirm the movement of the LCD display and LED brightness adjustment by the automatic demonstration. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port outputs (P1 to P4). When the LCD Display Is Driven Using the LCD Driver IC in All Customer Original Environment Customer’s Original LCD Panel Board COM1 to COM4 Oscilloscope Original LCD Panel (1/4 duty) CH1 CH2 CH3 CH4 S1 to S24, S28 For example, CH1 : COM1 CH2 : S5 CH3 : S28 CH4 : S2/P2 POW BUSY SEND INH GND 9Vin ERROR OFF Power Supply POWER GND IC IC GND JPP4 JPP3 JPP2 JPP1 GND DEMO mode JPGND JP38K JP300K L, L,L,L,L,L,L,L,L,L,L,L,L, Customer’s Original Controller Board OSCI VOUP L,L,L,L,L,L, JPINH JPCE JPCL JPDI INH JP5V GND DI CL CE INH JPUP CE CL DI DT0 DT1 VDD5V GND OSCI Figure 7. The Test Constitution when the LCD Display Is Driven Using the LCD Driver IC in All Customer Original Environment. When the Customer’s Original LCD Panel of the 1/4 Duty Is Used When a customer uses the “Customer’s original LCD panel”, because the segment allotments of the LCD panel are different the control by the “Customer’s original controller board” is necessary. When 1/4 duty drive mode, LC75843UGA can drive the LCD up to 100 segments. LCD Driver IC (LC75843UGA) COM1 S27/COM2 S26/COM3 S25/COM4 S28 S24 S5 P4/S4 P3/S3 P2/S2 P1/S1 http://onsemi.com 9 Customer’s Original LCD Panel (1/4 duty) COM1 COM2 COM3 COM4 S25 S24 S5 S4 S3 S2 S1 4 x 25 = 100 segments LC75843UGAGEVB DT1. The switch does not need to set because the switch on the evaluation board are not used. 3. Supply the voltage of the external power supply to “VDD5V” pin. The following specification shows the allowable operating ranges of LC75843UGA. 1. Connect the test setup shown in Figure 7. 2. Remove the all jump sockets of the JP5V, JPGND, JP38K, JP300K, DT0, DT1, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4. However, when the controller circuit in the evaluation board is used, remove the jump sockets of the DT0 and Parameter Symbol Min Typ Max Unit VDD 4.5 − 6.3 V Power Supply Voltage for LC75843UGA 4. Supply the external clock to “OSCI” pin, and the CCB serial data are transferred from a customer’s original controller board to LCD driver IC. Parameter The following specification shows the allowable operating ranges of LC75843UGA. Symbol Min Typ Max Unit Input High Level Voltage VIH1 0.4 VDD − 6.3 V Input High Level Voltage VIH2 0.4 VDD − 6.3 V Input Low Level Voltage VIL1 0 − 0.2 VDD V Input Low Level Voltage VIL2 0 − 0.2 VDD V CCB Serial Clock Operating Frequency fCL − − 3.125 MHz External Clock Operating Frequency fCK 10 300 600 kHz External Clock Duty Cycle DCK 30 50 70 % 5. Confirm a result of LCD display and the LED display controlled by the customer’s original controller board. Then, the customer can confirm the waveform of the common outputs (COM1 to COM4), segment outputs (S5 to S24, S28) and general-purpose port and segment outputs (S1/P1 to S4/P4). JPDI, JPUP and JPP1 to JPP4). However, when the controller circuit in the evaluation board is used, insert the “DT0” jump socket and remove the “DT1” jump socket. The switch does not need to set because the switch on the evaluation board are not used. When the Customer’s Original LCD Panel of the 1/2 Duty Is Used When a customer uses the “Customer’s original LCD panel”, because the segment allotments of the LCD panel are different the control by the “Customer’s original controller board” is necessary. When 1/2 duty drive mode, LC75843UGA can drive the LCD up to 54 segments. When the Customer’s Original LCD Panel of the 1/3 Duty Is Used When a customer uses the “Customer’s original LCD panel”, because the segment allotments of the LCD panel are different the control by the “Customer’s original controller board” is necessary. When 1/3 duty drive mode, LC75843UGA can drive the LCD up to 78 segments. LCD Driver IC (LC75843UGA) COM1 S27/COM2 S26/COM3 COM1 COM2 COM3 S28 COM4/S25 S24 S26 S25 S24 S5 P4/S4 P3/S3 P2/S2 P1/S1 LCD Driver IC (LC75843UGA) Customer’s Original LCD Panel (1/3 duty) 3 x 26 = 78 segments COM1 S27/COM2 COM1 COM2 S28 COM3/S26 COM4/S25 S24 S27 S26 S25 S24 S5 P4/S4 P3/S3 P2/S2 P1/S1 S5 S4 S3 S2 S1 Customer’s Original LCD Panel (1/2 duty) 2 x 27 = 54 segments S5 S4 S3 S2 S1 1. Connect the test setup shown in Figure 7. However, an LCD panel of the 1/2 duty is used. 2. Remove the all jump sockets of the JP5V, JPGND, JP38K, JP300K, DT0, DT1, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4. However, 1. Connect the test setup shown in Figure 7. However, an LCD panel of the 1/3 duty is used. 2. Remove the all jump sockets (JP5V, JPGND, JP38K, JP300K, DT0, DT1, JPINH, JPCE, JPCL, http://onsemi.com 10 LC75843UGAGEVB when the controller circuit in the evaluation board is used, insert the jump socket of the DT1 and remove the jump socket of the DT0. The switch does not need to set because the switch on the evaluation board are not used. 1. Connect the test setup shown in Figure 7. However, an LCD panel of the static (1/1 duty) is used. 2. Remove the all jump sockets of the JP5V, JPGND, JP38K, JP300K, DT0, DT1, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1, JPP2, JPP3 and JPP4. However, when the controller circuit in the evaluation board is used, insert the jump sockets of the DT0 and DT1. The switch does not need to set because the switch on the evaluation board are not used. When the Customer’s Original LCD Panel of the Static (1/1 Duty) Is Used When a customer uses the “Customer’s original LCD panel”, because the segment allotments of the LCD panel are different the control by the “Customer’s original controller board” is necessary. When static (1/1 duty) drive mode, LC75843UGA can drive the LCD up to 28 segments. LCD Driver IC (LC75843UGA) COM1 S28 COM2/S27 COM3/S26 COM4/S25 S24 S5 P4/S4 P3/S3 P2/S2 P1/S1 Customer’s Original LCD Panel (1/1 duty) COM1 S28 S27 S26 S25 S24 1 x 28 = 28 segments S5 S4 S3 S2 S1 http://onsemi.com 11 LC75843UGAGEVB SCHEMATIC Power Supply Circuit For example, +1.5 V Power Supply Circuit: VOUT1 = 1.25 × (1 + 51 / 240) + 50 mA × 51 = 1.518 V +3.3 V Power Supply Circuit: VOUT2 = 1.25 × (1 + 390 / 240) + 50 mA × 390 = 3.301 V +5.0 V Power Supply Circuit: VOUT3 = 1.25 × (1 + (360+620) / 330) + 50 mA × (360 + 620) = 5.011 V The power supply circuit of this evaluation board generates three kinds of voltage by a linear regulator IC (LM317) from the power supply voltage of 9 V inputted. The +1.5 V power supply circuit is a power supply for FPGA core, the +3.3 V power supply circuit is a power supply for FPGA I/O and peripheral IC circuits, and the +5.0 V power supply circuit is a power supply for LCD driver IC. The linear regulator IC (LM317) can adjust the output voltage from 1.2 V to 37 V by an external resistor. The calculating formula of the output voltage: VOUT = 1.25 × (1 + R2 / R1) + IADJ × R2 [V] 9Vin IC1 (LM317EMP) SW1 9V 3 VIN GND +1.5V 1.5V 2 VOUT 4 (POWER) TABOUT ADJ + Power supply for FPGA core R1 (240ohm) 1 C1 (100uF) C2 (0.1uF) C3 (0.1uF) R2 (51ohm) C4 (10uF) IC2 (LM317EMP) 3 +3.3V 3.3V 2 VIN VOUT 4 TABOUT ADJ Power supply for FPGA I/O and peripheral IC circuits R3 (240ohm) 1 C5 (0.1uF) R4 (390ohm) C6 (10uF) IC3 (LM317EMP) 3 +5.0V 5.0V 2 VIN VOUT 4 TABOUT ADJ Power supply for LCD driver IC R5 (330ohm) 1 R6 (360ohm) C7 (0.1uF) R7 (620ohm) Figure 8. Schematic of Power Supply Circuit http://onsemi.com 12 C8 (10uF) D1 (MMSD4148) LC75843UGAGEVB Controller Circuit from SW5 to SW23. In addition, PWM data from SW18 to SW23 are set by pushing SW3 (PWM Set) depending on a demonstration mode. Furthermore, the LCD display data for various display and the general-purpose port data for LED control are generated by a demonstration mode chosen by SW2 (DEMO mode). The internal pull-up resistor function of the input pins of FPGA are set to active. The customer can confirm the operating conditions of the internal circuit of an FPGA by an LED monitor (POW, BUSY, SEND, INH, ERROR). The controller circuit of this evaluation board controls LCD driver IC (LC75843UGA) by CCB format serial data (3 V interface) using FPGA. The crystal oscillator circuit (50 [MHz]), power-on reset circuit, configuration ROM circuit, connector for configuration, switch for condition setting, LED monitor circuit and LCD driver IC interface are connected to FPGA. The LCD driver IC (LC75843UGA) has various control data for condition setting. Serial data are transferred when push SW4 (Command Set) after having set toggle switches IC7 (KC7050B50.0000) +3.3V IC4 (1/3) (EP1C3T144C8N) +3.3V R10 (1kohm) 4 1 VDD R19 (100ohm) INHX C22 (0.1uF) 3 OUT 2 16 17 GND 93 C21 (1000pF) 92 CLK0 CLK1 20 nCEO CLK3 7 1 2 3 [SW] VDD 3 4 14 5 21 6 13 7 12 8 25 9 ASDO 10 SENSE GND CONFDONE 3.3V nCONFIG nCE DATA nCS ASDIO GND RESINX 6 RESET 5 RESETX GND DCLK R13 (10kohm) CONTROL 4 1 2 3 4 5 6 C20 (10uF) 2 CONF_DONE nCSO CT C19 (0.1uF) CN1 1 86 DATA0 8 R18 (10kohm) R12 (10kohm) DCLK nCE IC6 (TLC7733ID) +3.3V R9 (1kohm) 24 CLK2 nCONFIG +3.3V R11 (10kohm) 7 10 11 26 27 28 31 32 IC5 (EPCS1SI8) IO IO IO 1 IO 2 IO 6 IO 5 3 CSX VCC1 DATA0 VCC2 DCLK VCC3 GND IO IO IO IO +3.3V IO IO R14 (10kohm) 90 TDO TDI TMS TCK 23 MSEL1 8 4 IO MSEL0 7 ASDI IO 22 +3.3V R15 (10kohm) 95 89 88 87 nSTATUS R17 (10kohm) NOTE: The part with a square bracket is not implemented on a board. ([SW]) Figure 9. Schematic of Controller Circuit (1/2) http://onsemi.com 13 R16 (10kohm) C18 (0.1uF) LC75843UGAGEVB IC4 (2/3) (EP1C3T144C8N) IC4 (3/3) (EP1C3T144C8N) SW2 (DEMO mode) +1.5V 1 C C 34 8 35 2 36 IO IO 15 VCCAPLL1 IO 83 C9 (0.1uF) IO IO IO 4 R8 (10ohm) 82 33 84 INHOUT IO 18 85 CEOUT IO GNDAPLL1 91 CLOUT IO SW5 (PF0) DIOUT IO 38 GNDGPLL1 96 IO JPDT0 (DT0) 19 94 37 IO IO CLK300K 97 IO SW6 (PF1) 46 98 39 CLK38K IO VCCINT IO JPDT1 (DT1) 40 41 42 47 48 SW7 (PF2) [SW] IO IO 117 IO 135 VCCINT 50 IO IO 54 IO IO 55 IO IO 56 IO IO 57 IO IO 58 IO SW13 (P1) IO IO 53 IO SW19 (W1) IO IO 52 IO SW12 (FC3) IO IO 51 IO SW18 (W0) C11 (0.1uF) 99 IO SW11 (FC2) GND 49 IO SW10 (FC1) 63 IO IO SW9 (FC0) IO 136 GND 103 104 105 106 107 +3.3V 108 109 8 [TH] 110 VCCIO1 [TH] 111 C12 (0.1uF) [TH] 112 GND 114 119 29 120 VCCIO1 121 C13 (0.1uF) 122 62 SW14 (EXF) 67 IO IO 123 124 125 IO SW22 (W4) 70 126 IO SW16 (SC) IO 71 IO SW23 (W5) 127 IO 72 IO SW17 (BU) 128 73 LED7 (ERROR) 43 GND R22 (1kohm) C A C A C A LED6 (INH) VCCIO4 C14 (0.1uF) A LED3 (SEND) IO VCCIO4 66 R21 (1kohm) C 68 44 A LED2 (BUSY) IO 69 GND R20 (1kohm) C IO SW15 (OC) LED1 (POW) IO IO IO SW21 (W3) 30 +3.3V 60 61 9 113 IO 59 VCCINT 118 GND 100 IO SW20 (W2) VCCINT 45 IO IO [SW] 64 GND IO IO SW8 (PF3) C10 (0.1uF) 65 GND R47 (1kohm) 81 VCCIO3 R48 (1kohm) C15 (0.1uF) 80 GND [R] [LED] IO 102 IO SW3 (PWM Set) VCCIO3 129 IO 74 IO IO IO IO IO SW4 (Command Set) IO IO 75 76 77 78 79 IO IO IO IO IO IO IO IO IO IO C16 (0.1uF) 130 101 GND 131 132 133 134 115 VCCIO2 139 C17 (0.1uF) 140 141 VCCIO2 116 GND 142 138 GND 143 144 137 [PAD] [PAD] NOTE: The part with a square bracket is not implemented on a board. ([SW], [LED], [R], [TH], [PAD]) Figure 10. Schematic of Controller Circuit (2/2) http://onsemi.com 14 LC75843UGAGEVB LCD Driver IC Circuit signal by setting of control data of the LCD driver IC. When OC is set to L(0), insert the jump socket of the JPGND. When OC is set to H(1) and EXF is set to L(0), insert the jump socket of the JP300K. When OC is set to H(1) and EXF is set to H(1), insert the jump socket of the JP38K. The resistors from R23 to R29 are the dumping resistance for waveform shaping. In addition, when waveform shaping is more necessary, connect a condenser (for example, from 100 to 1000 pF) to [C]. The resistors from R30 to R34 are pull-down resistor to protect a circuit when a jump socket was removed. The LCD driver circuit of this evaluation board uses LC75843UGA. The power supply and the control signal supplied from the controller circuit can separate it by removing a jump socket. Thereby, the customer can supply a power supply and a control signal from the external. The power supply of the LCD driver IC is supplied +5 V voltage by the power supply circuit of this evaluation board. When customer evaluate the voltage other than +5 V, remove the jump socket of the JP5V, and supply power supply to “VDD5V” pin. Insert only one jump socket in a socket pin of the JPGND, JP38K or JP300K for OSCI LSI (LC75843UGA) SP5V (Red) VDD5V 30 1 VDD +5.0V JP5V GND1 GND2 GND3 S1/P1 S1/P1 2 C24 (0.1uF) S2/P2 31 S2/P2 3 VSS S3/P3 S3/P3 4 S4/P4 S4/P4 5 S5 S5 6 S6 OSCI S6 7 R23 (390ohm) [TH] S7 32 S7 8 OSCI S8 S8 9 R24 (390ohm) [C] S9 R30 (100kohm) S9 10 S10 CLK300K S10 11 S11 JP300K S11 12 R25 (390ohm) S12 S12 13 CLK38K S13 S13 14 JP38K S14 S14 15 SPOSCI (Blue) S15 S15 16 S16 JPGND S16 17 D2 (MMSD4148) S17 S17 18 S18 SPINH (White) INH S18 19 R26 (30kohm) [TH] S19 S19 20 33 INHOUT INH S20 S20 21 JPINH C25 (10uF) S21 R31 (100kohm) S21 22 S22 S22 23 S23 SPCE (White) CE S23 24 R27 (390ohm) [TH] S24 S24 25 34 CEOUT CE S25/COM4 S25/COM4 26 JPCE [C] S26/COM3 R32 (100kohm) S26/COM3 27 S27/COM2 S27/COM2 28 COM1 SPCL (White) CL COM1 29 R28 (390ohm) [TH] S28 35 CLOUT CL JPCL [C] SPDI (White) R33 (100kohm) DI R29 (390ohm) [TH] DIOUT 36 DI JPDI [C] R34 (100kohm) NOTE: The part with a square bracket is not implemented on a board. ([C], [TH]) Figure 11. Schematic of LCD Driver IC Circuit http://onsemi.com 15 S28 LC75843UGAGEVB LCD Panel Circuit Because S28 output is connected to twelve segments of the LCD panel, the customer can confirm the waveform of big load. About the segment allotment of the LCD panel, refer to “LCD Panel Segment Allotment”. When customer evaluate the display system using the customer’s original LCD panel, remove an inserted LCD panel, and connect a customer’s original LCD panel. The LCD panel circuit of this evaluation board uses a socket pin, and LCD panel made in varitronix is inserted there. The specifications of the LCD panel are four common pins, 32 segment pins, twisted nematic (TN) type, reflection type, alphanumeric character display and 70.00 mm × 25.00 mm × 2.80 mm. Four common output signals and 21 segment output signals of the LCD driver IC are connected to an LCD panel. LCD (VIM−828−DP5.7−6−HV−RH−W) CN2 1 S25/COM4 COM3 COM1 S1 S32 S2 S31 S3 S30 S4 S29 S5 S28 S6 S27 S7 S26 S8 S25 34 3 33 4 32 5 31 6 30 7 8 29 9 S6 S27/COM2 35 2 S5 CN5 36 S15 28 S16 CN3 CN4 10 S7 27 S9 S24 S10 S23 S11 S22 S12 S21 S13 S20 S14 S19 S15 S18 S16 S17 11 S8 12 S9 S23 20 S24 19 18 S26/COM3 S22 21 17 S14 S21 22 16 S13 S20 23 15 S12 S19 24 14 S11 S18 25 13 S10 S17 26 COM0 COM2 S28 Figure 12. Schematic of LCD Panel Circuit http://onsemi.com 16 COM1 LC75843UGAGEVB LED Circuit output, remove the jump sockets from JPP1 to JPP4. The resistors from R35 to R38 are pull-down resistor to protect a circuit when a jump socket was removed. The calculating formula of the LED current: IF = (VOUP − VF − Vsat) / R [A] For example, LED5 (P1): IF1 = (5 − 1.9 − 0.1) / 200 = 15.0 mA LED4 (P2(R)): IF2 = (5 − 2.0 − 0.1) / 200 = 14.5 mA LED4 (P3(G)): IF3 = (5 − 3.5 − 0.1) / 91 = 15.4 mA LED4 (P4(B)): IF4 = (5 − 3.6 − 0.1) / 82 = 15.8 mA The LED circuit of this evaluation board uses a single color LED and three color (RGB) LED. The LED is controlled by the general-purpose port output of LCD driver IC (LC75843UGA). The general-purpose port output has up to four, and brightness adjustment (64 steps) is possible by PWM output function of up to 3-channel. The pull-up power supply of the LED is supplied +5 V voltage by the power supply circuit of this evaluation board. When customer evaluate the voltage other than +5 V, remove the jump socket of the JPUP, and supply pull-up power supply to “VOUP” pin. When customer uses general-purpose port outputs (S1/P1 to S4/P4) of LCD driver IC (LC75843UGA) as a segment SPUP (Red) VOUP +5V JPUP + GND4 C23 (100uF) LED5 (P1) (Orange) A [LED] x3 C R43 (200ohm) SPP1 (Green) R39 (1kohm) TR1 (2SC2712) S1/P1 LED4 R35 (100kohm) JPP1 SPP2 (Green) R44 (200ohm) R40 (1kohm) 1 (Red) 2 TR2 (2SC2712) S2/P2 (P2(R)) R36 (100kohm) JPP2 SPP3 (Green) R45 (91ohm) R41 (1kohm) 4 (Green) TR3 (2SC2712) S3/P3 (P3(G)) R37 (100kohm) JPP3 SPP4 (Green) R46 (82ohm) R42 (1kohm) 3 (Blue) TR4 (2SC2712) (P4(B)) S4/P4 JPP4 R38 (100kohm) NOTE: The part with a square bracket is not implemented on a board. ([LED]) Figure 13. Schematic of LED Circuit http://onsemi.com 17 LC75843UGAGEVB PIN FUNCTIONS Table 2. PIN FUNCTIONS OF LC75843UGA EVALUATION BOARD (LC75843UGAGEVB) Pin Name Functions I/O Control Jump Socket VDD5V Power supply pin for LCD driver IC (LC75843UGA). When supply the power supply voltage from the external, remove the jump socket of the JP5V. When the power supply circuit in the evaluation board is used, the +5.0 [V] voltage is outputted. I/O JP5V VOUP Pull-up power supply pin for LED. When supply the pull-up power supply voltage from the external, remove the jump socket of the JPUP. When the power supply circuit in the evaluation board is used, the +5.0 [V] voltage is outputted. I/O JPUP GND Ground pin. Must be connected to ground of all external equipments. OSCI External clock input pin. When OC is set to L(0), insert the jump socket of the JPGND. When OC is set to H(1) and EXF is set to L(0), insert the jump socket of the JP300K. When OC is set to H(1) and EXF is set to H(1), insert the jump socket of the JP38K. I/O JPGND, JP38K, JP300K INH Display forced off control input pin. When input the INH signal from the external, remove the jump socket of the JPINH. I/O JPINH CE Chip enable signal input pin of the CCB format. When input the CE signal from the external, remove the jump socket of the JPCE. I/O JPCE CL Synchronization clock signal input pin of the CCB format. When input the CL signal from the external, remove the jump socket of the JPCL. I/O JPCL DI Serial data signal input pin of the CCB format. When input the DI signal from the external, remove the jump socket of the JPDI. I/O JPDI S1/P1 to S4/P4 Segment outputs or general-purpose port outputs pin. The pins from S1/P1 to S4/P4 can be used as a general-purpose port output by setting of CCB serial data. When the general-purpose port output is used for a segment function in the evaluation environment of the customer’s original, remove the jump sockets from JPP1 to JPP4. O JPP1 to JPP4 S5 to S24, S28 Segment output pins. O − COM1 Common output pin. O − Common output or segment output pins. The pins from COM2/S27 to COM4/S25 can be used as a segment output by setting of CCB serial data. O − COM2/S27, COM3/S26, COM4/S25 http://onsemi.com 18 − − LC75843UGAGEVB SETTING METHOD OF THE SWITCH “DEMO Mode” Rotary Switch controller control. The customer can select various demonstration contents by the “DEMO mode” rotary switch. The following tables shows the setting contents of the “DEMO mode” rotary switch. When the jump sockets of the DT0 and DT1 were set for the setting that was not 1/4 duty drive, the “DEMO mode” can use only a mode of “0”, “1”, “4” and “5”. In addition, when “DEMO mode” was set to “2”, “3”, “6”, “7”, “8” and “9”, the controller is ignored without operating. This evaluation board has the demonstration mode which automatically performs LCD display and LED control by Table 3. SETTING CONTENTS OF THE “DEMO MODE” ROTARY SWITCH “DEMO Mode” Rotary Switch Demonstration Item 0 All OFF Test All segments are off. All LED turn off the light. 1 All ON Test All segments are on. All LED turn on the light. (100% brightness) 2 LCD Display Test (1) The LCD displays a “01234”. All LED turn off the light. 3 LCD Display Test (2) The LCD displays a “AbcdE”. All LED turn off the light. 4 Segment Test The segment of the LCD displays on in turn. LED does on in turn. 5 Common Test LCD segment corresponding to same COM are all on. When COM1 is on, LED turn on the light. 6 LED (PWM) Test (1) The LCD displays a “PWM_1” and a PWM duty value. Any PWM duty are selected by the switches from W0 to W5. (LED1 to LED3 can set same duty) 7 LED (PWM) Test (2) The LCD displays a “PWM_2” and a PWM channel number. Any PWM duty are selected by the switches from W0 to W5. (LED1 to LED3 can set each duty) 8 Demonstration (1) LCD number display count ups every second. LED does on in turn every second. LCD Display Contents LED Control Contents to 9 Demonstration (2) The LCD displays a “AUTO” and a PWM duty value. PWM duty changes every 100 ms to http://onsemi.com 19 LC75843UGAGEVB Toggle Switch and Push Switch Allotment The LCD driver IC (LC75843UGA) has various control data for condition setting. Serial data are transferred when push SW4 (Command Set) after having set toggle switches from SW5 (PF0) to SW23 (W5). In addition, PWM data from SW18 (W0) to SW23 (W5) are set by pushing SW3 (PWM Set) depending on a demonstration mode. Table 4. SETTING CONTENTS OF THE TOGGLE SWITCH Functions Control Data of the LCD Driver IC (LC75843UGA) Parts Symbol Silk Characters SW5 PF0 SW6 PF1 SW7 PF2 PF2 SW8 PF3 PF3 The switches for setting of the PWM output waveform frame frequency The switches for setting of the common/segment output waveform frame frequency PF0 PF1 SW9 FC0 SW10 FC1 SW11 FC2 FC2 SW12 FC3 FC3 SW13 P1 SW14 EXF The switch for setting of the external clock operating frequency EXF SW15 OC The switch for setting of the internal oscillator operating mode/external clock operating mode OC SW16 SC The switch for setting of the on/off state of the segments SC The switch for setting of the general-purpose output port (S1/P1) function FC0 FC1 D1, PS10, PS11 SW17 BU The switch for setting of the normal mode/power-saving mode BU SW18 to SW23 W0 to W5 The switches for setting of the PWM data of the PWM output W0 to W5 JPDT0, JPDT1 DT0, DT1 The sockets for setting of the LCD drive scheme (1/1 to 1/4 duty drive) DT0, DT1 http://onsemi.com 20 LC75843UGAGEVB EXPLANATION OF THE SWITCHES OF SETTING THE CONTROL DATA The Switches for Setting of the PWM Output Waveform Frame Frequency (PF0 to PF3) Table 5. EXPLANATION OF THE PF0 TO PF3 TOGGLE SWITCH PF0 PF1 PF2 PF3 Internal Oscillator Operating Mode (fosc = 300 [kHz] typ.) (OC = “L(0)”) L(0) L(0) L(0) L(0) 195 [Hz] 195 [Hz] H(1) L(0) L(0) L(0) 213 [Hz] 213 [Hz] L(0) H(1) L(0) L(0) 234 [Hz] 234 [Hz] H(1) H(1) L(0) L(0) 260 [Hz] 260 [Hz] Switches 300 [kHz] External Clock Operating Mode (OC = “H(1)”, EXF = “L(0)”) L(0) L(0) H(1) L(0) 293 [Hz] 293 [Hz] H(1) L(0) H(1) L(0) 335 [Hz] 335 [Hz] L(0) H(1) H(1) L(0) 390 [Hz] 390 [Hz] H(1) H(1) H(1) L(0) 469 [Hz] 469 [Hz] L(0) L(0) L(0) H(1) 586 [Hz] 586 [Hz] H(1) L(0) L(0) H(1) 781 [Hz] 781 [Hz] L(0) H(1) L(0) H(1) 1171 [Hz] 1171 [Hz] H(1) H(1) L(0) H(1) L(0) L(0) H(1) H(1) H(1) L(0) H(1) H(1) 335 [Hz] 335 [Hz] L(0) H(1) H(1) H(1) H(1) H(1) H(1) H(1) 38 [kHz] External Clock Operating Mode (OC = “H(1)”, EXF = “H(1)”) When OC = “1” and EXF = “1” were set to the LCD driver IC, because the LCD driver IC cannot use PWM output function, this setting is ignored. The Switches for Setting of the Common/Segment Output Waveform Frame Frequency (FC0 to FC3) Table 6. EXPLANATION OF THE FC0 TO FC3 TOGGLE SWITCH FC0 FC1 FC2 FC3 Internal Oscillator Operating Mode (fosc = 300 [kHz] typ.) (OC = “L(0)”) L(0) L(0) L(0) L(0) 49 [Hz] 49 [Hz] 49 [Hz] L(0) L(0) L(0) H(1) 56 [Hz] 56 [Hz] 56 [Hz] L(0) L(0) H(1) L(0) 65 [Hz] 65 [Hz] 66 [Hz] L(0) L(0) H(1) H(1) 78 [Hz] 78 [Hz] 79 [Hz] L(0) H(1) L(0) L(0) 87 [Hz] 87 [Hz] 88 [Hz] L(0) H(1) L(0) H(1) 97 [Hz] 97 [Hz] 99 [Hz] L(0) H(1) H(1) L(0) 111 [Hz] 111 [Hz] 113 [Hz] L(0) H(1) H(1) H(1) 130 [Hz] 130 [Hz] 132 [Hz] H(1) L(0) L(0) L(0) 142 [Hz] 142 [Hz] 144 [Hz] H(1) L(0) L(0) H(1) 156 [Hz] 156 [Hz] 158 [Hz] H(1) L(0) H(1) L(0) 173 [Hz] 173 [Hz] 176 [Hz] H(1) L(0) H(1) H(1) 195 [Hz] 195 [Hz] 198 [Hz] H(1) H(1) L(0) L(0) 223 [Hz] 223 [Hz] 226 [Hz] H(1) H(1) L(0) H(1) 260 [Hz] 260 [Hz] 264 [Hz] H(1) H(1) H(1) L(0) 312 [Hz] 312 [Hz] 316 [Hz] H(1) H(1) H(1) H(1) 390 [Hz] 390 [Hz] 396 [Hz] Switches 300 [kHz] External Clock Operating Mode (OC = “H(1)”, EXF = “L(0)”) 38 [kHz] External Clock Operating Mode (OC = “H(1)”, EXF = “H(1)”) http://onsemi.com 21 LC75843UGAGEVB The Switch for Setting of the General-purpose Output Port (S1/P1) Function (P1) Table 7. EXPLANATION OF THE P1 TOGGLE SWITCH Control Data of the LCD Driver IC (LC75843UGA) Switch P1 D1 PS10 PS10 Operating Contents L(0) 0 0 0 The LED(P1) is Turned Off H(1) 1 0 0 The LED(P1) is Turned On The Switch for Setting of the Internal Oscillator Operating Mode/External Clock Operating Mode (OC and EXF) Table 8. EXPLANATION OF THE OC AND EXF TOGGLE SWITCH Switches OC EXF Clock Operating Mode Control Jump Socket L(0) L(0) Internal Oscillator Operating Mode Insert the Jump Socket of the JPGND L(0) H(1) H(1) L(0) 300 [kHz] External Clock Operating Mode Insert the Jump Socket of the JP300K H(1) H(1) 38 [kHz] External Clock Operating Mode insert the Jump Socket of the JP38K The Switch for Setting of the On/Off State of the Segments (SC) Table 9. EXPLANATION OF THE SC TOGGLE SWITCH Switch SC Operating Contents L(0) Normal Display H(1) All Segments are OFF Waveform Drive The Switch for Setting of the Normal Mode/Power-saving Mode (BU) Table 10. EXPLANATION OF THE BU TOGGLE SWITCH Switch BU Operating Contents L(0) Normal Mode H(1) Power Saving Mode http://onsemi.com 22 LC75843UGAGEVB The Switches for Setting of the PWM Data of the PWM Output (W0 to W5) Table 11. EXPLANATION OF THE W0 TO W5 TOGGLE SWITCH Switches W0 W1 W2 W3 W4 W5 PWM Duty of the General-purpose Port Output L(0) L(0) L(0) L(0) L(0) L(0) 1/64 (1.56%) H(1) L(0) L(0) L(0) L(0) L(0) 2/64 (3.12%) L(0) H(1) L(0) L(0) L(0) L(0) 3/64 (4.69%) H(1) H(1) L(0) L(0) L(0) L(0) 4/64 (6.25%) L(0) L(0) H(1) L(0) L(0) L(0) 5/64 (7.81%) H(1) L(0) H(1) L(0) L(0) L(0) 6/64 (9.38%) L(0) H(1) H(1) L(0) L(0) L(0) 7/64 (10.94%) H(1) H(1) H(1) L(0) L(0) L(0) 8/64 (12.50%) L(0) L(0) L(0) H(1) L(0) L(0) 9/64 (14.06%) H(1) L(0) L(0) H(1) L(0) L(0) 10/64 (15.62%) L(0) H(1) L(0) H(1) L(0) L(0) 11/64 (17.19%) H(1) H(1) L(0) H(1) L(0) L(0) 12/64 (18.75%) L(0) L(0) H(1) H(1) L(0) L(0) 13/64 (20.31%) H(1) L(0) H(1) H(1) L(0) L(0) 14/64 (21.87%) L(0) H(1) H(1) H(1) L(0) L(0) 15/64 (23.44%) H(1) H(1) H(1) H(1) L(0) L(0) 16/64 (25.00%) L(0) L(0) L(0) L(0) H(1) L(0) 17/64 (26.56%) H(1) L(0) L(0) L(0) H(1) L(0) 18/64 (28.12%) L(0) H(1) L(0) L(0) H(1) L(0) 19/64 (29.69%) H(1) H(1) L(0) L(0) H(1) L(0) 20/64 (31.25%) L(0) L(0) H(1) L(0) H(1) L(0) 21/64 (32.81%) H(1) L(0) H(1) L(0) H(1) L(0) 22/64 (34.37%) L(0) H(1) H(1) L(0) H(1) L(0) 23/64 (35.94%) H(1) H(1) H(1) L(0) H(1) L(0) 24/64 (37.50%) L(0) L(0) L(0) H(1) H(1) L(0) 25/64 (39.06%) H(1) L(0) L(0) H(1) H(1) L(0) 26/64 (40.62%) L(0) H(1) L(0) H(1) H(1) L(0) 27/64 (42.19%) H(1) H(1) L(0) H(1) H(1) L(0) 28/64 (43.75%) L(0) L(0) H(1) H(1) H(1) L(0) 29/64 (45.31%) H(1) L(0) H(1) H(1) H(1) L(0) 30/64 (46.87%) L(0) H(1) H(1) H(1) H(1) L(0) 31/64 (48.44%) H(1) H(1) H(1) H(1) H(1) L(0) 32/64 (50.00%) L(0) L(0) L(0) L(0) L(0) H(1) 33/64 (51.56%) H(1) L(0) L(0) L(0) L(0) H(1) 34/64 (53.12%) L(0) H(1) L(0) L(0) L(0) H(1) 35/64 (54.69%) H(1) H(1) L(0) L(0) L(0) H(1) 36/64 (56.25%) L(0) L(0) H(1) L(0) L(0) H(1) 37/64 (57.81%) H(1) L(0) H(1) L(0) L(0) H(1) 38/64 (59.37%) L(0) H(1) H(1) L(0) L(0) H(1) 39/64 (60.94%) H(1) H(1) H(1) L(0) L(0) H(1) 40/64 (62.50%) http://onsemi.com 23 LC75843UGAGEVB Table 11. EXPLANATION OF THE W0 TO W5 TOGGLE SWITCH (continued) Switches W0 W1 W2 W3 W4 W5 PWM Duty of the General-purpose Port Output L(0) L(0) L(0) H(1) L(0) H(1) 41/64 (64.06%) H(1) L(0) L(0) H(1) L(0) H(1) 42/64 (65.62%) L(0) H(1) L(0) H(1) L(0) H(1) 43/64 (67.19%) H(1) H(1) L(0) H(1) L(0) H(1) 44/64 (68.75%) L(0) L(0) H(1) H(1) L(0) H(1) 45/64 (70.31%) H(1) L(0) H(1) H(1) L(0) H(1) 46/64 (71.87%) L(0) H(1) H(1) H(1) L(0) H(1) 47/64 (73.44%) H(1) H(1) H(1) H(1) L(0) H(1) 48/64 (75.00%) L(0) L(0) L(0) L(0) H(1) H(1) 49/64 (76.56%) H(1) L(0) L(0) L(0) H(1) H(1) 50/64 (78.12%) L(0) H(1) L(0) L(0) H(1) H(1) 51/64 (79.69%) H(1) H(1) L(0) L(0) H(1) H(1) 52/64 (81.25%) L(0) L(0) H(1) L(0) H(1) H(1) 53/64 (82.81%) H(1) L(0) H(1) L(0) H(1) H(1) 54/64 (84.37%) L(0) H(1) H(1) L(0) H(1) H(1) 55/64 (85.94%) H(1) H(1) H(1) L(0) H(1) H(1) 56/64 (87.50%) L(0) L(0) L(0) H(1) H(1) H(1) 57/64 (89.06%) H(1) L(0) L(0) H(1) H(1) H(1) 58/64 (90.62%) L(0) H(1) L(0) H(1) H(1) H(1) 59/64 (92.19%) H(1) H(1) L(0) H(1) H(1) H(1) 60/64 (93.75%) L(0) L(0) H(1) H(1) H(1) H(1) 61/64 (95.31%) H(1) L(0) H(1) H(1) H(1) H(1) 62/64 (96.87%) L(0) H(1) H(1) H(1) H(1) H(1) 63/64 (98.44%) H(1) H(1) H(1) H(1) H(1) H(1) 64/64 (100.00%) http://onsemi.com 24 LC75843UGAGEVB EXPLANATION OF THE JUMP SOCKETS OF SETTING THE CONTROL DATA The Sockets for Setting of the LCD Drive Scheme (1/1 to 1/4 Duty Drive) (DT0 and DT1) When the controller circuit in the evaluation board and the 1/3 duty LCD panel are used, insert the jump socket of the DT0 and remove the jump socket of the DT1. When the controller circuit in the evaluation board and the 1/2 duty LCD panel are used, insert the jump socket of the DT1 and remove the jump socket of the DT0. When the controller circuit in the evaluation board and the static (1/1 duty) LCD panel are used, insert the jump sockets of the DT0 and DT1. When the jump sockets of the DT0 and DT1 were set for the setting that was not 1/4 duty drive, the “DEMO mode” can use only a mode of “0”, “1”, “4” and “5”. In addition, when “DEMO mode” was set to “2”, “3”, “6”, “7”, “8” and “9”, the controller is ignored without operating, and the LED of the “ERROR” is turned on. When a customer uses the “Customer’s original LCD panel”, because the segment allotments of the LCD panel are different the control by the “Customer’s original controller board” is necessary. When the controller circuit in the evaluation board and the 1/4 duty LCD panel are used, remove the jump sockets of the DT0 and DT1. Table 12. EXPLANATION OF THE DT0 AND DT1 JUMP SOCKETS Control Data of the LCD Driver IC (LC75843UGA) Jump Sockets DT0 DT1 DT0 DT1 Operating Contents Remove Remove 0 0 1/4 Duty Drive Scheme Insert Remove 1 0 1/3 Duty Drive Scheme Remove Insert 0 1 1/2 Duty Drive Scheme Insert Insert 1 1 Static (1/1 Duty) Drive Scheme EXPLANATION OF THE LED MONITOR OF THE CONTROLLER CIRCUIT The LED monitor circuit is connected to FPGA. The customer can confirm the operating conditions of the internal circuit of an FPGA by an LED monitor of the POW, BUSY, SEND, INH and ERROR. Table 13. EXPLANATION OF THE LED MONITOR Symbol Functions POW LED monitor for main power supply ON/OFF. The power supply is supplied by moving “POWER” switch to the “ON” position, and the LED of the “POW” is turned on when FPGA operated normally. BUSY LED monitor for during the demonstration. The automatic demonstration mode is selected by moving “DEMO mode” switch to the “8” or “9” positions, and the LED of the “BUSY” is turned on when a demonstration is started. SEND LED monitor for CCB serial data transfer. The LED of the “SEND” is turned on when the CCB serial data are transferred by a demonstration or pushing the switches of the “Command Set” or “PWM Set”. INH LED monitor for INH signal state. The LED of the “INH” is turned on when INH output is outputted to high level. ERROR LED monitor for the setting state error of the switches. The LED of the “ERROR” is turned on, when the setting of the switch of the “DEMO mode” and the setting of the jump socket of the “Duty” included an error. At the time of error, the CCB serial data are not transferred even if pushing the switches of the “Command Set” or “PWM Set”. http://onsemi.com 25 LC75843UGAGEVB ABOUT THE PERIPHERAL CIRCUITS OF THE INH SIGNAL The INH signal after turning on the power supply is outputted to low level. After having pushed the first “Command Set” switch at the time of state that the INH signal is low level, the CCB serial data is transferred. Afterwards, the INH signal is outputted to high level. In addition, the INH signal is outputted to low level when pushes the switch of “Command Set” and the switch of “PWM Set” at the same time more than two seconds. At this time, the setting of CCB serial data is kept. more than 2 seconds 1st Push 1st Push “Command Set” switch Push Push “PWM Set” switch Push POWER : ON VDD5V INH CE ÏÏ ÏÏ CL DI ÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ Figure 14. Timing of the INH Signal Control Pulse width just after the power supply on : t1 = about 100 [ms] However, when during execution of the reset just after the power supply (Before execution of the configuration) and during execution of the configuration, the user I/O pin of FPGA used by the controller circuit of this evaluation board is the specifications that high level is outputted (the user I/O pin are used for CE, CL, DI, INH and the OSCI output). When the INH signal is high level, the LCD driver IC becomes the display ON state. This may cause false display of the LCD. This evaluation board constitutes CR filter circuit by resistor (R26) and capacitor (C25), and the INH signal pulse just after power supply on is removed. When falling of the INH signal or falling of the power supply, diode (D2) is used to rapidly discharge the electric charge of the capacitor. The resistor (R31) is pull-down resistor to protect a circuit when a jump socket was removed. FPGA SPINH (White) The specifications of the input low level of the INH signal : VIL = 0.2 VDD [V](max) Output signal level of FPGA : VOFPGA = 3.3 [V] Power supply voltage of the LCD driver IC : VDD = 5.0 [V] The calculation example of CR filter circuit using resistance value and capacitance value is shown in the following equations. R D2 (MMSD4148) LCD Driver IC INH INH INHOUT JPINH ȡ ȧǒ Ȣln C+* +* R26 (30kohm) C25 (10uF) ǒ1 * å*ǒ1ńRCǓ tǓ [V] V IL + V OFPGA ǒ t1 V *V IL OFPGA V OFPGA 0.1 lnǒ3.3*0.2 3.3 5 ȣ + Ǔȧ Ȥ Ǔ Ǔ + 0.277 For example, when capacitor (C25) is 10 mF, resistor (R26) is 27.7 kW ... Consequently, 30 kW choice. R31 (100kohm) Figure 15. Peripheral Circuit of the INH Signal http://onsemi.com 26 LC75843UGAGEVB The rise time to the input High level of the INH signal is shown in the following equations. The input high level of the INH signal input into an LCD driver IC is shown in the following equations. ǒ1 * å*ǒ1ńRCǓ tǓ [V] V IL + V OFPGA ǒ t1 + * R C ǒ + * 30 ln 10 3 ǒV V OFPGA 10 V IH + * V IL OFPGA 10 *6 ǓǓ + ǒ ln 3.3 * 0.4 3.3 R31 R26 ) R31 V OFPGA + 100 30 ) 100 3.3 + 2.54 V ǓǓ + 5 + 279.5 ms Power off Power off Power on VDD5V VDD5V CE CE 3.3V Power on 2.5V INH VIH=0.4VDD INH VIL=0.2VDD Discharge Pulse is removed Discharge 90ms Figure 16. INH Signal Pulse Just After the Power Supply (FPGA Output) Figure 17. INH Signal Pulse Just After the Power Supply (LCD Driver IC Input) ABOUT THE PERIPHERAL CIRCUITS OF THE CCB SERIAL DATA SIGNALS (CE, CL, DI) The resistors from R27 to R29 are the dumping resistance for waveform shaping. In addition, when waveform shaping is more necessary, connect a condenser (for example, from 100 to 1000 pF) to [C]. The resistors from R32 to R34 are pull-down resistor to protect a circuit when a jump socket was removed. FPGA LCD driver IC SPCE (White) CE R27 (390ohm) CEOUT CE JPCE SPCL (White) [C] CL R32 (100kohm) R28 (390ohm) CLOUT CL JPCL SPDI (White) [C] DI R33 (100kohm) R29 (390ohm) DIOUT DI JPDI [C] R34 (100kohm) Figure 18. Peripheral Circuit of the CCB Serial Data Transfer Signal http://onsemi.com 27 LC75843UGAGEVB CE CE VIH=0.4VDD VIL=0.2VDD CL CL VIH=0.4VDD VIL=0.2VDD DI DI VIH=0.4VDD VIL=0.2VDD Figure 19. CCB Serial Data Signal (FPGA Output) Figure 20. CCB Serial Data Signal (LCD Driver IC Input) LCD PANEL SEGMENT ALLOTMENT Because S28 output is connected to twelve segments of the LCD panel, the customer can confirm the waveform of big load. The following figure and table shows the segment allotment of the 1/4 duty drive LCD panel. The LCD panel circuit of this evaluation board uses a socket pin, and LCD panel made in varitronix is inserted there. The specifications of the LCD panel are four common pins, 32 segment pins, twisted nematic (TN) type, reflection type, alphanumeric character display and 70.00 mm × 25.00 mm × 2.80 mm. Four common output signals and 21 segment output signals of the LCD driver IC are connected to an LCD panel. Figure 21. Segment Allotment of the LCD Panel http://onsemi.com 28 LC75843UGAGEVB Table 14. RELATIONS BETWEEN THE LCD PANEL AND THE LCD DRIVER IC LCD Panel LCD Driver IC (When the 1/4 Duty Drive Is Set) Pin No. COM3 COM2 COM1 COM0 Connection Pin COM4 COM3 COM2 COM1 1 COM3 − − − COM4/S25 − − − − 2 1D 1E 1F − S28 D100 D99 D98 D97 3 1N 1K 1J 1I S28 D100 D99 D98 D97 4 2D 2E 2F − S28 D100 D99 D98 D97 5 2N 2K 2J 2I S28 D100 D99 D98 D97 6 3D 3E 3F − S28 D100 D99 D98 D97 7 3N 3K 3J 3I S28 D100 D99 D98 D97 8 4D 4E 4F − S5 D20 D19 D18 D17 9 4N 4K 4J 4I S6 D24 D23 D22 D21 10 5D 5E 5F − S7 D28 D27 D26 D25 11 5N 5K 5J 5I S8 D32 D31 D30 D29 12 6D 6E 6F − S9 D36 D35 D34 D33 13 6N 6K 6J 6I S10 D40 D39 D38 D37 14 7D 7E 7F − S11 D44 D43 D42 D41 15 7N 7K 7J 7I S12 D48 D47 D46 D45 16 8D 8E 8F − S13 D52 D51 D50 D49 17 8N 8K 8J 8I S14 D56 D55 D54 D53 18 − COM2 − − COM3/S26 − − − − 19 − − − COM0 COM1 − − − − 20 8DP 8C 8B 8A S24 D96 D95 D94 D93 21 8M 8L 8G 8H S23 D92 D91 D90 D89 22 7DP 7C 7B 7A S22 D88 D87 D86 D85 23 7M 7L 7G 7H S21 D84 D83 D82 D81 24 6DP 6C 6B 6A S20 D80 D79 D78 D77 25 6M 6L 6G 6H S19 D76 D75 D74 D73 26 5DP 5C 5B 5A S18 D72 D71 D70 D69 27 5M 5L 5G 5H S17 D68 D67 D66 D65 28 4DP 4C 4B 4A S16 D64 D63 D62 D61 29 4M 4L 4G 4H S15 D60 D59 D58 D57 30 3DP 3C 3B 3A S28 D100 D99 D98 D97 31 3M 3L 3G 3H S28 D100 D99 D98 D97 32 2DP 2C 2B 2A S28 D100 D99 D98 D97 33 2M 2L 2G 2H S28 D100 D99 D98 D97 34 1DP 1C 1B 1A S28 D100 D99 D98 D97 35 1M 1L 1G 1H S28 D100 D99 D98 D97 36 − − COM1 − COM2/S27 − − − − http://onsemi.com 29 LC75843UGAGEVB TIMING OF THE CCB SERIAL DATA TRANSFER When the 1/4 Duty Drive Mode Is Set When the controller circuit in the evaluation board and the 1/4 duty LCD panel are used, remove the jump sockets of the DT0 and DT1. The command transfer is the form that 1/4 duty drive mode and CL stop at low level. ÌÌÌÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌÌÌÌÌ CE CL DI 120 bits 56 bits The following figure shows the allotment of each bit. CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 D1 D2 D3 D4 D5 D6 D7 D8 D94 D95 D96 D97 D98 D99 D100 0 0 0 0 0 0 0 0 DT0 DT1 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Display data (100 bits) Control data (10 bits) DD (2 bits) CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 W10 W11 W12 W13 W14 W15 W20 W21 W22 W23 W24 W25 W30 W31 W32 W33 W34 W35 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Control data (18 bits) Fixed data (4 bits) PF0 PF1 PF2 PF3 PS10 PS11PS20 PS21PS30 PS31PS40 PS41 P0 P2 FC0 FC1 FC2 FC3 DN EXF OC SC BU Control data (24 bits) Note: DD is the direction data. CCB address D1 to D100 DT0, DT1 W10 to W15 W20 to W25 W30 to W35 PF0 to PF3 PS10, PS11 PS20, PS21 PS30, PS31 PS40, PS41 P0 to P2 FC0 to FC3 DN EXF OC SC BU P1 : “44H” : Display data. : LCD drive scheme (1/1 to 1/4 duty drive) setting control data. set by DT0 and DT1 jump sockets. : PWM duty data for S2/P2(ch1). set by W0 to W5 switches. : PWM duty data for S3/P3(ch2). set by W0 to W5 switches. : PWM duty data for S4/P4(ch3). set by W0 to W5 switches. : PWM output waveform frame frequency setting control data. set by PF0 to PF3 switches. : General-purpose output port (S1/P1) function setting control data. set by P1 switch. : General-purpose output port (S2/P2) function setting control data. : General-purpose output port (S3/P3) function setting control data. : General-purpose output port (S4/P4) function setting control data. : Segment output port/general-purpose output port switching control data. : Common/segment output waveform frame frequency setting control data. set by FC0 to FC3 switches. : The S28 pin state setting control data. : External clock operating frequency setting control data. set by EXF switch. : Internal oscillator operating mode/external clock operating mode switching control data. set by OC switch. : On/off state of the segments control data. set by SC switch. : Normal mode/power-saving mode switching control data. set by BU switch. http://onsemi.com 30 1 0 DD (2 bits) LC75843UGAGEVB When the 1/3 Duty Drive Mode Is Set of “0”, “1”, “4” and “5”. In addition, when “DEMO mode” was set to “2”, “3”, “6”, “7”, “8” and “9”, the controller is ignored without operating. The command transfer is the form that 1/3 duty drive mode and CL stop at low level. When the controller circuit in the evaluation board and the 1/3 duty LCD panel are used, insert the jump socket of the DT0 and remove the jump socket of the DT1. When the jump sockets of the DT0 and DT1 were set for the setting that was not 1/4 duty drive, the “DEMO mode” can use only a mode ÌÌÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌ ÌÌÌÌ ÌÌÌÌÌÌÌÌÌÌ CE CL DI 104 bits 56 bits The following figure shows the allotment of each bit. CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 D1 D2 D3 D4 D5 D6 D76 D77 D78 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DT0 DT1 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Display data (78 bits) Control data (16 bits) DD (2 bits) CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 W10 W11 W12 W13 W14 W15 W20 W21 W22 W23 W24 W25 W30 W31 W32 W33 W34 W35 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Control data (18 bits) Fixed data (4 bits) PF0 PF1 PF2 PF3 PS10PS11 PS20PS21PS30PS31PS40PS41 P0 P2 FC0 FC1 FC2 FC3 DN EXF OC SC BU Control data (24 bits) Note: DD is the direction data. CCB address D1 to D78 DT0, DT1 W10 to W15 W20 to W25 W30 to W35 PF0 to PF3 PS10, PS11 PS20, PS21 PS30, PS31 PS40, PS41 P0 to P2 FC0 to FC3 DN EXF OC SC BU P1 : “44H” : Display data. : LCD drive scheme (1/1 to 1/4 duty drive) setting control data. set by DT0 and DT1 jump sockets. : PWM duty data for S2/P2(ch1). set by W0 to W5 switches. : PWM duty data for S3/P3(ch2). set by W0 to W5 switches. : PWM duty data for S4/P4(ch3). set by W0 to W5 switches. : PWM output waveform frame frequency setting control data. set by PF0 to PF3 switches. : General-purpose output port (S1/P1) function setting control data. set by P1 switch. : General-purpose output port (S2/P2) function setting control data. : General-purpose output port (S3/P3) function setting control data. : General-purpose output port (S4/P4) function setting control data. : Segment output port/general-purpose output port switching control data. : Common/segment output waveform frame frequency setting control data. set by FC0 to FC3 switches. : The S28 pin state setting control data. : External clock operating frequency setting control data. set by EXF switch. : Internal oscillator operating mode/external clock operating mode switching control data. set by OC switch. : On/off state of the segments control data. set by SC switch. : Normal mode/power-saving mode switching control data. set by BU switch. http://onsemi.com 31 1 0 DD (2 bits) LC75843UGAGEVB When the 1/2 Duty Drive Mode Is Set of “0”, “1”, “4” and “5”. In addition, when “DEMO mode” was set to “2”, “3”, “6”, “7”, “8” and “9”, the controller is ignored without operating. The command transfer is the form that 1/2 duty drive mode and CL stop at low level. When the controller circuit in the evaluation board and the 1/2 duty LCD panel are used, insert the jump socket of the DT1 and remove the jump socket of the DT0. When the jump sockets of the DT0 and DT1 were set for the setting that was not 1/4 duty drive, the “DEMO mode” can use only a mode CE ÌÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌÌÌ CL DI 72 bits 56 bits The following figure shows the allotment of each bit. CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 D1 D2 D3 D4 D5 D6 D7 D8 D46 D47 D48 D49 D50 D51 D52 D53 D54 0 0 0 0 0 0 DT0 DT1 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Display data (54 bits) Control data (8 bits) DD (2 bits) CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 W10 W11 W12 W13 W14 W15 W20 W21 W22 W23 W24 W25 W30 W31 W32 W33 W34 W35 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Control data (18 bits) Fixed data (4 bits) PF0 PF1 PF2 PF3 PS10PS11 PS20PS21PS30PS31PS40PS41 P0 P2 FC0 FC1 FC2 FC3 DN EXF OC SC BU Control data (24 bits) Note: DD is the direction data. CCB address D1 to D54 DT0, DT1 W10 to W15 W20 to W25 W30 to W35 PF0 to PF3 PS10, PS11 PS20, PS21 PS30, PS31 PS40, PS41 P0 to P2 FC0 to FC3 DN EXF OC SC BU P1 : “44H” : Display data. : LCD drive scheme (1/1 to 1/4 duty drive) setting control data. set by DT0 and DT1 jump sockets. : PWM duty data for S2/P2(ch1). set by W0 to W5 switches. : PWM duty data for S3/P3(ch2). set by W0 to W5 switches. : PWM duty data for S4/P4(ch3). set by W0 to W5 switches. : PWM output waveform frame frequency setting control data. set by PF0 to PF3 switches. : General-purpose output port (S1/P1) function setting control data. set by P1 switch. : General-purpose output port (S2/P2) function setting control data. : General-purpose output port (S3/P3) function setting control data. : General-purpose output port (S4/P4) function setting control data. : Segment output port/general-purpose output port switching control data. : Common/segment output waveform frame frequency setting control data. set by FC0 to FC3 switches. : The S28 pin state setting control data. : External clock operating frequency setting control data. set by EXF switch. : Internal oscillator operating mode/external clock operating mode switching control data. set by OC switch. : On/off state of the segments control data. set by SC switch. : Normal mode/power-saving mode switching control data. set by BU switch. http://onsemi.com 32 1 0 DD (2 bits) LC75843UGAGEVB When the Static (1/1 Duty) Drive Mode Is Set In addition, when “DEMO mode” was set to “2”, “3”, “6”, “7”, “8” and “9”, the controller is ignored without operating. The command transfer is the form that static (1/1 duty) drive mode and CL stop at low level. When the controller circuit in the evaluation board and the static (1/1 duty) LCD panel are used, insert the jump sockets of the DT0 and DT1. When the jump sockets of the DT0 and DT1 were set for the setting that was not 1/4 duty drive, the “DEMO mode” can use only a mode of “0”, “1”, “4” and “5”. CE ÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌÌ CL DI 56 bits 56 bits The following figure shows the allotment of each bit. CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 D1 D2 D3 D4 D5 D27 D28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DT0 DT1 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Display data (28 bits) Control data (18 bits) DD (2 bits) CE fCL = 3.125 [MHz] CL DI 0 0 1 0 0 0 1 0 W10 W11 W12 W13 W14 W15 W20 W21 W22 W23 W24 W25 W30 W31 W32 W33 W34 W35 0 0 0 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address (8 bits) Control data (18 bits) Fixed data (4 bits) PF0 PF1 PF2 PF3 PS10PS11 PS20PS21PS30PS31PS40PS41 P0 P2 FC0 FC1 FC2 FC3 DN EXF OC SC BU Control data (24 bits) Note: DD is the direction data. CCB address D1 to D28 DT0, DT1 W10 to W15 W20 to W25 W30 to W35 PF0 to PF3 PS10, PS11 PS20, PS21 PS30, PS31 PS40, PS41 P0 to P2 FC0 to FC3 DN EXF OC SC BU P1 : “44H” : Display data. : LCD drive scheme (1/1 to 1/4 duty drive) setting control data. set by DT0 and DT1 jump sockets. : PWM duty data for S2/P2(ch1). set by W0 to W5 switches. : PWM duty data for S3/P3(ch2). set by W0 to W5 switches. : PWM duty data for S4/P4(ch3). set by W0 to W5 switches. : PWM output waveform frame frequency setting control data. set by PF0 to PF3 switches. : General-purpose output port (S1/P1) function setting control data. set by P1 switch. : General-purpose output port (S2/P2) function setting control data. : General-purpose output port (S3/P3) function setting control data. : General-purpose output port (S4/P4) function setting control data. : Segment output port/general-purpose output port switching control data. : Common/segment output waveform frame frequency setting control data. set by FC0 to FC3 switches. : The S28 pin state setting control data. : External clock operating frequency setting control data. set by EXF switch. : Internal oscillator operating mode/external clock operating mode switching control data. set by OC switch. : On/off state of the segments control data. set by SC switch. : Normal mode/power-saving mode switching control data. set by BU switch. http://onsemi.com 33 1 0 DD (2 bits) LC75843UGAGEVB DEMONSTRATION TIMING CHART All OFF Test Mode Timing (DEMO Mode = “0”) When demonstration mode is “0”, all LCD segments and all LED are off. The customer can confirm off drive waveform outputting from the LCD driver IC. About the example of the waveform which can confirm, refer to “Oscilloscope Observation Waveform”. Push Push Push “Command Set” switch POWER : ON POWER : OFF VDD5V INH CE CL DI ÏÏÏÏ ÏÏ ÏÏ ÏÏÏÏ ÏÏ Ï Ï ÏÏ Note 1 LED state (S1/P1) P1 = Turn off (Low) LED state (S2/P2 to S4/P4) ÏÏ Ï Ï ÏÏ Note 2 Note 3 P2 to P4 = Turn off (Low) LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) (2) (3) Forced off (VSS level) All segments are OFF waveform drive (fo=48Hz) Forced off (VSS level) All segments are OFF waveform drive (fo=48Hz) (4) (5) (4) (Figure 22) (6) (4) (Figure 23) (7) (Figure 24) Transfer Command Data Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “0” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data. For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), L(0), L(0), L(0)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“L(0)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switches of SC=“H(1)” and BU=“L(0)”. 6. Set the switches of SC=“L(0)” and BU=“H(1)”. 7. The power supply of the evaluation board is turned off by moving “POWER” switch to the “OFF” position. Note 1: D1=set by the switch of P1 to “0”, D2 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,0,0,0”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. The following figure shows the LCD display contents. Note 2: SC=“1”, BU=“0”, others is set the same value. Note 3: SC=“0”, BU=“1”, others is set the same value. http://onsemi.com 34 LC75843UGAGEVB All ON Test Mode Timing (DEMO Mode = “1”) When demonstration mode is “1”, all LCD segments and all LED are on. The customer can confirm off drive waveform outputting from the LCD driver IC. About the example of the waveform which can confirm, refer to “Oscilloscope Observation Waveform”. Push Push Push “Command Set” switch POWER : ON POWER : OFF VDD5V INH CE CL DI ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ Ï Ï ÏÏ ÏÏ Note 1 LED state (S1/P1) P1 = Turn off (Low) LED state (S2/P2 to S4/P4) LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (2) (3) Note 2 Note 3 P1 = Turn off (Low) P1 = Turn on (High) P2 to P4 = Turn off (Low) (1) Ï Ï ÏÏ ÏÏ P2 to P4 = Turn off (Low) P2 to P4 = Turn on (High All segments are ON waveform drive (fo=97Hz) All segments are OFF waveform drive All segments are ON waveform drive (fo=97Hz) All segments are OFF waveform drive (4) (5) (4) (Figure 25, 28) Forced off (VSS level) Forced off (VSS level) (6) (4) (Figure 26) (7) (Figure 27) Transfer Command Data Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “1” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data. For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“H(1)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“L(0)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switches of SC=“H(1)” and BU=“L(0)”. 6. Set the switches of SC=“L(0)” and BU=“H(1)”. 7. The power supply of the evaluation board is turned off by moving “POWER” switch to the “OFF” position. Note 1: D1=set by the switch of P1 to “1”, D2 to D100= all “1” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,0,0,0”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. The following figure shows the LCD display contents. Note 2: SC=“1”, BU=“0”, others is set the same value. Note 3: SC=“0”, BU=“1”, others is set the same value. http://onsemi.com 35 LC75843UGAGEVB LCD Display Test (1) Mode Timing (DEMO Mode = “2”) customer can confirm the waveform of big load. About the example of the waveform which can confirm, refer to “Oscilloscope Observation Waveform”. When demonstration mode is “2”, LCD number display and the LED are all off. The customer can confirm on/off drive waveform outputting from the LCD driver IC. Because S28 output is connected to twelve segments, the Push “Command Set” switch Push Push Push VDD5V INH CE CL DI ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏ Ï ÏÏÏ ÏÏÏ Note 2 Note 1 LED state (S1/P1) P1 = Turn off (Low) ÏÏ Ï ÏÏ ÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏ Note 3 Note 4 fosc/2 clock output LED state (S2/P2 to S4/P4) P2 to P4 = Turn off (Low) LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) (2) (3) (4) LCD displays a “01234” (fo=97Hz) LCD displays a “01234” (fo=390Hz) All segments are OFF waveform drive (fo=97Hz) All segments are OFF waveform drive (fo=390Hz) (5) (4) (6) (4) (7) (4) (Figure 30, 31) Transfer Command Data Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “2” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data . For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“H(1)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switches of SC=“L(0)” and BU=“L(0)”. 6. Set the switch of P1=“H(1)”. 7. Set the switches of FC0 to FC3=“H(1), H(1), H(1), H(1)”. Note 1: D1=“0”, D2 to D16= all “0” data, D17 to D96= “01234” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“1”. Note 2: BU=“0”, others is set the same value. “01234” display data is D[96:17] = 0110 0010 0111 0010 0011 0010 0110 0000 0111 0000 0100 0010 0100 1000 0100 1100 0000 0000 0000 1110. The following figure shows the LCD display contents. Note 3: D1=“0”, PS10 and PS11=set by the switch of P1 to “1,0”, others is set the same value. Note 4: FC0 to FC3=“1,1,1,1”, others is set the same value. http://onsemi.com 36 LC75843UGAGEVB LCD Display Test (2) Mode Timing (DEMO Mode = “3”) customer can confirm the waveform of big load. About the example of the waveform which can confirm, refer to “Oscilloscope Observation Waveform”. When demonstration mode is “3”, LCD alphabet display and the LED are all off. The customer can confirm on/off drive waveform outputting from the LCD driver IC. Because S28 output is connected to twelve segments, the Push Push “Command Set” switch VDD5V INH CE CL DI ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏ Ï ÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏ Note 2 Note 1 LED state (S1/P1) P1 = Turn off (Low) fosc/8 clock output LED state (S2/P2 to S4/P4) P2 to P4 = Turn off (Low) LCD display (S5 to S24) Display forced off (VSS level) LCD displays a “AbcdE” (fo=97Hz) LCD display (S28) Display forced off (VSS level) All segments are ON waveform drive (fo=97Hz) (1) (2) (3) (4) (5) (4) (Figure 32, 33) Transfer Command Data Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “3” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data. For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“L(0)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switch of P1=“H(1)”. Note 1: D1=“0”, D2 to D16= all “0” data, D17 to D96= “AbcdE” display data, D97 to D100= all “1” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. “AbcdE” display data is D[96:17] = 0001 0010 0110 0010 0000 0010 0100 0010 0111 0010 0100 1110 0100 1100 0100 1100 0100 1110 0100 0110. The following figure shows the LCD display contents. Note 2: D1=“0”, PS10 and PS11= set by the switch of P1 to “0,1”, others is set the same value. http://onsemi.com 37 LC75843UGAGEVB Segment Test Mode Timing (DEMO Mode = “4”) When demonstration mode is “4”, the segment of the LCD displays on in turn whenever the customer pushes the switch Push 0 1 2 3 4 5 6 7 8 9 2 of “Command Set”. The customer can confirm on/off drive waveform outputting from the LCD driver IC. 11 12 13 14 15 16 17 18 19 99 100 0 1 “Command Set” switch VDD5V INH CE CL DI Note 1 LED state (S1/P1) P1 = Turn off (Low) LED state (S2/P2) P2 = Turn off (Low) LED state (S3/P3) P3 = Turn off (Low) LED state (S4/P4) P4 = Turn off (Low) Note 2 Note 1 Note 2 Turn off (Low) Turn on (High) Turn on (High) Turn off (Low) Turn on (High) Turn off (Low) Turn on (High) Turn off (Low) 1 segment on LCD display (S5 to S24, S28) Display forced off (VSS level) 82 segment on All segments are OFF waveform drive All segments are off 2 segments on 83 segments on All segments are ON (1) (2) (4) (3) Transfer Command Data Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “4” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data. For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“L(0)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. Note 1: D1 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. Note 2: The display data which made “1” in turn from D1 to D100 are transferred whenever the customer pushes the switch of “Command Set”. − When “Push 1”: D1=“1”, D2 to D100= all “0” data. − When “Push 2”: D1,D2=“1,1”, D3 to D100= all “0” data. − When “Push 3”: D1,D2,D3=“1,1,1”, D4 to D100= all “0” data. : − When “Push 17”: D1 to D17= all “1” data, D18 to D100= all “0” data. : − When “Push 99”: D1 to D99= all “1” data, D100=“0”. − When “Push 100”: D1 to D100= all “1” data. http://onsemi.com 38 LC75843UGAGEVB Common Test Mode Timing (DEMO Mode = “5”) When demonstration mode is “5”, LCD segment corresponding to same COM are all ON. Therefore, when COM1 is on, LED turn on the light. The customer can “Command Set” switch Push 0 Push 1 ÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ confirm on/off drive waveform outputting from the LCD driver IC. Push 2 Push 3 Push 4 Push 1 Push 2 VDD5V INH CE CL DI Note 1 LED state (S1/P1) LED state (S2/P2 to S4/P4) LCD display (S5 to S24, S28) P1 = Turn off (Low) P2 to P4 = Turn off (Low) Display forced off (VSS level) ÏÏ ÏÏÏÏ ÏÏÏ ÏÏ ÏÏÏÏ ÏÏÏ Note 2 Turn on (High) Turn on (High) Turn on (High) Turn on (High) LCD displays a “COM” LCD segment corresponding to same COM1 is all ON (1) (2) (3) (4) ÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏ LCD segment corresponding to same COM2 is all ON (4) (4) (4) LCD segment corresponding to same COM3 is all ON (4) LCD segment corresponding to same COM4 is all ON (4) LCD segment corresponding to same COM1 is all ON (4) “COM” display data is D[96:17] = 0110 0001 0111 0000 0001 0000 0000 0000 0000 0000 0010 0110 0000 1110 0000 1110 0000 0000 0000 0000. The following figure shows the LCD display contents. Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “5” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC and BU) to set control data. For example, when the PF0 to PF3=“L(0), L(0), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)” and BU=“L(0)” are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. Note 2: The display data from D1 to D100 which turned on all the LCD segments according with same COM are transferred whenever the customer pushes the switch of “Command Send”. − When “Push 1”: D1, D5, D9, D13, D17, D21, D25, D29, D33, D37, D41, D45, D49, D53, D57, D61, D65, D69, D73, D77, D81, D85, D89, D93, D97 = all “1” data, Other display data= all “0” data Transfer Command Data Note 1: D1 to D16= all “0” data, D17 to D96= “COM” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,0,0,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. − When “Push 2”: D2, D6, D10, D14, D18, D22, D26, D30, D34, D38, D42, D46, D50, D54, D58, D62, D66, D70, D74, D78, D82, D86, D90, D94, D98= all “1” data, Other display data = all “0” data http://onsemi.com 39 LC75843UGAGEVB − When “Push 3”: D3, D7, D11, D15, D19, D23, D27, D31, D35, D39, D43, D47, D51, D55, D59, D63, D67, D71, D75, D79, D83, D87, D91, D95, D99= all “1” data, Other display data = all “0” data − When “Push 4”: D4, D8, D12, D16, D20, D24, D28, D32, D36, D40, D44, D48, D52, D56, D60, D64, D68, D72, D76, D80, D84, D88, D92, D96, D100= all “1” data, Other display data = all “0” data LED (PWM) Test (1) Mode Timing (DEMO Mode = “6”) When demonstration mode is “6”, the PWM duty is selected by switches from W0 to W5. Then, S2/P2(ch1), S3/P3(ch2) and S4/P4(ch3) can set same duty. The customer can confirm LED drive waveform outputting from the LCD driver IC. About the example of the waveform which can confirm, refer to “Oscilloscope Observation Waveform”. Push “Command Set” switch Push Push Push “PWM Set” switch VDD5V INH ÏÏ Ï ÏÏÏ ÏÏÏ CE CL DI ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ Note 1 LED state (S1/P1) LED state (S2/P2) LED state (S3/P3) LED state (S4/P4) ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ Note 2 Note 3 ÏÏ Ï ÏÏÏ ÏÏÏ Note 4 P1 = Turn off (Low) P2 = Turn off (Low) P3 = Turn off (Low) P4 = Turn off (Low) ex. PWM duty = 1.56% LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) (2) (3) ex. PWM duty = 50% “ 50%” display “PWM_1” display ex. PWM duty = 100% “ 100%” display ex. PWM duty = 75% “ 75%” display All segments are OFF waveform drive) (4) (5) (6) (7) (6) (Figure 34) (Figure 35) Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “6” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC, BU and W0 to W5) to set control data. For example, when the PF0 to PF3=“L(0), H(1), L(0), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)”, BU=“L(0)” and W0 to W5=“L(0), L(0), L(0), L(0), L(0), L(0)”, are set. (8) (6) (Figure 37) 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), H(1), L(0)”. 6. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “PWM Set”. 7. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), H(1), H(1)”. 8. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), L(0), H(1)”. http://onsemi.com 40 LC75843UGAGEVB Transfer Command Data Note 2: D17 to D96= “ 50%” display data, W10 to W15=“1,1,1,1,1,0”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,0”, others is set the same. The following figure shows the LCD display contents. Note 1: D1 to D16= all “0” data, D17 to D96= “PWM_1” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,1,0,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“1”, PS11=“1”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“1”, PS41=“1”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. The PWM duty is displayed there. (1 to 100) “PWM_1” display data is D[96:17] = 0110 0000 0000 0000 0110 0001 0110 0100 0011 0010 0000 0000 0000 1000 0010 0110 1000 0110 0100 0110. The following figure shows the LCD display contents. Percent Note 3: D17 to D96= “100%” display data, W10 to W15=“1,1,1,1,1,1”, W20 to W25=“1,1,1,1,1,1”, W30 to W35=“1,1,1,1,1,1”, others is set the same. Note 4: D17 to D96= “75%” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,0,1”, W30 to W35=“1,1,1,1,0,1”, others is set the same. http://onsemi.com 41 LC75843UGAGEVB LED (PWM) Test (2) Mode Timing (DEMO Mode = “7”) divides RGB color LED into three groups. The customer can set duty of each group whenever the customer pushes the switch of “Command Set”. The customer can confirm LED drive waveform outputting from the LCD driver IC. When demonstration mode is “7”, the PWM duty is selected by switches from W0 to W5. The LCD driver IC (LC75843UGA) can control the PWM function of up to three channels separately. Therefore this evaluation board Push 0 “Command Set” switch Push 1 Push 2 Push Push Push “PWM Set” switch VDD5V INH ÏÏ Ï ÏÏÏ ÏÏÏ CE CL DI Ï Ï ÏÏ ÏÏ ÏÏ Ï ÏÏ ÏÏÏÏ ÏÏÏ ÏÏ ÏÏÏÏ ÏÏÏ Note 1 LED state (S1/P1) P1 = Turn off (Low) LED state (S2/P2) P2 = Turn off (Low) LED state (S3/P3) P3 = Turn off (Low) LED state (S4/P4) P4 = Turn off (Low) Note 3 ex. PWM duty = 1% Note 4 ex. PWM duty = 25% ÏÏ ÏÏ ÏÏÏÏ ÏÏÏÏ Note 5 Note 6 ex. PWM duty = 75% ex. PWM duty = 1% LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) “Command Set” switch Note 2 ÏÏ Ï ÏÏÏ ÏÏÏ “PWM_2” display “ ch1” display “ 25%” display “ 75%” display ex. PWM duty = 50% “ ch2” display “ 50%” display All segments are OFF waveform drive (2) (3) (4) (4) (5) (6) Push 3 (7) (6) Push 1 (4) Push 2 (8) (6) Push 3 Push 1 Push Push “PWM Set” switch VDD5V INH ÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏ CE CL DI Note 7 LED state (S1/P1) ÏÏÏ ÏÏÏ ÏÏÏ Note 8 ÏÏ ÏÏÏÏ ÏÏÏ ÏÏÏ Ï ÏÏ ÏÏÏÏ ÏÏÏ ÏÏÏ Ï ÏÏ ÏÏÏÏ ÏÏÏ ÏÏÏ Ï Note 9 P1 = Turn off (Low) Note 10 Note 11 Note 12 Note 13 LED state (S2/P2) LED state (S3/P3) LED state (S4/P4) LCD display (S5 to S24) LCD display (S28) ex. PWM duty = 100% ex. PWM duty = 75% Turn off (Low) ex. PWM duty = 50% Turn off (Low) ex. PWM duty = 50% Turn off (Low) ex. PWM duty = 1% “ 50%” display “ ch3” display Turn off (Low) ex. PWM duty = 100% ex. PWM duty = 100% “ 100%” display “ ch1” display “ ch2” display “ ch3” display “ ch1” display All segments are OFF waveform drive (4) (9) (6) (4) (4) http://onsemi.com 42 (4) (4) (9) (6) “ 100%” display LC75843UGAGEVB Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The evaluation mode is selected by moving “DEMO mode” switch to the “7” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC, BU and W0 to W5) to set control data. For example, when the PF0 to PF3=“L(0), H(1), H(1), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)”, BU=“L(0)” and W0 to W5=“L(0), L(0), L(0), L(0), L(0), L(0)”, are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. 5. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), L(0), L(0)”. 6. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “PWM Set”. 7. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), L(0), H(1)”. 8. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), H(1), L(0)”. 9. Set the switches of W0 to W5=“H(1), H(1), H(1), H(1), H(1), H(1)”. Note 2: D1 to D16= all “0” data, D17 to D96= “ ch1” display data, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. The following figure shows the LCD display contents. The PWM channel is displayed there. Note 3: D1 to D16= all “0” data, D17 to D96= “ 25%” display data, W10 to W15=“1,1,1,1,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. The following figure shows the LCD display contents. The PWM duty is displayed there. (1 to 100) Transfer Command Data Note 1: D1 to D16= all “0” data, D17 to D96= “PWM_2” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, DT0=“0”, DT1=“0”, PF0 to PF3=“0,1,1,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. Percent Note 4: D1 to D16= all “0” data, D17 to D96= “ 75%” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. Note 5: D1 to D16= all “0” data, D17 to D96= “ ch2” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“0”, PS41=“0”, others is set the same. Note 6: D1 to D16= all “0” data, D17 to D96= “ 50%” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“0”, PS41=“0”, others is set the same. “PWM_2” display data is D[96:17] = 0011 0010 0000 0000 0110 0001 0110 0100 0011 0010 0100 1100 0000 1000 0010 0110 1000 0110 0100 0110. The following figure shows the LCD display contents. http://onsemi.com 43 LC75843UGAGEVB Note 11: D1 to D16= all “0” data, D17 to D96= “ ch3” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“1”, PS41=“1”, others is set the same. Note 12: D1 to D16= all “0” data, D17 to D96= “ ch1” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. Note 13: D1 to D16= all “0” data, D17 to D96= “ 100%” display data, W10 to W15=“1,1,1,1,1,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. Note 7: D1 to D16= all “0” data, D17 to D96= “ ch3” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“1”, PS41=“1”, others is set the same. Note 8: D1 to D16= all “0” data, D17 to D96= “ 100%” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“1”, PS41=“1”, others is set the same. Note 9: D1 to D16= all “0” data, D17 to D96= “ ch1” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, others is set the same. Note 10: D1 to D16= all “0” data, D17 to D96= “ ch2” display data, W10 to W15=“1,1,1,1,0,1”, W20 to W25=“1,1,1,1,1,0”, W30 to W35=“1,1,1,1,1,1”, PS10=“0”, PS11=“0”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“0”, PS41=“0”, others is set the same. http://onsemi.com 44 LC75843UGAGEVB Flowchart “DEMO mode”=“7” Set the switches Push the “Command Set” Push the “Command Set” LCD displays a “ ch3” LCD displays a “PWM_2” Set the switches of PWM duty (W0 to W5) A Push the “Command Set” Push the “PWM Set” LCD display a PWM duty value LCD displays a “ ch1” No Set the switches of PWM duty (W0 to W5) Is setting of P4(B) completion? Yes Push the “PWM Set” A LCD display a PWM duty value No Is setting of P2(R) completion? Yes Push the “Command Set” LCD displays a “ ch2” Set the switches of PWM duty (W0 to W5) Push the “PWM Set” LCD display a PWM duty value No Is setting of P3(G) completion? Yes http://onsemi.com 45 LC75843UGAGEVB Demonstration (1) Mode Timing (DEMO Mode = “8”) When demonstration mode is “8”, LCD number display count ups every second and the LED is eight colors of lighting. The customer can confirm display of LCD and LED by an automatic demonstration. Push “Command Set” switch 1 sec Timer counter 0 0 1 2 3 4 5 6 7 8 9 10 1 VDD5V INH CE ÏÏÏÏÏÏ Ï Ï ÏÏÏÏÏ Ï Ï ÏÏ Ï ÏÏÏ Ï Ï ÏÏÏÏÏ Ï Ï Ï Ï Ï ÏÏ Ï Ï Ï Ï ÏÏ ÏÏ Ï Ï Ï ÏÏÏ Ï Ï ÏÏÏÏÏ Ï Ï Ï ÏÏÏÏÏ Ï Ï CL DI Note 1 LED state (S2/P2) LED state (S2/P2) LED state (S3/P3) LED state (S4/P4) Note 2 P1 = Turn off (Low) P2 = Turn off (Low) P3 = Turn off (Low) P4 = Turn off (Low) LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) (2) (3) 'START' display “00000” display “11111” display “22222” display “33333” display “44444” display “55555” display “66666” display “77777” display “88888” display “99999” display All segments are OFF waveform drive (4) PS30=“0”, PS31=“0”, PS40=“0”, PS41=“0”, P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The automatic demonstration mode is selected by moving “DEMO mode” switch to the “8” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC, BU and W0 to W5) to set control data. For example, when the PF0 to PF3=“L(0), H(1), H(1), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)”, BU=“L(0)” and W0 to W5=“L(0), L(0), L(0), L(0), L(0), L(0)”, are set. 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. “START” display data is D[96:17] = 0001 1000 0011 0010 0111 0010 0001 1000 0101 0010 0001 0000 1100 0110 0100 0110 0001 0000 0100 1010. The following figure shows the LCD display contents. Note 2: The display data by the timer counter value are transferred. − When “1” : D5,D9,D13=“0,0,0”, D17 to D96= “00000” display data, Other display data = all “0” data − When “2” : D5,D9,D13=“1,0,0”, D17 to D96= “11111” display data, Other display data = all “0” data − When “3” : D5,D9,D13=“0,1,0”, D17 to D96= “22222” display data, Other display data = all “0” data − When “4” : D5,D9,D13=“1,1,0”, D17 to D96= “33333” display data, Transfer Command Data Note 1: D1 to D16= all “0” data, D17 to D96= “START” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,1,1,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“0”, PS11=“0”, PS20=“0”, PS21=“0”, http://onsemi.com 46 “00000” display LC75843UGAGEVB Other display data = all “0” data − When “10” : D5,D9,D13=“1,1,1”, D17 to D96= “99999” display data, Other display data = all “0” data Other display data = all “0” data − When “5” : D5,D9,D13=“0,0,1”, D17 to D96= “44444” display data, Other display data = all “0” data − When “6” : D5,D9,D13=“1,0,1”, D17 to D96= “55555” display data, Other display data = all “0” data − When “7” : D5,D9,D13=“0,1,1”, D17 to D96= “66666” display data, Other display data = all “0” data − When “8” : D5,D9,D13=“1,1,1”, D17 to D96= “77777” display data, Other display data = all “0” data − When “9” : D5,D9,D13=“0,0,0”, D17 to D96= “88888” display data, “99999” display data is D[96:17] = 0111 0010 0111 0010 0111 0010 0111 0010 0111 0010 0100 1010 0100 1010 0100 1010 0100 1010 0100 1010. The following figure shows the LCD display contents. Demonstration (2) Mode Timing (DEMO Mode = “9”) When demonstration mode is “9”, PWM duty of the LED drive changes every 100 ms. The customer can confirm LED brightness adjustment function using PWM duty by an automatic demonstration. Push “Command Set” switch Timer counter 100 ms 0 1 10 11 30 31 33 32 34 91 92 93 112 11 30 31 32 VDD5V INH CE Ï Ï CL DI Note 1 ÏÏÏÏÏÏ Ï Ï Ï ÏÏÏÏÏÏÏÏ Ï ÏÏ Ï Ï ÏÏÏÏÏ Ï Ï ÏÏÏÏÏÏÏÏ ÏÏ Ï Ï Note 2 ÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÑÑÑÑÑ ÑÑÑÑÑ LED turn on (1.56% duty) LED state (S1/P1 to S4/P4) P1 to P4 = Low (turn off) LCD display (S5 to S24) Display forced off (VSS level) LCD display (S28) Display forced off (VSS level) (1) (2) (3) “PWM_3” display LED turn on (3.12% duty) “ 1%” display “ 3%” display LED turn on (4.69% duty) “ 4%” display LED turn on (6.25% duty) “ 6%” display LED turn on (98.44% duty) “ 98%” display LED turn on (100% duty) “ 100%” display ÏÏÏÏÏÏ ÏÏÏÏÏÏ LED turn on (1.56% duty) “ 1%” display LED turn on (3.12% duty) “ 3%” display All segments are OFF waveform drive (4) 4. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. Operation Sequence 1. The power supply of the evaluation board is turned on by moving “POWER” switch to the “ON” position. 2. The automatic demonstration mode is selected by moving “DEMO mode” switch to the “9” position. 3. Set the switches (PF0 to PF3, FC0 to FC3, P1, EXF, OC, SC, BU and W0 to W5) to set control data. For example, when the PF0 to PF3=“L(0), H(1), H(1), L(0)”, FC0 to FC3=“L(0), H(1), L(0), H(1)”, P1=“L(0)”, EXF=“L(0)”, OC=“L(0)”, SC=“L(0)”, BU=“L(0)” and W0 to W5=“L(0), L(0), L(0), L(0), L(0), L(0)”, are set. Transfer Command Data Note 1: D1 to D16= all “0” data, D17 to D96= “AUTO” display data, D97 to D100= all “0” data, DT0=“0”, DT1=“0”, PF0 to PF3=“0,1,1,0”, FC0 to FC3=“0,1,0,1”, W10 to W15=“0,0,0,0,0,0”, W20 to W25=“0,0,0,0,0,0”, W30 to W35=“0,0,0,0,0,0”, PS10=“1”, PS11=“1”, PS20=“1”, PS21=“0”, PS30=“0”, PS31=“1”, PS40=“1”, PS41=“1”, http://onsemi.com 47 LC75843UGAGEVB P0 to P2=“1,0,0”, DN=“1”, EXF=“0”, OC=“0”, SC=“0”, BU=“0”. Note 2: D17 to D96= “ %” display data, W10 to W15, W20 to W25 and W30 to W35 are set by the timer counter value. others is set the same value. The following figure shows the LCD display contents. “AUTO” display data is D[96:17] = 0111 0010 0000 0000 0110 0001 0110 0100 0011 0010 0100 1000 0000 1000 0010 0110 1000 0110 0100 0110. The following figure shows the LCD display contents. The PWM duty is displayed there. (1 to 100) Percent DEMO Mode Change Timing pushed the switch of “Command Set” after having changed the switch of “DEMO mode”, command is transferred. The LCD panel display is cleared when the customer pushes the switch of “Command Set” after having set the switch of “DEMO mode” to “0”. The following figure shows the timing example when the customer changes the switch of “DEMO mode” successively. The update of the control data and display data in the LCD driver IC does not change only by having changed the switch of “DEMO mode”. When the customer “DEMO mode” switch “6” (PWM test) “1” (all on test) “0” (all off test) Push Push Push “Command Set” switch Push Push “PWM Set” switch INH Ï ÏÏ ÏÏÏ ÏÏÏ CE CL DI ÏÏÏ ÏÏÏ ÏÏÏ Ï ÏÏÏ ÏÏ ÏÏ ÏÏÏ Ï ÏÏ ÏÏÏ Ï Ï ÏÏ ÏÏ Ï ÏÏ Ï LED state (S1/P1) P1 = Turn off (Low) LED state (S2/P2) P2 = Turn off (Low) Turn on (100% duty) Turn off (Low) LED state (S3/P3) P3 = Turn off (Low) Turn on (100% duty) Turn off (Low) LED state (S4/P4) P4 = Turn off (Low) Turn on (100% duty) Turn off (Low) LCD display (S5 to S24) Display forced off (VSS level) “PWM_1” display LCD display (S28) Display forced off (VSS level) All segments are off (OFF waveform drive) “ 50%” display “ 65%” display (1) (2) Operation Sequence 1. The evaluation mode can be selected by moving the switch of “DEMO mode”. 2. The evaluation mode can be changed by moving the switch of “DEMO mode”. 3. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. (3) All segments are on All segments are off (OFF waveform drive) All segments are on All segments are off (OFF waveform drive) (4) (5) 4. The All OFF test mode is selected by moving “DEMO mode” switch to the “0” position. 5. The CCB serial data are transferred from a controller circuit to LCD driver IC by pushing the switch of “Command Set”. Thereby, the LCD panel display is cleared. http://onsemi.com 48 LC75843UGAGEVB OSCILLOSCOPE OBSERVATION WAVEFORM Waveform of All OFF Test Mode (DEMO Mode = “0”) COM1 5V 3.33V 1.66V 0V S5 3.33V 1.66V S28 3.33V 1.66V 20.2ms = 49.5Hz P1 Figure 22. LCD Drive Waveform (SC = 0, BU = 0) 5V 3.33V 1.66V 0V COM1 All segments are OFF 3.33V 1.66V S5 All segments are OFF S28 P1 3.33V 1.66V 20.2ms = 49.5Hz Figure 23. LCD Drive Waveform (SC = 1, BU = 0) COM1 Display forced off 0V S5 Display forced off 0V S28 Display forced off 0V P1 not affected by BU Figure 24. LCD Drive Waveform (SC = 0, BU = 1) http://onsemi.com 49 LC75843UGAGEVB Waveform of All ON Test Mode (DEMO Mode = “1”) 5V 3.33V 1.66V 0V COM1 5V 3.33V 1.66V 0V COM1 All segments are OFF 5V S5 3.33V 1.66V S5 0V All segments are OFF 5V S28 S28 3.33V 1.660V 0V 10.0ms = 99.2Hz 10.0ms = 99.2Hz P1 P1 Figure 25. LCD Drive Waveform (SC = 0, BU = 0) Figure 26. LCD Drive Waveform (SC = 1, BU = 0) 5V Display forced off COM1 COM1 0V 0V 2us Display forced off S5 S5 small load 0V 0V 26.8us S28 S28 Display forced off 0V P1 not affected by BU 5V 5V small load 0V 27.2us S28 big load 5V 3.33V 1.66V 0V Figure 28. LCD Drive Rising Waveform of Big Load (SC = 0, BU = 0, P1 = 1) 3.33V 1.66V 2.9us S5 big load P1 Figure 27. LCD Drive Waveform (SC = 0, BU = 1) COM1 5V 5V 3.33V 1.66V 0V P1 Figure 29. LCD Drive Falling Waveform of Big Load (SC = 0, BU = 0, P1 = 0) http://onsemi.com 50 LC75843UGAGEVB Waveform of LCD Display Test (1) Mode (DEMO Mode = “2”) COM1 5V 3.33V 1.66V 0V COM1 S5 5V 3.33V 1.66V 0V S5 S28 5V 3.33V 1.66V 0V S28 fosc/2 = 6.52us = 153kHz 10.0ms = 99.2Hz P1 5V P1 0V Figure 30. Monitor Clock Output from a General-Purpose Port Figure 31. Monitor Clock Output from a General-Purpose Port (Zoom In) Waveform of LCD Display Test (2) Mode (DEMO Mode = “3”) COM1 5V 3.33V 1.66V 0V COM1 S5 5V 3.33V 1.66V 0V S5 S28 5V 3.33V 1.66V 0V S28 10.0ms = 99.2Hz fosc/8 =26.2us = 38.1kHz P1 P1 5V 0V Figure 32. Monitor Clock Output from a General-Purpose Port Figure 33. Monitor Clock Output from a General-Purpose Port (Zoom In) http://onsemi.com 51 LC75843UGAGEVB Waveform of LED (PWM) Test (1) Mode (DEMO Mode = “6”) LCD drive waveform are asynchronous to PWM waveform LCD drive waveform are asynchronous to PWM waveform 5V 3.33V 1.66V 0V COM1 4.2ms P2 64us 5V 3.33V 1.66V 0V COM1 2.14ms 2.14ms turn on 5V P2 turn off turn on 0V P3 5V 0V turn on 4.28ms = 234Hz turn off 4.28ms = 234Hz 5V P3 turn off turn on turn off 0V 5V 0V turn on 5V P4 P4 turn off turn on turn off 0V 0V Figure 34. 1%-duty PWM Drive Waveform (PF0 to PF3 = 0100, W0 to W5 = 000000) Figure 35. 50%-duty PWM Drive Waveform (PF0 to PF3 = 0100, W0 to W5 = 111110) LCD drive waveform are asynchronous to PWM waveform LCD drive waveform are asynchronous to PWM waveform 5V 3.33V 1.66V 0V COM1 64us 5V 3.33V 1.66V 0V COM1 turn off 4.2ms P2 5V turn on P2 turn on 5V 0V 0V turn off 4.28ms = 234Hz P3 5V 5V P3 turn on turn on 5V 0V 0V turn off 5V P4 P4 turn on turn on Figure 36. 98%-duty PWM Drive Waveform (PF0 to PF3 = 0100, W0 to W5 = 011111) Figure 37. 100%-duty PWM Drive Waveform (PF0 to PF3 = 0100, W0 to W5 = 111111) LCD drive waveform are asynchronous to PWM waveform LCD drive waveform are asynchronous to PWM waveform COM1 COM1 turn on P2 turn off 13.2us 5V P2 turn off turn on 0V P3 turn on 840us = 1.19kHz P3 turn off turn on turn off 5V 0V 5V 5V turn off turn on 0V 0V P4 5V 0V 0V 5V P4 0V turn off turn on 5V 0V Figure 38. 1%-duty PWM Drive Waveform (PF0 to PF3 = 0101, W0 to W5 = 000000) Figure 39. 1%-duty PWM Drive Waveform (Zoom In) http://onsemi.com 52 LC75843UGAGEVB Waveform of LCD Drive Output COM1 5V 3.33V 1.66V 0V COM1 5V 3.33V 1.66V 0V S5 5V 3.33V 1.66V 0V S5 5V 3.33V 1.66V 0V S28 5V 3.33V 1.66V 0V S28 P1 Frame (fo=99Hz) P1 Figure 40. 1/4 Duty LCD Drive Scheme (JPDT0 = Remove, JPDT1 = Remove) Frame (fo=99Hz) Figure 41. 1/3 Duty LCD Drive Scheme (JPDT0 = Insert, JPDT1 = Remove) 5V 5V 2.5V 0V COM1 5V 3.33V 1.66V 0V COM1 0V 5V 5V S5 S5 0V 0V 5V S28 5V S28 0V 0V P1 Frame (fo=99Hz) P1 Figure 42. 1/2 Duty LCD Drive Scheme (JPDT0 = Remove, JPDT1 = Insert) Frame (fo=99Hz) Figure 43. 1/1 Duty LCD Drive Scheme (JPDT0 = Insert, JPDT1 = Insert) http://onsemi.com 53 LC75843UGAGEVB PRINTED CIRCUIT BOARD LAYOUT Figure 44. Pattern1 Layer of LC75843UGAGEVB Reference Design Figure 45. Pattern2 Layer of LC75843UGAGEVB Reference Design http://onsemi.com 54 LC75843UGAGEVB Figure 46. Regist1 Layer of LC75843UGAGEVB Reference Design Figure 47. Regist2 Layer of LC75843UGAGEVB Reference Design http://onsemi.com 55 LC75843UGAGEVB LC75843UGAGEVB GND 9Vin Figure 48. Silk2 Layer of LC75843UGAGEVB Reference Design 200.0 4.0 4.0 4.0 4.0 150.0 4.0 4.0 4.0 4.0 Unit: mm Figure 49. Outside Dimension of LC75843UGAGEVB Reference Design http://onsemi.com 56 LC75843UGAGEVB ABOUT THE USE OF THE AC ADAPTER If the customer prepares parts and remodels it by soldering, the customer can change a main power supply into an evaluation board supplied from an AC adapter. In this case, please be careful about polarity enough. When the AC adapter of the wrong polarity was used, the evaluation board may be damaged. Table 15. RECOMMENDATION PARTS Description Manafuacturer Manufacturer Part Number Explanation Lead Free DC power jack Marushin Electric Mfg MJ-179PH Mate Plug 2.1 mm Yes AC adapter Go Forward Enterprise GF12-US0913 DC9V, Center Plus Yes (1) 9Vin (2) GND (3) GND (2) GND Center Plus (1) 9Vin (3) GND Contents of Alteration Work (1) Remove the Socket Pins (“9Vin”, “GND”). (2) Take Off a Label. (3) Soldering the DC Power Jack. (1) Remove the Socket Pins (3) Soldering the DC Power Jack (2) Take Off a Label http://onsemi.com 57 LC75843UGAGEVB BILL OF MATERIALS Table 16. BILL OF MATERIALS OF LC75843UGA EVALUATION BOARD (LC75843UGAGEVB) Designator Qty. Description Part Number Value Manufacturer IC1−IC3 3 IC4 1 Linear Regulator (LDO) LM317EMP 1.2 V to 37 V, 1 Amax National Semiconductors FPGA (Cyclone) EP1C3T144C8N TQFP144 ALTERA IC5 IC6 1 Configuration ROM (EEPROM) EPCS1SI8N 1 Mbit ALTERA 1 Power Supply Voltage Supervisors TLC7733ID VTH = 2.93 V TI IC7 1 Crystal Oscillator KC7050B50.0000C31B00 50.0000 MHz KYOCERA LSI 1 LCD Driver IC LC75843UGA 1/1 to 1/4 Duty, 100 Segments(max) ON Semiconductor LCD 1 LCD Panel VIM-828-DP5.7-6-HV-RH-W 14SEGx8DIGIT, 1/4 Duty Varitronix TR1−TR4 4 NPN Transistor 2SC2712-GR(F) VCEO = 50 V, Ic = 150 mA Toshiba D1, D2 2 Diode MMSD4148T VR = 100 V, IF = 0.2 A ON Semiconductor LED1, LED7 1 LED L-934ID Red, D = 3 mm Kingbright LED2, LED3, LED6 3 LED L-934SGD Green, D = 3 mm Kingbright LED4 1 LED LATBT66B RGB-color, Anode Common Siemens AG (OSRAM) LED5 1 LED MSML-A101-S00J1 Orange Avago TECHNOLOGIES R8 1 Resistor MCR10EZPF10R0 10 W ±1%, 1/8 W ROHM R2 1 Resistor MCR10EZPF51R0 51 W ±1%, 1/8 W ROHM R46 1 Resistor MCR10EZPF82R0 82 W ±1%, 1/8 W ROHM R45 1 Resistor MCR10EZPF91R0 91 W ±1%, 1/8 W ROHM R19 1 Resistor MCR10EZPF1000 100 W ±1%, 1/8 W ROHM R43, R44 2 Resistor MCR10EZPF2000 200 W ±1%, 1/8 W ROHM R1, R3 2 Resistor MCR10EZPF2400 240 W ±1%, 1/8 W ROHM R5 1 Resistor MCR10EZPF3300 330 W ±1%, 1/8 W ROHM R6 1 Resistor MCR10EZPF3600 360 W ±1%, 1/8 W ROHM R4, R23−R25, R27−R29 7 Resistor MCR10EZPF3900 390 W ±1%, 1/8 W ROHM R7 1 Resistor MCR10EZPF6200 620 W ±1%, 1/8 W ROHM R9, R10, R20−R22, R39−R42, R47, R48 11 Resistor MCR10EZPF1001 1 kW ±1%, 1/8 W ROHM R11−R18 8 Resistor MCR10EZPF1002 10 kW ±1%, 1/8 W ROHM R26 1 Resistor MCR10EZPF3002 30 kW ±1%, 1/8 W ROHM R30−R38 9 Resistor MCR10EZPF1003 100 kW ±1%, 1/8 W ROHM C21 1 Multilayer Ceramic Capacitor C2012JB2E102K 1000 pF ±10%, 250 V TDK C2, C3, C5, C7, C9−C19, C22, C24 17 Multilayer Ceramic Capacitor GRM21BB11H104KA01L 0.1 mF ±10%, 50 V Murata C4, C6, C8, C20, C25 5 Multilayer Ceramic Capacitor GRM21BB31A106KE18L 10 mF ±10%, 10 V Murata C1, C23 2 Aluminum Electrolytic Capacitor 25PK100MEFC5X11 100 mF ±20%, 25 V Rubycon SW1 1 Toggle Switch A-12AH ON-ON, Right Angle, 0.4 VA MAX 28 V NIKKAI SW5−SW23 19 Toggle Switch G-12AP ON-ON, Straight, 0.4 VA MAX 28 V NIKKAI SW3, SW4 2 Push Button Switch B3F-1002 H = 5 mm, 150 g OMRON SW2 1 Rotary Code Switch ERD210RSZ Shift Type, 0 to 9, BCD, Real Code Excel Cell Electronic CN1 1 Connector HIF3FC-10PA-2.54DSA(71) 10pin, Straight, Polarity Slot 1 HIROSE CN2-CN5 4 Socket Terminal FHU-1x42SG 9pin Useconn Electronics http://onsemi.com 58 LC75843UGAGEVB Table 16. BILL OF MATERIALS OF LC75843UGA EVALUATION BOARD (LC75843UGAGEVB) (continued) Designator Qty. Description Part Number Value Manufacturer VDD5V, VOUP, GND1−GND4, OSCI, INH, CE, CL, DI 11 Check Terminal WT-2-1 D = 3 mm, H = 10 mm MAC8 S1−S24, S28 25 Check Terminal LC-2-G-White White MAC8 COM1−COM4 4 Check Terminal LC-2-G-Skyblue Skyblue MAC8 JPDT0, JPDT1, JP5V, JP300K, JP38K, JPGND, JPINH, JPCE, JPCL, JPDI, JPUP, JPP1−JPP4, 9Vin, GND 17 Socket Pin W81102T3825RC 2pin RS Components SP5V, SPUP 2 Jump Socket MJ254-6RD Red Useconn Electronics SPOSCI 1 Jump Socket MJ254-6BU Blue Useconn Electronics SPINH, SPCE, SPCL, SPDI 4 Jump Socket MJ254-6WH White Useconn Electronics SPP1−SPP4 4 Jump Socket MJ254-6GN Green Useconn Electronics 1 Printed Board LC75843UGAGEVBPCB 200 × 150 mm, t = 1.6 mm, 2-levels, FR-4 ON Semiconductor 4 Screw M3 4 Nut 4 Natural Rubber Foot M3 BU-692-A Black, M15 × 7.5 mm SATO PARTS CCB is a registered trademark of Semiconductor Components Industries, LLC. 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