HDMI Switch ICs 1 for input 1 output buffer (Sync with OE) No.11063EAT06 BU16025MUV ●Description BU16025MUV is HDMI Buffer IC for Source, Sink, and repeater equipment. Each TMDS input has internal 50ohm resistor. These resistors can be turned off by OE pin control. And BU16025MUV has selectable equalizer circuit and DDC active buffer to isolate capacitor between input and output. ●Features 1) Support 480i/p, 720p, and 1080i/p 12bit deep color and 2.70Gbps data rate 2) 5V Tolerance to all DDC and HPD_SINK Inputs 3) Integrated active DDC buffer 4) Integrated DDC data line delay mode to get hold margin 5) Integrated Switchable 50ΩReceiver Termination 6) Integrated Low TMDS output swing mode for High speed signal 7) High Impedance Outputs When Disabled 8) TMDS Inputs and output HBM ESD Protection Exceeds 8kV 9) Support AC coupling input (TMDS input common mode voltage is 3.3V) 10) Selectable Receiver Equalization 2 11) Integrated I C Identification Data for HDMI/DVI distinction (Display port translator mode) 12) 48-Pin VQFN Package 13) ROHS Compatible ●Applications Digital TV, DVD player, set-top box, AV receiver, Digital projector, Desktop/Note book PC www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/16 2011.01 - Rev.A Technical Note BU16025MUV ●Absolute maximum ratings Parameter Ratings Unit Input Voltage -0.3~+4.5 V DDC, HPD_SINK input voltage -0.3~+5.5 V Differential pin input voltage +2.5~+4.0 V PRE, I2C_ONB, SELREF, OEB, EQ, DDC_TI, DDCEN, HDMID_EN, HPDINV input voltage -0.3~+4.0 V 2123(*1) mW -55~+125 ℃ Power Dissipation rating Storage temperature *1 ROHM standard substrate When it’s used by than Ta=25℃, it’s reduced by 21.2mW/℃ ●Operating conditions Parameter Symbol Ratings Min. Typ. Max. Unit Supply Voltage VCC 3.0 3.3 3.6 V Operating free-air temperature TA 0 - 70 ℃ Input differential voltage range VID 150 - 1560 mVp-p Input common voltage range VIC 1.5 - VCC+0.01 V Current control resistor REXT 1.18 1.2 1.22 kΩ TMDS output voltage range AVCC 3 3.3 3.6 V RT 45 50 55 Ω - - - 2.70 Gbps TMDS DIFFERENTIAL PINS (A/B) Termination Resistor Signal rate CONTROL PINS (PRE, I2C_ONB, OEB, SELREF, EQ, DDC_TI, DDCEN, HDMIID_EN, HPDINV) H level input voltage VIH 0.7×Vcc - VCC V L level input voltage VIL -0.3 - 0.3×Vcc V dR(I2C) - - 100 kHz H level input voltage VIH 2.1 - 5.5 V L level input voltage VIL -0.3 - 0.35 V H level input voltage VIH 2.1 - 5.5 V L level input voltage VIL -0.3 - 1.5 V H level input voltage VIH 2.1 - 5.5 V L level input voltage VIL -0.3 - 0.8 V DDC I/O PINS (SCLx, SCLy, SDAx, SDAy) I2C data rate SDAx, SCLx SDAy , SCLy STATUS PINS (HPD_SINK) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/16 2011.01 - Rev.A Technical Note BU16025MUV ●Electrical characteristics(Unless Otherwise noted Ta=25℃, Vcc=3.3V) Limits Parameter Symbol Min. Typ. Max. Stand by Current (DDC_EN= “L”) Stand by Current2 (DDC_EN= “H”) Circuit Current Conditions Ist - - 10 µA OEB = “Vcc”, VIL= “0V”,VIH=”Vcc” Ist2 - 1.8 3.0 mA OEB = “Vcc”, VIL= “0V”,VIH=”Vcc” mA VIH = Vcc,VIL = Vcc-0.4V, REXT=1.2kΩ, RT = 50Ω, AVcc = 3.3V,PRE=0V Am/Bm =2.25 Gbps HDMI data pattern, m = 2,3,4, A1/B1 = 225 MHz clock 381 mW VIH = Vcc,VIL = Vcc-0.4V REXT=1.2kΩ, RT = 50Ω, AVcc = 3.3V, PRE=0V Am/Bm = 2.25Gbps HDMI data pattern, m = 2,3,4, A1/B1 = 225 MHz clock Icc Power Consumptions Unit - PD 68+32*(1) 84+32*(1) - - TMDS DIFFERENTIAL PINS (A/B; Y/Z) H level output voltage VOH AVcc-10 - AVcc+10 mV L level output voltage VOL AVcc-600 - AVcc-400 mV VSWING 400 - 600 mV VSWING 2 600 - 920 mVp-p TMDS internal Resistor RINT 45 50 55 Ω VIN = 2.9V Output leak current Voff -10 0 10 µA AVcc = 3.3V, Vcc=0V Input leak current IIH1 -10 - 10 µA VI = 5.5V Input leak current IIH2 -10 - 10 µA VI = Vcc H level output current IOHT -10 - 10 µA VO = 5.5V L level output current IlL -10 - 10 µA VIL = GND L level output voltage VOLT V RL = 4.7kΩ Swing voltage Swing voltage2 (Low TMDS output swing mode) AVcc = 3.3V, RT = 50Ω,PRE = 0V PRE = Vcc, Am/Bm =225 Mbps HDMI data pattern, m = 2,3,4, A1/B1 = 225 MHz clock DDC Input and output SDAx, SCLx L level input voltage below output voltage VOLT-VIL 0.43 - 0.57 0.52 - 0.87 - 100 - - 400 - SELREF = “L” SELREF = “H” SELREF = “L” mV SELREF = “H” SDAy , SCLy Input leak current IIH1 -10 - 10 µA VI = 5.5V Input leak current IIH2 -10 - 10 µA VI = Vcc H level output current IOH -10 - 10 µA VO = 5.5V L level output current IOL -10 - 10 µA VIL = GND L level output voltage VOL - - 0.2 V IOUT = 4mA H level output voltage VOH 2.4 - Vcc V IOH = - 8mA L level output voltage VOL 0 - 0.4 V IOL = 8mA STATUS PINS (HPD) CONTROL PINS (PRE, OEB, DDCEN, HPDINV) H level input current IIH -10 - 10 µA VIH = Vcc L level input current IIL -10 - 10 µA VIL = GND CONTROL PINS (SELREF, EQ, DDC_TI) H level input current IIH 50 - 150 µA VIH = Vcc L level input current IIL -10 - 10 µA VIL = GND CONTROL PINS (I2C_ONB, HDMIID_EN) H level input current IIH -10 - 10 µA VIH = Vcc L level input current IIL -150 - 50 µA VIL = GND (*1) 32mA is the current through TMDS internal resistor www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/16 2011.01 - Rev.A Technical Note BU16025MUV ●AC Characteristic (Unless Otherwise noted Ta=25℃, Vcc=3.3V) Parameter Symbol Limits Min. Typ. Max. Unit Conditions TMDS Output Differential pin (Y/Z) Differential output rise time (20%-80%) tR_tmds - 110 - ps Differential output rise time (20%-80%) tF_tmds - 110 - ps tsk(D) - 35 - ps Propagetion delay (L to H) SCLx to SCLy tPLH1 - 30 - ns Propagetion delay (H to L) SCLx to SCLy tPHL1 - 10 - ns Propagetion delay (L to H) SCLy to SCLx tPLH2 - 40 - ns Propagetion delay (H to L) SCLy to SCLx tPHL2 - 20 - ns Propagetion delay (L to H) SDAx to SDAy tPLH3 - 570 - ns Propagetion delay (H to L) SDAx to SDAy tPHL3 - 570 - ns Propagetion delay (L to H) SDAy to SDAx tPLH4 - 370 - ns Propagetion delay (H to L) SDAyto SDAx tPHL4 - 370 - ns Propagetion delay (L to H) SDAx/SCLx to SDAy/SCLy tPLH5 - 30 - ns Propagetion delay (H to L) SDAx/SCLx to SDAy/SCLy tPHL5 - 10 - ns Propagetion delay (L to H) SDAy/SCLy to SDAx/SCLx tPLH6 - 40 - ns Propagetion delay (H to L) SDAy/SCLy to SDAx/SCLx tPHL6 - 20 - ns SDAx/SCLx output rise time tR1 - 80 - ns SDAx/SCLx output rise time tF1 - 5 - ns SDAy/SCLy output rise time tR2 - 95 - ns SDAy/SCLy output rise time tF2 - 5 - ns Propagation delay time (L to H) tPLH(HPD) - 100 - ns CL=10pF Propagation delay time (H to L) tPHL(HPD) - 100 - ns CL=10pF Differential intra pair skew (Fig9) AVCC = 3.3V, RT = 50Ω, PRE =”H” DDC I/O Pin (SCLx, SCLy, SDAx, SDAy) RL = 4.7KΩ CL = 10pF DDC_TI = “H” RL = 4.7KΩ CL = 10pF DDC_TI = “H” RL = 4.7KΩ CL = 10pF DDC_TI = “L” RL = 4.7KΩ CL = 10pF STATUS PINS(HPD) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/16 2011.01 - Rev.A Technical Note BU16025MUV ●Electrical characteristic curves (Reference data) Unless Otherwise noted Ta=25℃, Vcc=3.3V Stand-by Current 2 Stand-by Current 1 0.10 2.00 IST [mA] IST [mA] 0.08 0.06 0.04 0.02 1.50 1.00 0.50 0.00 0.00 0.8 1.3 1.8 2.3 2.8 3 3.3 VCC [V] 3.2 3.4 3.6 VCC [V] Fig.1 Stand-by Current 1(Ist) OEB = “Vcc”, DDC_EN= “0V” Fig.2 Stand-by Current 2(Ist2) OEB = “Vcc”, DDC_EN= “Vcc” Circuit Current 120.00 ICC [mA] 100.00 80.00 60.00 40.00 20.00 0.00 3 3.2 3.4 3.6 VCC [V] Fig.3 Circuit Current(Vcc + AVcc) (Icc) OEB = “Vcc”, DDC_EN= “0V” Fig.4 Eye Diagram of BU16025MUV 2.25Gbps Data rate when PRE = “L”, Test Equipment DTG5334(tektronix), DSA80000B(Agilent) Fig.6 Eye Diagram of BU16025MUV 2.7Gbps Data rate when PRE = “H”, Test Equipment DTG5334(tektronix), DSA80000B(Agilent) Fig.5 Eye Diagram of BU16025MUV 2.25Gbps Data rate when PRE = “H”, Test Equipment DTG5334(tektronix), DSA80000B(Agilent) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/16 2011.01 - Rev.A Technical Note BU16025MUV ●Measurement symbol and circuit diagram AVcc RT ZO=RT TMDS Driver RT TMDS Receiver ZO=RT Fig 7 TMDS Output driver Vcc RINT RINT RT Y A VID VA TMDS Driver TMDS Receiver CL VY 0.5pF AVCC RT Z B VZ VB VID = VA - VB Vswing = VY - VZ VA Vcc V VB Vcc-0.4 V 0.4 V VIC VID(pp) 0V -0.4 V tPLH tPHL 80% 100% Vswing VOD(O) 0V Differential 20% tf VOD(U) Fig8 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 0% tr Test circuit and definition 6/16 2011.01 - Rev.A Technical Note BU16025MUV VY VOH 50% VZ VOL tsk(D) Fig9 Definition of differential intra pair skew TrTX(80% to 20%) SDA SCL SDA_SINK SCL_SINK tpdHL www.rohm.com tpdLH 1.8V TrTX(80% to 20%) 1.8V tpdHL 1.8V Fig10 © 2011 ROHM Co., Ltd. All rights reserved. 80% 20% 1.8V Vol SDA_SINK SCL_SINK SDA SCL TfTX(80% to 20%) TfTX(80% to 20%) 80% 20% tpdLH Vol DDC timing definitions 7/16 2011.01 - Rev.A Technical Note BU16025MUV ●Block diagram and pin configuration RINT 24 38 23 39 22 40 21 41 20 BU16025 (48-pin QFN) 42 43 44 19 18 17 A4 Y4 Selectable Equalizer B4 TMDS Driver Z4 VCC RINT A3 Y3 Selectable Equalizer B3 TMDS Driver Z3 VCC RINT Y2 A2 Selectable Equalizer B2 TMDS Driver Z2 VCC 12 10 GND Z1 Y1 Vcc Z2 Y2 GND Z3 Y3 Vcc Z4 Y4 RINT EQ Vcc PRE HPDINV GND REXT HPD SDAx SCLx TEST0 HDMIID_EN GND 11 13 9 48 8 14 7 47 6 15 5 46 4 16 3 45 2 VCC 25 26 27 28 29 30 31 I2C_ONB DDCEN GND HPD_SINK SDAy SCLy GND Vcc OEB 32 33 34 GND SELREF DDC_TI 35 PRE REXT EQ 37 1 GND B1 A1 Vcc B2 A2 GND B3 A3 Vcc B4 A4 36 OEB Y1 A1 Selectable Equalizer TMDS Driver Z1 B1 I2C slave for Dual mode configuration 0.4V SCL I2C_ONB HDMIID_EN SCL_SINK 1.8V SDA 0.4V SDA_SINK DDCEN 1.8V SELREF HPD HPD_SINK HPD_INV Fig.11 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/16 Block Diagram of BU16025MUV 2011.01 - Rev.A Technical Note BU16025MUV ●Pin Explanation Pin I/O Explanations Name Number B1, B2, B3, B4 38, 41, 44, 47 Input TMDS Negative input A1, A2, A3, A4 39, 42, 45, 48 Input TMDS Positive input Z1, Z2, Z3, Z4 23, 20, 17, 14 Output TMDS Negative input Y1, Y2, Y3, Y4 22, 19, 16, 13 Output TMDS Positive input EQ 1 Input PRE 3 Input HPDINV 4 Input REXT 6 Input HPD 7 SDAx 8 Inout DDC Data line(*2 Vol = 0.5V) SCLx 9 Inout DDC Clock line(*2 Vol = 0.5V) TEST0 10 Input Open or Gnd HDMIID_EN 11 Input OEB 25 Input SCLy 28 Inout DDC Clock line(*2) SDAy 29 Inout DDC Data line(*2) HPD_SINK 30 Input Hot plug detect input(10kΩ internal pull down) DDCEN 32 Input I2C_ONB 33 Input Equalizer gain setting(40kΩ internal pull down) “L” 5dB “H” 15dB TMDS Low output swing mode(Recommend High) Low : OFF High : ON HPD output select switch Low : non-invert High : Invert and open drain output TMDS Current control pin(via 1. 2kΩ to GND) Output Hot plug detect output (*1) (*3 ) HDMI ID Enable(40kΩ internal pull up) Low : 0xFF(DVI) High : ASCII (HDMI) TMDS line internal resistor and output enable switch Low : ON(Enable) High : High-Z I2C Repeater Enable Low : High-Z High : Enable 2 (*3 ) Built-in I C Slave Enable Switch(90kΩ internal pull up) Low : ON High : OFF (*4) DDC_TI 34 Input DDC Data hold margin setting (40kΩinternal pull down) DDC_TI = “L” Delay from SDAx to SDAy = 570nsec, Delay from SCLx to SCLy = 20nsec Delay from SDAy to SDAx = 370nsec, Delay from SCLy to SCLx = 20nsec DDC_TI = “H” Delay from SDAx to SDAy = 20nsec, Delay from SCLx to SCLy = 20nsec Delay from SDAy to SDAx = 20ncec, Delay from SCLy to SCLx = 20nsec SELREF 35 Input SCLx/SDAx L level output voltage select ( 40kΩ internal pull down) VCC GND (*1) (*2) (*3) (*4) 2 ,15, 21, 26, 40, 46 5, 12, 18, 24, 27, 31, 36, 37, 43 - Power - Ground HPD_OFF mode sets Hot plug detect output to High impedance. Except HPD_OFF mode, HPD is always active. SDAx/SCLx, SDAy/SCLy have different L level input and output voltage. Please refer recommended operating condition in detail HDMIID_EN, I2C_ONB don’t need to be Enable except using internal I2C slave. Data hold time increases when DDC_TI= “L”. But Data setup time and holdtime of Start condition decrease. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/16 2011.01 - Rev.A Technical Note BU16025MUV ●Look up table of I2C_ONB and HDMIID_EN pin Pin setting Name OEB Normal mode (recommend) HPD_OFF mode TMDS_OFF mode Output state 2 HDMI ID_EN IC Buffer Internal I2C slave HPD TMDS Internal R H H OFF OFF active ON DDCEN I2C_ONB L L L H H H active OFF active ON L L H L OFF OFF High Impedance ON L H H L active OFF High Impedance ON H L H H OFF OFF active OFF H H H H active OFF active OFF H L H L OFF OFF High Impedance OFF H H H L active OFF High Impedance OFF Display Port Translator mode (HDMI) - H L H active (HDMI) active OFF Display Port Translator mode (DVI) - H L L active (DVI) 0xFF active OFF None - L L - OFF OFF active OFF HPD_TMDS_OFF mode Display Port Translator mode DisplayPort Translator mode are used to access internal I2C slave. I2C Slave register stores value like below. The ASCII code of this value is ”DP-HDMI ADAPTOR<EOT> Please read from address 0x00 to 0x0F at the read cycle. Slave adr : 7'b100_0000 I2C_ONB L HDMIID_EN Acknowledge Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F (from slave) H : HDMI Connect Occur Data 0x44 0x50 0x2D 0x48 0x44 0x4D 0x49 0x20 0x41 0x44 0x41 0x50 0x54 0x4F 0x52 0x04 L : DVI Connect Occur Data 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF None Data 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF H - When I2C_ONB=1, slave adr 7'b100_0000 is disabled www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/16 2011.01 - Rev.A Technical Note BU16025MUV 2 I C Slave Read access to register block step 1 0 I2C Start(Master) S step 2 7 6 5 4 3 2 1 0 I C Device Address Write(Master) 1 0 0 0 0 0 0 0 step 3 9 I2C Acknowledge(Slave) A step 4 7 6 5 4 3 2 1 0 I C Logic Address(Master) 0 0 0 0 0 0 0 0 step 5 9 0 2 S : Start Condition Write 2 2 I C Acknowledge(Slave) A step 6 0 2 I C Stop(Master) P step 7 0 2 A : Acknowledge P : Stop Condition I C Start(Master) S step 8 7 6 5 4 3 2 1 1 0 0 0 0 0 0 2 I C General Address Read(Master) 1 Read step 9 9 I2C Acknowledge(Slave) A step 10 I2C Read Data(Slave) step 11 2 I C Not-Acknowledge(Master) 7 6 5 4 3 2 1 0 Data Data Data Data Data Data Data Data 9 X X : A (Acknowledge) or ~A (Not-Acknowledge) When X =A, Address pointer is incremented and repeat step10. 2 When X =~ A, I C slave reg stops and moves to step12. step 12 0 I2C Stop(Master) P www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/16 2011.01 - Rev.A Technical Note BU16025MUV ●I/O equivalence circuit TMDS Input Stage Control Input Stage VDD VDD 50Ω 50Ω Bx Ax I2C Input/Output Stage PRE OEB DDCEN HPDINV HPD_SINK Input Stage VDD SCL_SINK SDA_SINK SCL SDA VDD VDD HPD_SINK Control Input Stage VDD Control Input Stage VDD SELREF EQ DDC_TI HPD Output Stage TMDS Output Stage Y VDD Z I2C_ONB HDMIID_EN www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. HPD 12/16 2011.01 - Rev.A Technical Note BU16025MUV ●Notes for use 1) Internal Resistor about HPD_SINK For the reason HPD_SINK pin have internal resistor of 10kohm like below, don’t put external resistor. Vcc BU16025MUV HPD_SINK 10kΩ Fig12 HPD_SINK I/O schematic 2) About unused input pin a. Unused inputs of TMDS recommend to OPEN Vcc RINT RINT RT A TMDS Receiver TMDS Driver B Y AVcc Z Fig 13 RT TMDS Input Recommendation b. Unused inputs of DDC recommend to pull up. Vcc Vcc 4.7k 4.7k SCLy SDAy SCLx SDAx Fig 14 Unused DDC Buffers of R side c. Unused input of HPD recommends to open www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/16 2011.01 - Rev.A Technical Note BU16025MUV 3) Serial connection of TMDS differential line The serial connections of TMDS differential line like fig15 decrease the jitter tolerant characteristic. Especially when system needs 1080p (12bit) data rate, deterioration of Jitter tolerance is outstanding. This problem also depends on receiver IC characteristic. When 1080p (12bit) is required , Rohm doesn’t recommend cascade connect application. Vcc Vcc RINT RINT RINT RINT RT A TMDS Receiver TMDS Driver B Y A Z B Fig 15 TMDS Receiver TMDS Driver Y AVCC Z RT cascade connection notice 4) DDC line connections DDC buffer of SDAx/SCLx and SDAy/SCLy have different low threshold level. Connect like below Recommend application of BU16025MUV Source Equipment Repeater Equipment BU16025MUV MASTER SDAx SCLx SDAy SCLy Sink Equipment BU16025MUV BU16025MUV SDAy SCLy SDAy SCLy SDAx SCLx SDAx SCLx SLAVE Recommend application of BU16025MUV and BU160xxKV(*) Source Equipment Repeater Equipment BU16025MUV MASTER SDAx SCLx SDAy SCLy Sink Equipment BU16025MUV BU160xxKV(*) SDAy SCLy SDA SCL SDAx SCLx SDA_SINK SCL_SINK SLAVE (*)BU160xxKV → BU16006/16018/16027/16024KV Fig 16 DDC connection notice 5) AC Coupling This IC can also communicate using AC coupling capacitor with TMDS line. But even connecting AC coupling capacitor, AC current may flow if input common mode voltage between two devices is different. This AC current may damage the lower common mode voltage devices like PCIe or DisplayPort. 6) TMDS output offset voltage Offset voltage may appear to TMDS output when there is no signal to TMDS input differential line. OE should be set to “H” to avoid it. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/16 2011.01 - Rev.A Technical Note BU16025MUV ●Thermal Derating Curve Rohm standard 4layer board Power Dissipation : Pd (W) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 150 Ambient Temperature: Ta (℃) Fig.17 Thermal Derating Curve www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/16 2011.01 - Rev.A Technical Note BU16025MUV ●Ordering part number B U 1 Part No. 6 0 2 5 M Part No. U V Package MUV: VQFN48AV7070 - E 2 Packaging and forming specification E2: Embossed tape and reel VQFN048AV7070 <Tape and Reel information> 7.0 ± 0.1 7.0±0.1 1.0MAX 4.7±0.1 1 12 1500pcs E2 The direction is the 1pin of product is at the upper left when you hold ) (0.22) ( reel on the left hand and you pull out the tape on the right hand 13 4.7 ± 0.1 0.4 ± 0.1 48 +0.03 0.02 -0.02 S C0.2 Embossed carrier tape Quantity Direction of feed 1PIN MARK 0.08 S Tape 37 24 36 0.75 0.5 25 +0.05 0.25 -0.04 1pin (Unit : mm) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Reel 16/16 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2011.01 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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