ROHM BA829_09

Serial-in / Parallel-out Driver Series
Serial / Parallel
5-input Driver
BA829
No.09051EAT02
●Description
Serial-in-parallel-out driver is a constant-current output driver with a built-in shift register and a latch circuit to turn on a
maximum of 8 LED by a 5-line interface linked to a microcontroller. Output current value of constant-current can be set up to
a maximum of 300mA.
●Features
1) This product can drive a maximum of 300mA.
2) When the strobe terminal is controlled by the drive timing pulse, current during a period without driving can be reduced.
3) When the data output terminal is used as the next input data, cascade connection becomes possible.
4) Digital ground and power ground are separated.
5) Latch is built in between the shift register and the driver output.
6) Stand-by function is incorporated. (10μA Typ. upon standby)
●Applications
For AV equipment such as, component stereo sets, videos and TV sets, PCs, and control microcontroller mounted equipment.
●Absolute maximum ratings
●Thermal derating curve
1600
Limit
Unit
Power supply voltage
VDD
-0.3 to +7.0
V
Power dissipation
Pd
1100*
mW
ISINK
-0.3 to VCC
V
VO
15
V
Input voltage
Output voltage
Operating temperature
Topr
-25 to +70
℃
Storage temperature
Tstg
-55 to +125
℃
*1 Reduced by 11 mW/C over 25C.
1400
Pd 〔mW〕
Symbol
Power dissipation
Parameter
1200
1000
BA829
800
600
400
200
70℃
0
25
50
75
100
125
150
175
Ambient temperature Ta 〔℃〕
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1/7
2009.06 - Rev.A
Technical Note
BA829
●Recommended operating conditions (Topr=-25℃ to +70℃)
Parameter
Power supply
Clock frequency
Power setup time
Clock pulse width
Data setup time
Data hold time
Latch pulse timing 1
Latch pulse timing 2
Latch pulse width
Strobe pulse timing 1
Strobe pulse width
Voltage between L-GND and P-GND
Symbol
Min.
Typ.
Max.
Unit
Condition
VCC
TCLK
tPset
tWC
tDset
tDhold
tLT1
tLT2
tWL
tST1
tws
VG
4.5
500
1
300
400
600
250
800
300
3
-
5.0
-
5.5
500
0.2
V
kHz
ns
ns
ns
ns
ns
ns
ns
ns
μs
V
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
-
* Electric potential is a difference of L-GND and P-GND. Short-circuit near the power source whenever possible.
However, between L-GND Pin and P-GND Pin, product should be used in a range not exceeding 0.2V.
●Electrical characteristics (Unless otherwise specified, Ta=25℃,VCC=5.0V)
Parameter
Symbol
Min.
Typ.
Max.
Supply current 1
Icc1
－
10
20
Supply current 2
Icc2
－
110
158
Supply current 3
Icc3
－
14
20
Output ON voltage
VOON
－
0.4
0.6
Output leakage current
IOOFF
－
10
50
Data transference time
fCLK
500
－
－
Input high-level voltage
VIH
2.6
－
－
Input low-level voltage
VIL
－
－
0.8
Unit
μA
mA
mA
V
μA
kHz
V
V
Input high-level current
IIH1
－
0.1
10
μA
Input low-level current
IIL1
－
-0.01
-0.1
mA
Out put high-level voltage
Output low-level voltage
Data output transmission delay
Data output transmission delay
VDDH
VDDL
tDLH
tDHL
2.8
－
－
－
3.0
0.3
0.6
0.6
－
0.4
1.0
2.0
V
V
μs
μs
Print output transmission delay
tOLH
－
－
10
μs
Print output transmission delay
tOHL
－
－
10
μs
Input high-level current
Input low-level current
IIH2
IIL2
－
－
0.04
0.1
0.1
10
mA
μA
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2/7
Condition
PSW“L”
PSW“H”, STB“H”
PSW“H”, STB“L”
ICCN=300 mA
V0=13.5V
－
－
－
V1=3.4V,CLK,LATCH
,DATA,STB
V1=0.4V,CLK,LATCH
,DATA,STB
IDOH=-400μA
IDOL=⊿1.6mA
RLD=10kΩ
RLD=10kΩ
RL=560kΩ560,
V0=13.5V
RL=560kΩ560,
V0=13.5V
V1=3.4V,PSW
V1=0.4V,PSW
Test Circuit
Fig.1
Fig.1
Fig.1
Fig.1
Fig.1
Fig.1
Fig.2
Fig.2
Fig.1
Fig.1
Fig.1
Fig.1
Fig.4
Fig.4
Fig.4
Fig.4
Fig.1
Fig.1
2009.06 - Rev.A
Technical Note
BA829
WDOFF
RL×8
●Block diagram
V
VO
A
VDCH
VDCL V
A
RLD
VOON
01
Vcc
LGND
PGND
PGND
CLK
DATA
LATCH
STB
PSW
Do
08
V
A
ICC1～3
Pulse Gen.
VCC
VCC
LGND
CLK
DATA
LATCH
STB
PAW
Fig.1
VCC
A
IIIH IIIL
VI
Fig.2
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3/7
2009.06 - Rev.A
Technical Note
BA829
●Block diagram
01
02
03
04
05
06
07
08
13
12
11
10
9
8
7
6
PGND 14
STB 17
LATCH
5
POWER
GND
4
VCC
LATCH 18
SHIFT REG
15 LOGIC
GND
CLK 1
3 DOUT
DATA 16
2 POWER ON
PSW
Fig.3
●Pin descriptions
PIN No.
Terminal
1
CLK
I/O
I
Function
Clock input
2
PSW
I
Power switch
3
DOUT
O
Cascade output
4
VCC
-
Power supply
5
PGND
-
GND
6
O8
O
7
O7
O
8
O6
O
9
O5
O
10
O4
O
11
O3
O
12
O2
O
13
O1
O
14
PGND
-
GND
15
LGND
-
GND
16
DATA
I
Serial data input
Parallel data output
17
STB
I
Strobe input , “L” active
18
LATCH
I
Latch input
●Description of operation
BA829 is configured internally as shown in the logic circuit diagram. Terminals of clock (CLK), data (DATA), latch (LATCH),
strobe (STB), and power switch (PSW) are available as input.
Data input is synchronized with the clock, read serially during the rise time and latched at the rise time edge of the shifted
shift register. Latched data appears on the output terminal of O1-O8 by the strobe input. Pulse width is the same as that of
the strobe input. Data output terminal DOUT, is a terminal used for cascade connection of the IC, where the output of the
final stage of the shift register has appeared, and is connected to the next data input terminal DATA. In this case, when the
clock and the strobe are used in conjunction, output terminal can be increased by 8 bits at a time.
To affect the standby mode, set the power switch to “L”.
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4/7
2009.06 - Rev.A
Technical Note
BA829
●Timing chart
～
～
tPset
PSW
twc
twc
1
2
9
10
～
～
CLK
8
tDset tDhold
～
～
DATA
tDHL
tDLH
～
～
DOUT
tLT1
tLT2
LATCH
～
～
～
～
tWL
tWL
tST1
～
～
STB
tWS
～
～
tDHL
tDLH
OB
Fig.4
●Interfaces
VCC
VCC
VCC
IL
IL
(a) INPUT (CLK , DATA , LATCH , STB)
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(b) INPUT (PSW)
5/7
(c) OUTPUT (DOUT)
2009.06 - Rev.A
Technical Note
BA829
●Operation Notes
1. Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2. Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
3. Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, note that capacitance characteristic values are reduced at low temperatures.
4. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
5. Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
6. Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
7. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
8. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P
+
N
P
P
+
N
N
Parasitic
element
P+
P substrate
Parasitic element
GND
B
N
P
P
C
+
N
E
Parasitic
element
P substrate
Parasitic element
GND
GND
GND
Other adjacent elements
Fig.5 Example of IC structure
9. Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring pattern of any external components, either.
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6/7
2009.06 - Rev.A
Technical Note
BA829
●Ordering part number
B
D
8
Part No.
2
9
Part No.
Package
None:DIP18
Packaging and forming specification
None: Tube
DIP18
<Tape and Reel information>
22.9±0.3
10
6.5±0.3
18
Tube
Quantity
1000pcs
Direction of feed
Direction of products is fixed in a container tube
9
3.29±0.2 3.95±0.3
0.51Min.
1
Container
7.62
0.3±0.1
0°−15°
2.54
0.5±0.1
∗ Order quantity needs to be multiple of the minimum quantity.
(Unit : mm)
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7/7
2009.06 - Rev.A
Notice
Notes
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consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
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The Products are not designed or manufactured to be used with any equipment, device or
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