MM54HC155/MM74HC155 Dual 2-To-4 Line Decoder/Demultiplexers General Description The MM54HC155/MM74HC155 is a high speed silicon-gate CMOS decoder/demultiplexer. It utilizes advanced silicongate CMOS technology and features dual 1-line-to-4-line demultiplexers with independent strobes and common binary-address inputs. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input C1 is inverted at its outputs and data applied to C2 is non-inverted at its outputs. The inverter following the C1 data input permits use as a 3-to-8-line decoder, or 1-to-8line demultiplexer, without gating. All inputs to the decoder are protected from damage due to electrostatic discharge by diodes to VCC and Ground. Connect and Logic Diagram The device is capable of driving 10 low power Schottky TTL equivalent loads. The MM54HC155/MM74HC155 is functionally and pin equivalent to the 54LS155/74LS155 with the advantage of reduced power consumption. Features Applications Dual 2-to-4-line decoder Dual 1-to-4-line demultiplexer 3-to-8-line decoder 1-to-8-line demultiplexer Typical propagation delay: 22 ns Low quiescent current: 80 mA maximum (74HC series) Wide operating range: 2V – 6V Y Y Y Y Truth Tables 2-to-4-Line Decoder or 1-Line to 4-line Demultiplexer Inputs Select Outputs Strobe Data B A G1 C1 1Y0 1Y1 1Y2 1Y3 X L L H H X X L H L H X H L L L L X X H H H H L H L H H H H H H L H H H H H H L H H H H H H L H Inputs Select TL/F/8364 – 1 Order Number MM54HC155 or MM74HC155 Outputs Strobe Data B A G2 C2 2Y0 2Y1 2Y2 2Y3 X L L H H X X L H L H X H L L L L X X L L L L H H L H H H H H H L H H H H H H L H H H H H H L H 3-Line-to-8-Line Decoder or 1-Line-to-8-Line Demultiplexer Inputs Outputs Strobe Select (0) Or Data IC B A IG X L L L L H H H H H L L L L L L L L X L L H H L L H H X L H L H L H L H (1) (2) (3) (4) (5) (6) (7) 2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3 H L H H H H H H H H H L H H H H H H H H H L H H H H H H H H H L H H H H H H H H H L H H H H H H H H H L H H H H H H H H H L H H H H H H H H H L IC e inputs C1 and C2 connected together IG e inputs G1 and G2 connected together H e high level L e low level X e don’t care C1995 National Semiconductor Corporation TL/F/8364 RRD-B30M105/Printed in U. S. A. MM54HC155/MM74HC155 Dual 2-To-4 Line Decoder/Demultiplexers January 1988 Absolute Maximum Ratings (Notes 1 and 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) MM74HC MM54HC Input Rise/Fall Time VCC e 2.0V (tr, tf) VCC e 4.5V VCC e 6.0V b 0.5V to a 7.0V Supply Voltage (VCC) b 1.5V to VCC a 1.5V DC Input Voltage (VIN) b 0.5 to VCC a 0.5V DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) 20 mA DC Output Current, per pin (IOUT) 25 mA DC VCC or GND Current, per Pin (ICC) 50 mA b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temp. (TI) (Soldering 10 sec) 260§ C Min 2 Max 6 Unit V 0 VCC V b 40 b 55 a 85 a 125 C C ns ns ns 1000 500 400 DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC 74HC 54HC TA e 25§ C TA e b40§ to a 85§ C TA e b 55§ to a 125§ C Typ Units Guaranteed Limits VIH Minimum High Level Input Voltage 2.0V 4.5V 6.0V 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V V V VIL Maximum Low Level Input Voltage** 2.0V 4.5V 6.0V 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V V V VOH Minimum High Level VIN e VIH or VIL Output Voltage lIOUTl s 20 mA 2.0V 4.5V 6.0V 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V V V VIN e VIH or VIL lIOUTl s 4.0 mA lIOUTl s 5.2 mA 4.5V 6.0V 4.2 5.7 3.98 5.48 3.84 5.34 3.7 5.2 V V Maximum Low Level VIN e VIH or VIL Output Voltage lIOUTl s 20 mA 2.0V 4.5V 6.0V 0 0 0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V V V VIN e VIH or VIL lIOUTl s 4.0 mA lIOUTl s 5.2 mA 4.5V 6.0V 0.2 0.2 0.26 0.26 0.33 0.33 0.4 0.4 V V VOL IIN Maximum Input Current VIN e VCC or GND 6.0V g 0.1 g 1.0 g 1.0 mA ICC Maximum Quiescent VIN e VCC or GND Supply Current IOUT e 0 mA 6.0V 8.0 80 160 mA Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified, all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ . Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. **VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89. 2 AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns Symbol Parameter tPHL, tPLH Maximum Propagation Delay, Binary Select to any Output 4 Levels of Delay Conditions Typ Units 18 ns AC Electrical Characteristics (Note 6) CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions VCC TA e 25§ C Typ 74HC 54HC TA e b40 to a 85§ C TA e b55 to a 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay Binary Select to any Output 4 Levels of Delay 2.0V 110 4.5V 22 6.0 18 175 35 30 219 44 38 254 51 44 ns ns ns tTLH, tTLH Maximum Output Rise and FallTime 2.0V 4.5V 6.0V 30 8 7 75 15 13 95 19 16 110 22 19 ns ns ns 3 10 10 10 pF CIN Maximum Input Capacitance CPD Power Dissipation Capacitance (Note 5) (Note 5) 47 pF Note 5: CPC determines the no load dynamic power consumption, Pd e CPD VCC2f a ICC, and the no load dynamic current consumption, IS Q CPD VCCf a ICC. Logic Diagram TL/F/8364 – 2 3 MM54HC155/MM74HC155 Dual 2-To-4 Line Decoder/Demultiplexers Physical Dimensions inches (millimeters) Order Number MM54HC155J or MM74HC155J NS Package Number J16A Order Number MM74HC155N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. 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