IDT AS4684AAHG

PRELIMINARY DATASHEET
IDTAS4684A
0.5 OHM, DUAL SPDT ANALOG SWITCH
Description
Features
The IDTAS4684A low on-resistance (RON), low voltage,
dual single-pole/double-throw (SPDT) analog switch
operates from a single +1.8 V to +5.5 V supply. The
IDTAS4684A features a 0.5Ω (max) RON for its NC switch
and a 0.8Ω (max) RON for its NO switch at a +2.7 V supply.
It also features break-before-make switching action (2 ns)
with tON = 50 ns and tOFF = 40 ns at +3 V. The digital logic
inputs are 1.8 V logic-compatible with a +2.7 V to +3.3 V
supply. Comes in a 12-bump CSP package.
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Applications
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Speaker headset switching
MP3 players
Battery-operated equipment
Audio and video signal routing
PCMCIA cards
Cellular phones
Modems
+1.8 V to +5.5 V single-supply operation
Rail-to-rail signal handling
1.8 V logic compatibility
RON match between channels: 0.06Ω (max)
RON flatness over signal range: 0.15Ω (max)
NCx Switch RON: 0.5Ω max (+2.7 V Supply)
NOx Switch RON: 0.8Ω max (+2.7 V Supply)
Low crosstalk: -68dB (100 kHz)
High Off-isolation: -64dB (100 kHz)
THD: 0.03%
50 nA (max) supply current
Low leakage currents: 1 nA (max) at TA = +25°C
12-bump, 0.5 mm-Pitch UCSP package
Block Diagram
IDT™ 0.5 OHM, DUAL SPDT ANALOG SWITCH
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Pin Assignment (CSP)
A
B
C
1
2
3
4
Truth Table
IN
NO
NC
0
OFF
ON
1
ON
OFF
Note: Switches shown for logic “0” input.
Pin Descriptions
Pin Numbers
Pin Name
Pin Description
A1
NC1
Analog switch. Normally closed terminal 1.
A2
IN1
Digital control input 1.
A3
COM1
A4
NO1
Analog switch. Normally open terminal 1.
B1
GND
Ground.
B2
NC
No connect.
B3
NC
No connect.
B4
V+
Positive supply voltage input.
C1
NC2
Analog switch. Normally closed terminal 2.
C2
IN2
Digital control input 2.
C3
COM2
C4
NO2
Analog switch. Common terminal 1.
Analog switch. Common terminal 2.
Analog switch. Normally open terminal 2.
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Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the IDTAS4684A. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range. All voltages referenced to
ground.
Symbol
Min
Max
Unit
V+, IN
-0.3
+6
V
COM, NO, NC
-0.3
(V+ + 0.3)
V
NO, NC, COM
Rating
Continuous current
±300
Peak current (pulsed at 1ms, 50% duty cycle)
±400
Peak current (pulsed at 1ms, 10% duty cycle)
±500
Continuous power dissipation (TA = +70°C) and
12-bump UCSP (derate 11.4mW/°C above +70°C)
+909
mW
0
+70
°C
-65
+150
°C
Lead temperature (soldering, 10s)
+300
°C
Bump temperature (soldering, infrared, 15s)
+200
°C
Vapor phase (60s)
+215
°C
Operating temperature range
TSTG
Storage temperature range
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Electrical Characteristics
Unless stated otherwise, V+ = 2.7 V to 3.3 V, VIH = 1.4 V, VIL = 0.5 V, TA = TMIN to TMAX. Typical values are at +3 V and 25°C
Parameter
Symbol
Conditions
TA
Min.
TMIN to TMAX
0
Typ.
Max. Units
Analog Switch
Analog Signal Range
VNO, VNC, VCOM
NC On-Resistance
RON(NC)
V+ = 2.7 V, ICOM = 100 mA,
VNC = 0 to V+; Note 3
NO On-Resistance
RON(NO)
V+ = 2.7 V, ICOM = 100 mA,
VNO = 0 to V+; Note 3
On-Resistance Match
between channels
RON
V+ = 2.7 V, ICOM = 100 mA,
VNO or VNC = 1.5 V; Notes 3, 4
+25°C
3.0
TMIN to TMAX
V+
V
0.5
Ω
0.5
+25°C
0.45
TMIN to TMAX
0.8
Ω
0.8
+25°C
0
0.6
Ω
TMIN to TMAX
0.6
NC On-Resistance Flatness
RFLAT(NC)
V+ = 2.7 V, ICOM = 100 mA,
VNC = 0 to V+; Note 5
TMIN to TMAX
0.15
Ω
NO On-Resistance Flatness
RFLAT(NO)
V+ = 2.7 V, ICOM = 100 mA,
VNO = 0 to V+; Note 5
TMIN to TMAX
0.35
Ω
-1
+1
nA
-10
+10
-2
+2
-20
+20
NO or NC Off-leakage Current
COM On-leakage Current
INO(OFF) or
INC(OFF)
ICOM(ON)
V+ = 3.3 V, VNO or VNC = 3 V, 0.3 V
+25°C
VCOM = 0.3 V, 3 V
TMIN to TMAX
V+ = 3.3 V, VNO or VNC = 3 V, 0.3
+25°C
V, or floating
TMIN to TMAX
VCOM = 0.3 V, 3 V, or floating
nA
Dynamic Characteristics
Turn-on Time
tON
V+ = 2.7 V, VNO or VNC = 1.5 V, RL
= 50Ω, CL = 35 pF
Turn-off Time
tOFF
V+ = 2.7 V, VNO or VNC = 1.5 V, RL
= 50Ω, CL = 35 pF
Break-Before-Make-Delay
tBBM
V+ = 2.7 V, VNO or VNC = 1.5 V,
RL = 50Ω, CL = 35 pF
Charge Injection
Q
+25°C
30
TMIN to TMAX
+25°C
25
TMIN to TMAX
TMIN to TMAX
2
50
ns
60
ns
30
ns
40
ns
15
ns
COM = 0, RS = 0, CL = 1 nF
+25°C
200
pC
Off-Isolation
VISO
CL = 5 pF; RL = 50Ω, f = 100 kHz,
VCOM = 1 VRMS, Note 6
+25°C
-64
dB
Crosstalk
VCT
f = 100 kHz, RL = 50Ω, CL = 5 pF,
VCOM = 1 VRMS
+25°C
-68
dB
Total Harmonic Distortion
THD
RL = 600Ω, IN = 2 V p-p,
f = 20Hz to 20 kHz
+25°C
0.03
%
NC Off-Capacitance
CNC(OFF)
f = 1 MHz
+25°C
84
pF
NC Off-Capacitance
CNO(OFF)
f = 1 MHz
+25°C
37
pF
NC On-Capacitance
CNC(ON)
f = 1 MHz
+25°C
190
pF
NC On-Capacitance
CNO(ON)
f = 1 MHz
+25°C
150
pF
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Parameter
ANALOG SWITCH
Symbol
Conditions
TA
Min.
1.4
Typ.
Max. Units
Digital I/O
Input Logic HIGH
VIH
TMIN to
TMAX
Input Logic LOW
VIL
TMIN to
TMAX
IN Input Leakage Current
IIN
VIN = 0 or V+
V
0.5
V
TMIN to
TMAX
-1
1
µA
TMIN to
TMAX
1.8
5.5
V
V+ = 5.5 V, VIN = 0 or V+,
+25°C
-50
+50
nA
Note 3
TMIN to
TMAX
-200
Power Supply
Power Supply Range
V+
Supply Current
I+
+0.04
+200
Notes:
1. The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value
a maximum.
2. UCSP parts are 100% tested at +25°C only and guaranteed by design and correlation at the full hot-rated temperature.
3. Guaranteed by design.
4. RON = RON(MAX) - RON(MIN), between NC1 and NC2 or between NO1 and NO2.
5. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal ranges.
6. Off-isolation = 20log10 (VCOM / VCO), VCOM = output, VCO = input to off switch.
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Test Circuits and Timing Diagrams
Overvoltage Protection Using Two External Blocking Diodes
Switching Time
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Break-Before-Make Interval
Charge Injection
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On-Loss, Off-Isolation, and Crosstalk
Channel Off/On Capacitance
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Marking Diagram (CSP)
IDTAS4
684AHG
0633AAH
Notes:
1. “Z” is the device step (1 to 2 characters).
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “$” is the assembly mark code.
4. “G” after the two-letter package code designates RoHS compliant package.
5. “I” at the end of part number indicates industrial temperature range.
6. Bottom marking: country of origin if not USA.
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Package Outline and Package Dimensions (12-bump CSP)
Package dimensions are kept current with JESD Publication No. 95-1,
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Ordering Information
IDT
XXXXXX
Device Type
XXX
Package
X
Temp. Range
X
Shipping
Carrier
8
Blank
Tape and Reel
Tray
Blank
Commercial (0 to +70°C)
AHG
Chip Scale Package
AS4684A 0.5Ω Low Voltage,
Dual SPDT Analog Switch
IDT™ 0.5 OHM, DUAL SPDT ANALOG SWITCH
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Revision History
Rev.
Originator
Date
A
Jamal Sarma
9/25/07
Description of Change
Created datasheet in new template; added marking diagram. This data sheet improves
the VIH for the chip from CMOS to TTL levels.
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