DATA SHEET SKY73212-11: 1700-2000 MHz Diversity Downconversion Mixer with Integrated Integer-N PLL and VCO Applications Description • Cellular base station systems: GSM/EDGE, CDMA2000, WCDMA, TD-SCDMA Skyworks SKY73212-11 is a fully integrated diversity downconverter that includes a high linearity mixer, large dynamic range Intermediate Frequency (IF) amplifier, and a complete Voltage Controlled Oscillator (VCO), synthesizer, and Local Oscillator (LO) chain. Low loss RF baluns have also been included to reduce design complications and to lower system cost. • Other wireless communication systems Features • RF frequency range: 1700 to 2000 MHz • IF frequency range: 40 to 300 MHz • Conversion gain: 9 dB • IIP3: +24 dBm; OIP3: +33 dBm • Noise Figure: 11 dB • Integrated RF balun • High linearity IF amplifier • Integer-N frequency synthesizer • Low phase-noise VCO • Low RF output comparison spurs • Programmable 18-bit N-counter and 11-bit R-counter • Wide range of reference frequencies • Programmable charge pump currents • Flexible configuration that allows connection to an external VCO or PLL The SKY73212-11 features a 3rd Order Input Intercept Point (IIP3) of +24 dBm and a Noise Figure (NF) of 11 dB, which make the device an ideal solution for high dynamic range systems such as 2G/3G base station receivers. The SKY73212-11 also includes a fully integrated wideband VCO/Integer-N frequency synthesizer. By applying internal VCO division, the output LO frequency can be set to the desired value while minimizing the phase noise. The SKY73212-11 is controlled by a Serial Peripheral Interface (SPI) and is manufactured using a robust silicon BiCMOS process. The device has been designed for optimum long-term reliability. It is manufactured in a compact, 44-pin 10 x 6 mm Multi-Chip Module (MCM). A functional block diagram is shown in Figure 1. The pin configuration and package are shown in Figure 2. Signal pin assignments and functional pin descriptions are provided in Table 1. • Digital lock detector • Optional adjustment of the core, divider, and charge pump currents by external resistor • Power supply for mixer: 5 V; power supply for synthesizer: 3.3 V • Small, low-cost MCM (44-pin, 10 x 6 mm) SMT package (MSL3, 260 °C per JEDEC J-STD-020) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 1 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 1. SKY73212-11 Block Diagram Figure 2. SKY73212-11 Pinout – 44-Pin MCM (Top View) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 2 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Table 1. SKY73212-11 Signal Descriptions Pin # Name Description 1 RF_INA RF input, channel A 2 N/C No connection 3 GND Ground 4 GND Ground 5 VDD_LO 6 GND 7 8 Pin # 23 Name Description LE Latch enable input for the SPI 24 DATA Data input for the SPI 25 CLK Clock input for the SPI 26 N/C No connection LO DC supply, +5 V 27 N/C No connection Ground 28 N/C No connection GND Ground 29 N/C No connection N/C No connection 30 VDD_VCO VCO supply, +3.3 V 9 RF_INB RF input, channel B 31 VCO_RES External resistor to set VCO bias 10 VDD_MIXB Channel B mixer DC supply, +5 V 32 GND Ground 11 GND Ground 33 LO_TEST_OUT LO test port 12 IF_OUTBP Positive IF output, channel B 34 GND Ground 13 IF_OUTBN Negative IF output, channel B 35 VDD_OBUF Dividers and LO buffer supply, +3.3 V 14 PWRDN_B Mixer power down, channel B 36 GND Ground 15 GND Ground 37 N/C No connection 16 VCTRL VCO tuning voltage 38 N/C No connection 17 VDD_PLL PLL supply, +3.3 V 39 GND Ground 18 CP_OUT Charge pump output 40 PWRDN_A Mixer power down, channel A 19 LD_OUT Lock detect output 41 IF_OUTAN Negative IF output, channel A 20 VDD_DIG Supply for digital blocks, +3.3 V 42 IF_OUTAP Positive IF output, channel A 21 VDD_CLK Reference buffer supply, +3.3 V 43 GND Ground 22 REF_CLK Reference clock input 44 VDD_MIXA Channel A mixer DC supply, +5 V Functional Description LO Buffers The SKY73212-11 is comprised of three main functional blocks: The LO section is optimized for low-side LO injection. The LO can be driven over a wide frequency range with only slight degradation in performance. • RF balun and passive mixer • IF amplifier • Synthesizer IF Amplifier • VCO The SKY73212-11 includes high dynamic range IF amplifiers that follow the passive mixers in the signal path. The outputs require a supply voltage connection using inductive chokes. These choke inductors should be high-Q and have the ability to handle 200 mA or greater. A simple matching network allows the output ports to be matched to a balanced 200 Ω impedance. • VCO dividers and LO chain RF Balun and Passive Mixer The RF baluns provide a single ended input, which can easily be matched to 50 Ω using a simple external matching circuit. The RF baluns offer very low loss, and excellent amplitude and phase balance. The high linearity SKY73212-11 integrates a passive, double balanced mixer that provides a very low conversion loss, and an excellent 3rd Order Input Insertion Point (IIP3). Additionally, the balanced nature of the mixer provides for high port-to-port isolation. The IF amplifiers are optimized for IF frequencies between 40 and 300 MHz. The IF amplifiers can be operated outside of this range, but with a slight degradation in performance. Mixer Power Down A power-down function for each IF amplifier and corresponding LO buffer is available in the SKY73212-11. The power-down function Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 3 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO is controlled through the PWRDN_A and PWRDN_B signals (pins 40 and 14, respectively): PWRDN_A and PWRDN_B Input Enable/Disable High Channels A/B disabled Low Channels A/B enabled Synthesizer The frequency synthesizer is composed of the R-divider, Ndivider, phase detector, charge pump, and lock detector. R-Divider The 11-bit programmable R-divider divides the reference input frequency and generates the reference input for the phase detector. The R-divider range varies from 1 to 211 – 1(2047). Charge Pump The charge pump is used to convert the logic levels of the Up and Dn pulses, carrying the phase error between the reference and the divided signal into analog quantities/current pulses. The output of the SKY73212-11 charge pump is programmable and varies between 1.2 mA and 7.2 mA. Additional adjustment of the charge pump current can be accomplished by changing the value of the external PLL bias resistor. Lock Detector The lock detector circuit is activated when the phase difference between the Up and Dn phase detector signals for a given number of comparison cycles is shorter than a fixed delay. The CMOS output is active high when the loop is locked. The lock detector can be monitored from pin 19 (LD_OUT). N-Divider The N-divider consists of a selectable 16/17 or 32/33 prescaler, 13-bit main counter, and 5-bit swallow counter. The 18 bit Ndivider ratio is calculated as: VCO The VCO is designed to generate the LO signal with the tuning function controlled by the synthesizer. N=P×M–S VCO Dividers and LO Chain Where: P = Prescaler value M = Main counter value S = Swallow counter value The N-divider range is from P2 to 218 – 1. For a 32/33 prescaler, the N-divider range varies from 1024 to 262143. The divider chain consists of dividers and LO drivers. The LO section is optimized for low-side LO injection at an RF frequency of 1700 to 2000 MHz. Digital Interface Phase Detector The phase detector is an edge-controlled digital circuit. The circuit has two inputs: the reference signal (Ref) and the N-divider output. There are two digital outputs (Up and Dn) that drive the charge pump. When the input phase difference is positive, the Up output is pulled up to VDD. When the input phase difference is negative, the Dn output is pulled down to ground. This type of phase detector acts only on the positive edges of the input signals. A three-wire SPI provides mode and bias control, and control of the PLL. The serial interface consists of three signals: the bus clock (CLK), latch enable (LE), and the serial data line (DATA). A write data stream consists of 25 bits: Bits[15:0] provide the 16-bit data block. Bits[20:16] provide the register address. Bits[24:21] provide the device address (the SKY73212-11 is 0110b). A timing diagram for the SPI write cycle is shown in Figure 3. Figure 3. SPI Write Cycles Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 4 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Serial Bus Timing The SPI bus speed is programmable. Timing requirements for the CLK, DATA, and LE signals are provided in Table 2. A serial data input timing diagram is shown in Figure 4. PLL Control Registers (R-Divider and N-Divider) There are three digital PLL control registers that are used to store the R-divider and N-divider values: R_DIV, N_DIV1, and N_DIV2. By default, all registers are 25 bits wide. Bits[20:16] are the address bits of the registers. The 16 least significant bits (LSBs) represent the data bits. Three values are needed to calculate the three PLL dividers: the desired frequency (FRF), the VCO divider (D), and the frequency step size (FSTEP). The VCO frequency (FVCO) has a range of 2.7 GHz to 4.0 GHz, and is defined by the product of the desired frequency (FRF) and the VCO divider, D: FVCO = FRF × D (1) The VCO divider (equal to 1, 2, 3, 4, or 8) is chosen so that the product of FRF × D is within the specified VCO range. Table 2. SPI Timing Requirements Timing tperiod Description Minimum Time (ns) Clock period 25 thigh Clock high time 10 tsu Data setup to clock rise 5 thld Data hold from clock rise 5 telch Enable low to clock rise 10 twidth Enable high width 10 tefeh Clock fall to enable high 20 Figure 4. SPI Input Timing Diagram Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 5 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO The frequency step size (FSTEP) is a user-defined value. Given FSTEP and D, the comparison frequency (FCOMP) can be calculated by: FCOMP = FSTEP × D (2) The R_DIV register stores the value of the 16-bit R-divider that produces the desired comparison frequency (FCOMP) for the RF PLL according to the following equation: F R = REF FCOMP (3) The N_DIV1 and N_DIV2 registers store the value of the N-divider according to the following equation: FVCO ×R FREF A desired RF output frequency of 1800 MHz is required using a reference frequency of 76.8 MHz and a desired frequency step size of 400 kHz. If the VCO divider is equal to 2, the VCO frequency is 3600 MHz from Equation 1 and the comparison frequency is equal to 800 kHz from Equation 2. From Equations 3 and 4, the R and N values become: R = 96 = 1100000b N = 4500 = 1000110010100b Where FREF is the reference frequency provided to the device. N= Example: (4) Bits[1:0] of the N_DIV2 register are the most significant bits (MSBs) of the 18-bit representation of the N number. Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary representation of the N number. These values would be programmed through the SPI interface. Figure 5 represents the bits of the R_DIV register with the value of R = 96. Figures 6 and 7 represent the bits of the N_DIV1 and N_DIV2 registers, respectively, with the value of N = 4500. Electrical and Mechanical Specifications The absolute maximum ratings of the SKY73212-11 are provided in Table 3. The recommended operating conditions are specified in Table 4 and electrical specifications are provided in Table 5. The calculated R-divider and N-divider values are programmed into the SKY73212-11 using the SPI interface. Figure 5. R_DIV Register Showing an R-Divider Value of 96 Figure 6. N_DIV1 Register Showing an N-Divider Value of 4500 (LSBs) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 6 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 7. N_DIV2 Register Showing an N-Divider Value of 4500 (MSBs) Table 3. SKY73212-11 Absolute Maximum Ratings Parameter Symbol Mixer supply voltage (VDD_MIXA, VDD_MIXB, VDD_LO pins) VDD_5V Synthesizer supply voltage (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, and VDD_DIG pins) VDD_3.3V Supply current: Mixer supply Synthesizer supply IDD_5V IDD_3.3V RF input power PIN Operating case temperature TC Junction temperature TJ Storage case temperature TSTG Minimum Typical Maximum Units 4.5 5.0 5.5 V 3.3 3.6 V 440 150 mA mA –40 –40 +20 dBm +85 °C +150 °C +125 °C Notes: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device. CAUTION: Although this device is designed to be as robust as possible, Electrostatic Discharge (ESD) can damage this device. This device must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times. Table 4. SKY73212-11 Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Units Mixer supply voltage (VDD_MIXA, VDD_MIXB, VDD_LO pins) VDD_5V 4.75 5.00 5.25 V Synthesizer supply voltage (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, and VDD_DIG pins) VDD_3.3V 3.0 3.3 3.6 V RF frequency range fRF 1700 2000 MHz IF frequency range fIF 40 300 MHz Supply current: Mixer supply Synthesizer supply IDD_5V IDD_3.3V 400 140 mA mA Operating case temperature TC –40 +85 °C SPI logic levels (CLK, DATA, LE): Low High VIL VIH 0.2 x VDD_3.3V 0.8 x VDD_3.3V V V 360 125 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 7 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Table 5. SKY73212-11 Electrical Specifications (1 of 2) (Note 1) (VDD_5V = +5 V, VDD_3.3V = +3.3 V, TC = +25 °C, RF Frequency = 1950 MHz, IF Frequency = 150 MHz, LO Frequency = 1800 MHz, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical Max Units 7.5 8.5 dB ±0.7 dB Mixer Conversion gain G TC = –40 to +85 °C Gain variation over temperature Noise Figure NF 11 fRF = 1920 to 1980 MHz, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V TC = –40 to +85 °C Noise Figure variation over temperature 3rd order input intercept point fRF = 1920 to 1980 MHz, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V IIP3 fRF = 1920 to 1980 MHz, PIN = –10 dBm, 800 kHz tone spacing, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V Third order output intercept point OIP3 fRF = 1920 to 1980 MHz, PIN = –10 dBm, 800 kHz tone spacing, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V 2RF – 2LO 2x2 PIN = –10 dBm ±1.0 dB +24.0 dBm ±1.0 dB +29.5 +33.0 dBm –65 –50 –75 –67 dBc 3RF – 3LO 3x3 PIN = –10 dBm 1 dB Input Compression Point IP1dB fRF = 1920 to 1980 MHz, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V +10 +13 dBm 1 dB Output Compression Point OP1dB fRF = 1920 to 1980 MHz, VDD_5V = 4.75 to 5.25 V, VDD_3.3V = 3.0 to 3.6 V +19.0 +20.5 dBm dBc Channel-to-channel isolation 50 dB RF-to-IF isolation 30 dB LO leakage @ RF port @ IF port Input return loss: RF port IF port ZIN_RF ZIN_IF With external matching components –12 –12 –27 –45 dBm dBm –7 –7 dB dB Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 8 dB +21.5 TC = –40 to +85 °C IIP3 variation over temperature 13 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Table 5. SKY73212-11 Electrical Specifications (2 of 2) (Note 1) (VDD_5V = +5 V, VDD_3.3V = +3.3 V, TC = +25 °C, RF Frequency = 1950 MHz, IF Frequency = 150 MHz, LO Frequency = 1800 MHz, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical Max Units 10.0 153.6 200.0 0.2 1.5 1.2 4.8 7.2 mA –70 –66 dBc 1 ms –100 –133 –150 –83 –128 –145 dBc/Hz dBc/Hz dBc/Hz 0.9 1.1 deg Synthesizer Reference input frequency fREF Reference input sensitivity Charge pump current ICP Comparison spurs Locking time 20 kHz bandwidth, 1 ppm frequency error Phase noise @ 100 kHz @ 1 MHz @ 10 MHz RMS phase error MHz Vp-p Note 1: Performance is guaranteed only under the conditions listed in this Table. Evaluation Board Description Package Dimensions The SKY73212-11 Evaluation Board is used to test the performance of the SKY73212-11 mixer. An Evaluation Board schematic diagram is provided in Figure 8. An assembly drawing for the Evaluation Board is shown in Figure 9 and the layer detail is provided in Figure 10. The PCB layout footprint for the SKY73212-11 is provided in Figure 11. Figure 12 shows the package dimensions for the 48-pin MCM and Figure 13 provides the tape and reel dimensions. Circuit Design Configurations Since the device package is sensitive to moisture absorption, it is baked and vacuum packed before shipping. Instructions on the shipping container label regarding exposure to moisture after the container seal is broken must be followed. Otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. The following design considerations are general in nature and must be followed regardless of final use or configuration: 1. Paths to ground should be made as short as possible. 2. The ground pad of the SKY73212-11 has special electrical and thermal grounding requirements. This pad is the main thermal conduit for heat dissipation. Since the circuit board acts as the heat sink, it must shunt as much heat as possible from the device. Therefore, design the connection to the ground pad to dissipate the maximum wattage produced by the circuit board. 3. Skyworks recommends including external bypass capacitors on the VDD voltage inputs of the device. Package and Handling Information THE SKY73212-11 is rated to Moisture Sensitivity Level 3 (MSL3) at 260 °C. It can be used for lead or lead-free soldering. For additional information, refer to the Skyworks Application Note, PCB Design & SMT Assembly/Rework Guidelines for MCM-L Packages, document number 101752. Care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. Production quantities of this product are shipped in a standard tape and reel format. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 9 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 8. SKY73212-11 Evaluation Board Schematic Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 10 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 9. SKY73212-11 Evaluation Board Assembly Drawing Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 11 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 10. SKY73212-11 Evaluation Board Layer Detail Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 12 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 11. SKY73212-11 PCB Layout Footprint Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 13 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 12. SKY73212-11 44-Pin MCM Package Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 14 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Figure 13. SKY73212-11 Tape and Reel Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201390E • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • June 14, 2013 15 DATA SHEET • SKY73212-11 MIXER WITH PLL AND VCO Ordering Information Model Name SKY73212-11 1700-2000 MHz Diversity Downconversion Mixer with PLL and VCO Manufacturing Part Number SKY73212-11 Evaluation Board Part Number TW18-D855-001 Copyright © 2011, 2012, 2013 Skyworks Solutions, Inc. All Rights Reserved. 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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 16 June 14, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201390E