APL3222

APL3222
3.5A-Capable, Slew-Rate-Controlled Load Switch with True Reverse
Current Blocking
Features
General Description
•
•
Input Voltage Operating Range:1.5V to 5.5V
Typical RDS(ON)
The APL3222 advanced load management switch targets applications requiring a highly integrated solution. It
– 21mΩ at VIN =5.5V
– 23mΩ at VIN =4.5V
disconnects loads powered from the DC power rail (<6V)
with stringent off-state current targets and high load ca-
– 41mΩ at VIN =1.8V
– 90mΩ at VIN =1.5V
pacitances (up to 100µF). The APL3222 consists of slewrate controlled low-impedance MOSFET switch (23mΩ
Slew Rate/Inrush Control with t = 1.8ms(Typ)
R
3.5A Maximum Continuous Current Capability
typical) and integrated analog features. The slew-rate
controlled turn-on characteristic prevents inrush current
Low Off Switch Current <1µA
True Reverse Current Blocking(TRCB)
and the resulting excessive voltage droop on power rails.
The APL3222 has a True Reverse Current Blocking
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Require-
(TRCB) function that obstructs unwanted reverse current
from VOUT to VIN during both ON and OFF states.
ments
ESD Protected
The exceptionally low off-state current drain (<1µA
maximum) facilitates compliance with standby power
– Human Body Model >8kV
– Charged Device Model >1.5kV
requirements. The input voltage range operates from
1.5V to 5.5VDC to support a wide range of applications in
– IEC 61000-4-2 Air Discharge >15kV
– IEC 61000-4-2 Contact Discharge >8kV
consumer, optical, medical, storage, portable, and
industrial device power management. Switch control is
Tiny small WLCSP1.2x0.8-6 and VTDFN1.6x1.2-4
Package
managed by a logic input (active HIGH) capable of interfacing directly with low-voltage control signal / General-
Lead Free and Green Devices Available (RoHS
Compliant)
Purpose Input / Output (GPIO) without an external pulldown resistor.
•
•
•
•
•
•
•
•
The device is packaged in advanced, fully “green”
compliant, 1.2mm x 0.8mm, Wafer-Level Chip-Scale Pack-
Pin Configuration
age (WLCSP) with backside lamination.
Top View
VOUT
(A1)
Applications
VIN
(A2)
VIN 1
GND 2
VOUT
(B1)
VIN
(B2)
GND
(C1)
ON
(C2)
•
•
•
4 VOUT
3 ON
Smart Phones
Tablets PCs
Portable Devices
VTDFN-1.6x1.2
(Top View)
WLCSP1.2x0.8-6
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
1
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APL3222
Simplified Application Circuit
VOUT
VIN
VOUT
VIN
1.5~5.5V
CIN 1µF~22µF
On
COUT
0.1µF~100µF
APL3222
GND
ON
Off
Ordering and Marking Information
APL3222
Assembly Material
Handling Code
Temperature Range
Package Code
Package Code
HA : WLCSP1.2x0.8-6 QF : VTDFN1.6x1.2-4
Operating Junction Temperature
I : - 40 to 85 C
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APL3222 HA:
2X
X - Date Code
APL3222 QF:
L2
X
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Symbol
Rating
Unit
VIN to GND Voltage
-2 ~ 7
V
VOUT
VOUT to GND Voltage
-2 ~ 7
V
VON
ON to GND Voltage
-2 ~ 7
V
ISW
Maximum Continuous Switch Current
0 ~ 3.5
VIN
TJ
Parameter
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature (10 Seconds)
A
-40 ~ 150
o
-65 ~ 150
o
260
o
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
2
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APL3222
Thermal Characteristics
Symbol
Parameter
Typical Value
Junction-to-Ambient Thermal Resistance in free air
Unit
(Note 2)
θJA
WLCSP1.2X0.8-6
TBD
VTDFN1.6x1.2-4
100
WLCSP1.2X0.8-6
TBD
VTDFN1.6x1.2-4
TBD
o
C/W
Junction-to-Case Thermal Resistance in free air (Note 2)
θJC
o
C/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions
Symbol
(Note3)
Parameter
VIN
VIN Input Voltage
ISW
Continuous Switch Current
Range
Unit
1.5 ~ 5.5
V
0 ~ 3.5
A
TA
Ambient Temperature
-40 ~ 85
o
TJ
Junction Temperature
-40 ~ 125
o
C
C
Note 3 : Refer to the typical application circuit
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN= 1.5~5.5V,TA= -40~85oC. Typical values are at TA=25oC.
Symbol
Parameter
Test Conditions
APL3222
Unit
Min
Typ
Max
1.5
-
5.5
V
Basic Operation
VIN
Input Voltage
IQ(OFF)
Off Supply Current
VON=GND, VOUT=Open
-
-
1
µA
ISD
Shutdown Current
VON=GND, VOUT=GND,TA=-40 to +85 oC
-
0.2
3.6
µA
IQ
Quiescent Current
IOUT=0mA
-
-
20
µA
RON
On Resistance
VIN=5.5V, IOUT=3A
-
22
-
VIN=5.5V, IOUT=2A
-
21.5
-
VIN=5.5V, IOUT=1A, TA=25 oC
-
21.0
28.0
VIN=4.5V, IOUT=3A
-
24.0
-
VIN=4.5V, IOUT=2A
-
23.5
-
VIN=4.5V, IOUT=1A, TA=25 oC
-
23.0
30.0
-
26.0
-
VIN=2.5V, IOUT=500mA, TA=25 C
-
30.0
-
VIN=1.8V, IOUT=250mA, TA=25 oC
-
41.0
-
-
90.0
110.0
VIN=1.5V to 5.5V
0.9
-
-
VIN=1.8V to 5.5V
-
-
0.55
VIN=1.5V to 1.8V
-
-
0.26
VIN=3.3V, IOUT=500mA, TA=25 oC
o
o
VIN=1.5V, IOUT=250mA, TA=25 C
VIH
ON Input Logic High Voltage
VIL
ON Input Logic Low Voltage
ION
ON Input Leakage
VON= VIN or GND
Pull-Down Resistance at ON Pin
VIN= VON = 1.5V to 5.5V, TA=-40 to +85 oC
RON_PD
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
3
mΩ
V
V
-
-
4.3
µA
1.29
1.3
1.61
MΩ
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APL3222
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN= 1.5~5.5V,TA= -40~85oC. Typical values are at TA=25oC.
Sym bol
Param eter
APL3 222
Test Conditions
Unit
Min
Typ
Max
True Reverse Current Bloc king
VT_R CB
RCB Pr otection Trip Poin t
VOUT - VIN
-
55
-
mV
VR_ RCB
RCB Pr otection Rele ase Trip Poi nt
VIN - VOUT
-
30
-
mV
-
85
-
mV
ISD _OU T
RCB Hysteresis
V OUT Shu tdo wn Curre nt
V ON = 0 V, V OUT = 5.5V, VIN = Short to G ND
-
-
2
µA
t RC B_ON
RCB Response Time , Device O N
V OU T - VIN=1 00mV, VON = Hi gh
-
0.7
-
µs
tR CB_OFF
RCB Response Time , Device O FF
V OU T - VIN=1 00mV, VON = Low
-
0.7
-
µs
1
1.8
2 .5
-
2.5
-
-
34
-
-
3 6.5
-
Dynam ic Charact erist ics
t ON
Turn- On Time
tD OFF
Turn- Off Delay
tF
V OU T Fall Time
tOFF
Turn- Off Time
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
o
V IN =3.3V, R L=5Ω, C L=150 µF, T A=25 C
V IN =4.5V, R L=150Ω , C L=1 00µF, T A=2 5 oC
4
ms
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APL3222
Typical Operating Characteristics
Quiescent Current
Quiescent Current
25
20
16
ON=VIN
12
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
ON=VIN
VIN=5.5V
VIN=4.5V
8
VIN=1.5V
4
20
85OC
15
10
-40
-20
0
20
60
40
-40OC
5
0
0
25OC
80
Shutdown Current
Shutdown Current
4
ON=0V
VIN SHUTDOWN CURRENT (µA)
VIN SHUTDOWN CURRENT (µA)
4
3
2
1
VIN=5.5V
0
VIN=1.5V
-1
ON=0V
2
1
0
-20
0
20
40
60
O
80
85OC
3
1.5
3.5
2.5
On Resistance
5.5
On Resistance
80
ON=VIN
VIN=1.5V,IOUT=250mA
ON RESISTANCE(mΩ)
ON RESISTANCE(mΩ)
4.5
SUPPLY VOLTAGE (V)
80
VIN=1.8V,IOUT=250mA
VIN=3.3V,IOUT=500mA
40
20
ON=VIN
IOUT=250mA@VIN=1.5~1.8V
IOUT=500mA@VIN=2.5~3.3V
IOUT=1A@VIN=4.0~5.5V
60
40
20
85OC
25OC
VIN=5.5V,IOUT=1A
0
-40
-40OC
25OC
TJ,JUNCTION TEMPERATURE( C)
60
5
4
SUPPLY VOLTAGE (V)
TJ,JUNCTION TEMPERATURE( C)
-2
-40
3
2
1
O
-20
0
20
40
60
0
80
O
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE (V)
TJ,JUNCTION TEMPERATURE( C)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
1.5
-40OC
5
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APL3222
Pin Description
PIN
Function
VTDFN1.6x1.2-4
WLCSP1.2x0.8-6
NAME
4
A1,B1
VOUT
1
A2,B2
VIN
2
C1
GND
3
C2
ON
Switch Output.
Supply Input: Input to the Power Switch.
Ground.
ON/OFF Control, Active High, GPIO Compatible.
Block Diagram / Typical Application Circuit
TRCB
VIN
1.5~5.5V
COUT
0.1µF~100µF
CIN 1µF~22µF
ON
OFF
VOUT
Control
Logic
ON
Turn-On Slew Rate
Controlled Driver
Ron
ESD Protection
GND
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
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APL3222
Application Information
Table1. Inrush Current by Input Voltage
The APL3222 is a low-RON P-channel load switch with
controlled turn-on and True Reverse Current Blocking
(TRCB). The core is a 23mΩ P-channel MOSFET and
Inrush Current(mA)
VIN(V)
Measured
controller capable of functioning over a wide input operating range of 1.5 to 5.5V. The ON pin, an active-HIGH,
GPIO/CMOS-compatible input; controls the state of the
switch. TRCB functionality blocks unwanted reverse current during both ON and OFF states when higher VOUT
than VIN is applied.
Input Capacitor
Calculated with
2.7ms tR
1.5
1.62
76
56
3.3
2.03
140
122
5.0
2.33
196
185
Output Capacitor
At least 0.1µF capacitor, COUT, should be placed between the VOUT and GND pins. This capacitor prevents
To limit the voltage drop on the input supply caused by
transient inrush current when the switch turns on into a
discharged load capacitor; a capacitor must be placed
parasitic board inductance from forcing VOUT below GND
when the switch is on.
between the VIN and GND pins. At least 1µF ceramic
capacitor, CIN, placed close to the pins is usually
True Reverse Current Blocking
The true reverse current blocking feature protects the input source against current flow from output to input re-
sufficient. Higher-value CIN can be used to reduce the
voltage drop in higher-current applications.
gardless of whether the load switch is on or off.
Inrush Current
Inrush current occurs when the device is turned on. Inrush current is dependent on output capacitance and slew
Board Layout
rate control capability, as expressed by:
IINRUSH = COUT ×
tR(ms)
VIN − VINITIAL
+ ILOAD
tR
For best performance, all traces should be as short as
possible. To be most effective, the input and output ca..........(1)
pacitors should be placed close to the device to minimize the effect that parasitic trace inductance on normal
and short-circuit operation. Using wide traces or large
copper planes for all pins (VIN, VOUT, ON, and GND)
where:
COUT: Output capacitance;
tR: Slew rate or rise time at VOUT;
minimizes the parasitic electrical effects and the caseto-ambient thermal impedance.
VIN: Input voltage;
VINITIAL: Initial voltage at COUT, usually GND; and
ILOAD: Load current.
Higher inrush current causes higher input voltage drop,
depending on the distributed input resistance and input
capacitance. High inrush current can cause problems.
APL3222 has a 2.7ms of slew rate capability under
4.5VIN at 1000µF of COUT and 5Ω of RL so inrush current can be minimized and no input voltage drop appears.
Table 1 show the values and actual waveform with
CIN=10µF, COUT=100µF, no load current.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
7
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APL3222
Package Information
E
b
WLCSP0.8x1.2-6
PIN 1
A2
D
A1
A
NX
aaa C
e
SEATING
PLANE
e
WLCSP0.8x1.2-6
S
Y
M
B
O
L
MIN.
A
MILLIMETERS
INCHES
TYP
MAX.
MIN.
TYP.
MAX.
0.40
0.50
0.60
0.016
0.0197
0.024
A1
0.15
0.20
0.25
0.006
0.0079
0.010
b
0.23
0.26
0.29
0.009
0.0102
0.011
D
1.16
1.20
1.24
0.046
0.0472
0.049
E
0.76
0.80
0.030
0.0315
0.033
e
0.40 BSC
aaa
0.08
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
0.84
0.016 BSC
0.003
8
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APL3222
Package Information
VTDFN1.2x1.6-4
A
E
D
b
Pin 1
A1
A3
e
NX
aaa
C
SEATING PLANE
Pin 1 Corner
L
S
Y
M
B
O
L
VTDFN1.2x1.6-4A
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.50
0.60
0.020
0.024
A1
0.00
0.05
0.000
0.002
A3
0.11 REF
0.004 REF
b
0.20
0.30
0.008
0.012
D
1.55
1.65
0.061
0.065
E
1.15
1.25
0.045
0.049
0.35
0.010
e
L
0.50 BSC
0.25
aaa
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
0.020 BSC
0.08
0.014
0.003
9
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APL3222
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
VTDFN1.6 x1.2
Application
WLCSP1.2 X0.8
A
H
178.0±2.00
5 0 MIN.
P0
P1
T1
8.4+2.00
-0 .0 0
C
13 .0 +0.50
-0.20
P2
D0
4.0±0.10
4.0±0.10
2 .0 ±0 .0 5
1.5+0 .1 0
-0.00
A
H
178.0±2.00
5 0 MIN.
T1
8.4+2.00
-0 .0 0
C
13 .0 +0.50
-0.20
D0
1.5+0 .1 0
-0.00
P0
P1
P2
4.0±0.10
4.0±0.10
2 .0 ±0 .0 5
d
D
W
E1
F
1.5 MIN.
20 .2 MIN.
8.0±0.20
1.75±0.10
3.50±0.05
D1
T
A0
B0
K0
1.5 MIN.
0.6+0 .0 0
-0.4
1.4±0.20
1.8±0.20
0.75±0.20
d
D
W
E1
F
1.5 MIN.
20 .2 MIN.
8.0±0.30
1.75±0.10
3 .5 ±0 .0 5
D1
T
0.6+0.00
-0.40
1.5 MIN.
A0
B0
K0
1.0 7±0.05
1 .42 ±0.0 5
0.74±0.05
( mm)
Devices Per Unit
Package Type
Unit
Quantity
VTDFN1.6x1.2
Tape & Reel
3000
WLCSP1.2X0.8
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
10
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APL3222
Taping Dircetion Information
WLCSP1.2x0.8-6
USER DIRECTION OF FEED
VTDFN1.2x1.6-4
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
11
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APL3222
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
12
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APL3222
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (t p) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
3
Package
Thickness
<2.5 mm
Volume mm
<350
235 °C
Volume mm
≥350
220 °C
≥2.5 mm
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
13
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APL3222
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Dec., 2015
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