ANPEC APL515533BI-TRG

APL5155
High Input Voltage, Low Quiescent Current, 150mA LDO Regulator
Features
General Description
•
Wide Input Voltage Range: 5.4V to 25V
•
Ultra Low Ground Current: 10µA
The APL5155 is a low ground current linear regulator,
which operates with input voltage from 5.4V to 25V and
•
High Output Accuracy: ±2.5%
•
Excellent Load/Line Transient
•
Low Dropout Voltage: 750mV @ 150mA
•
Fixed Output Voltages for 5V/3.3V or Adjustable
delivers output current up to 150mA. Typical dropout voltage is only 750mV at 150mA loading. This combination
of the high voltage and the low ground current makes the
APL5155 ideal for USB and portable devices, using 2cell or 3-cell Li-Ion battery inputs.
The APL5155 is stable with aluminum, tantalum, and
Voltage
•
Built-In Current-Limit Protection
•
Built-In Over-Temperature Protection
•
Zero Shutdown Current
•
Internal Soft-Start Function
•
POR Scheme to Prevent VOUT Spike
•
SOT-23-5, SOT-89, and SOP-8P Packages
•
Lead Free and Green Devices Available
ceramic capacitors. It requires a 1µF or greater capacitor
for stability.
The APL5155 has many protection functions, including
over-temperature, current-limit and short circuit current
limit protections, which prevent the device from thermal
over-load and current over-load.
The APL5155 regulator is available in miniature SOT-235, SOT-89, and SOP-8P packages.
(RoHS Compliant)
Pin Configuration
Applications
•
USB Power Supply
•
Keep-Alive Supply in Notebook and Portable
VIN 1
GND 2
EN 3
5 VOUT
4 NC/ADJ
Computers
•
Logic Supply for High-Voltage Batteries
•
Battery Powered Systems
SOT-23-5
(Top View)
GND 1
VIN 2
TAB : VIN
VOUT 3
SOT-89
(Top View)
VOUT
NC
NC
NC/ADJ
1
2
3
4
8
7
6
5
VIN
GND
NC
EN
SOP-8P
(Top View)
= Thermal Pad
(connected to GND plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
1
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APL5155
Ordering and Marking Information
Package Code
B : SOT-23-5 D : SOT-89 KA : SOP-8P
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Voltage Code
33 : 3.3V 50 : 5.0V Blank : Adjustable Version
Assembly Material
G : Halogen and Lead Free Device
APL5155
Assembly Material
Handling Code
Temperature Range
Package Code
Voltage Code
APL5155 B :
L55X
X - Date Code
APL5155 33B :
55RX
X - Date Code ; R - 3.3V
APL5155 50B :
55ZX
X - Date Code ; Z - 5.0V
APL5155 D :
APL5155
XXXXX
XXXXX - Date Code
APL5155 KA :
APL5155
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN, VEN
VOUT, VADJ
TJ
TSTG
TSDR
(Note 1)
Parameter
Rating
Unit
VIN, EN to GND Voltage
- 0.3 to 27
V
VOUT, ADJ to GND Voltage
- 0.3 to 27
Maximum Junction Temperature
Storage Temperature
Maximum Lead Soldering Temperature, 10 Seconds
V
150
o
-65 to 150
o
260
o
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Thermal Resistance-Junction to Ambient (Note 2)
θJA
SOT-23-5
SOT-89
SOP-8P
235
180
50
SOT-23-5
SOT-89
SOP-8P
130
38
20
o
C/W
Thermal Resistance-Junction to Ambient (Note 2)
θJC
o
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
2
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APL5155
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Range
Unit
VIN
VIN to GND Voltage
5.4 to 25
V
IOUT
VOUT Source Current
0 to 150
mA
VOUT
Adjustable Output Voltage
1.24 to 20
V
V
VEN
EN Pin Input Voltage
0 to 25
COUT
Output Capacitance
1 to 4.7
µF
ESR
The ESR of Output Capacitance
5 to 50
mΩ
TA
TJ
Ambient Temperature
Junction Temperature
-40 to 85
o
-40 to 125
o
C
C
Note 3: Refer to the typical application circuit.
Electrical Characteristics
Unless otherwise noted, these specifications apply over VIN=VOUT+3V, CIN=1µF, COUT=2.2µF, TA=-40 to 85oC.
Symbol
Parameter
Test Conditions
APL5155
Min.
Typ.
Max.
Unit
POWER-ON-RESET (POR) AND SUPPLY CURRENT
VIN
Input Voltage
5.4
-
25
V
Rising VIN POR Threshold
4.5
5
5.25
V
-
200
-
mV
IOUT=0mA, EN=high, Adj mode
-
10
20
IOUT=0mA, EN=high, Fix Mode
-
15
25
EN=Low, VIN=19V
-
1
3
µA
-
1.24
-
V
-2.5
-
2.5
%
ppm
VIN POR Hysteresis
IQ
IQSHDN
Quiescent Current
Shutdown Supply Current
µA
REFERENCE AND OUTPUT VOLTAGE
VREF
Reference Voltage
VREF Voltage Accuracy
VREF Temperature Coefficient
VOUT
Output Voltage
Output Voltage Accuracy
IOUT
Adjustable Voltage Version
o
IOUT=10mA, TA=25 C
o
TJ=-40 to 125 C
-
50
-
Fixed Voltage Version
-
3.3
-
Fixed Voltage Version
-
5.0
-
IOUT=10mA, TA=25oC
-2.5
-
2.5
%
0
-
150
mA
-
0.1
0.5
%
%
Load Current Range
V
REGLINE Line Regulation
VOUT+3V<VIN<25V, IOUT=1mA, VOUT=5V
REGLOAD Load Regulation
0.1mA<IOUT<150mA, VOUT=5V
-
0.6
1.4
IOUT=30mA, VOUT=20V
-
160
240
IOUT=100mA, VOUT=20V
-
500
750
IOUT=150mA, VOUT=20V
-
750
1125
IOUT=10mA, VOUT=5V
-
150
225
TJ rising
-
150
-
°C
-
30
-
°C
VDROP
Dropout Voltage
mV
PROTECTIONS
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
3
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APL5155
Electrical Characteristics (Cont.)
Unless otherwise noted, these specifications apply over VIN=VOUT+3V, CIN=1µF, COUT=2.2µF, TA=-40 to 85oC.
Symbol
Parameter
Test Conditions
APL5155
Min.
Unit
Typ.
Max.
200
-
400
mA
-
50
-
mA
PROTECTIONS (CONT.)
ILIMIT
Current-Limit
VIN=VOUT +3V, to 25V
ISHORT
Short-Circuit Current
VOUT=0V, only for Fix mode
SOFT-START AND SHUTDOWN
TSS
IEN
Soft-Start Interval
From VEN rising to VOUT=90%
EN Input Logic HIGH
IC is enabled
EN Input Logic LOW
IC is shut down
EN Input Logic Hysteresis
VOUT+3V<VIN<25V
-
0.2
-
V
EN Pin Input Bias Current
VEN=25V
-
0.1
1
µA
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
4
-
1
-
ms
2.5
-
-
V
0
-
0.6
V
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APL5155
Typical Operating Characteristics
Quiescent Current vs. Input Voltage
Quiescent Current vs. Output Current
300
12
VIN =12V
11
Quiescent Current (µA)
Quiescent Current (µA)
No Load
10
9
8
7
250
200
150
100
50
6
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26
Input Votlage (V)
0
125
150
1.0
14
VIN =8V, No Load
VOUT=20V
0.9
12
0.8
Dropout Voltage (V)
Quiescent Current (µA)
50
75
100
Output Current (mA)
Dropout Voltage vs. Output Current
Quiescent Current vs. Junction Temperature
10
8
6
4
0.7
0.6
0.5
0.4
0.3
0.2
2
0
0.1
-40 -20
0
20
40
60
80
0
100 120
0
25
50
75
100
Junction Temperature ( oC)
Output Current (mA)
Reference Voltage vs. Junction Temperature
PSRR vs. Frequency
1.260
1.255
125
150
0
VIN =8V
-10
VIN=12V, VIN=3.3V,
CIN=1µF, COUT=2.2µF
-20
1.250
-30
1.245
PSRR (dB)
Reference Voltage (V)
25
1.240
1.235
-40
-50
-60
-70
1.230
-80
1.225
1.220
-40 -20
-90
0
20
40
60
80
-100
0.1
100 120
o
Junction Temperature ( C)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
5
1
10
100
Frequency (kHz)
1000
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APL5155
Operating Waveforms
The test condition is TA=25oC unless otherwise specified.
Turn On Response
Turn Off Response
VE N
VE N
1
1
VOUT
V OUT
2
2
VIN=12V, VOUT=3.3V, ROUT=33Ω,
CIN=1µF/X7R, COUT=2.2µF/X7R
CH1: VEN, 5V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME: 0.2ms/Div
VIN=12V, VOUT=3.3V, ROUT=33Ω,
CIN=1µF/X7R, COUT=2.2µF/X7R
CH1: VEN, 5V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME: 0.5ms/Div
Power On
Power Off
VIN
VIN
VOUT
VOUT
1,2
1,2
VIN=12V, VOUT=3.3V, ROUT=33Ω,
CIN=1µF/X7R, COUT=2.2µF/X7R
VIN=12V, VOUT=3.3V, ROUT=33Ω,
CIN=1µF/X7R, COUT=2.2µF/X7R
CH1: VIN, 2V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:5ms/Div
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
CH1: VIN, 2V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:5ms/Div
6
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APL5155
Operating Waveforms (Cont.)
The test condition is TA=25oC unless otherwise specified.
Load Transient Response
Line Transient Response
VOUT
1
VIN
1
V OUT
2
IOUT
2
VIN=12V, VOUT=3.3V, CIN=1µF/X7R,
COUT=2.2µF/X7R, IOUT=3-150-3mA,
Falling/Rising Slew Rate=1A/µs
CH1: VOUT, 100mV/Div, offset=3.3V
CH2: IOUT, 100mA/Div, DC
TIME: 50µs/Div
VIN=11.5-12.5-11.5V, Falling/Rising=1µs,
VOUT=3.3V, IOUT=10mA, CIN=1µF/X7R,
COUT=2.2µF/X7R
CH1: VIN, 1V/Div, Offset=11.5V
CH2: VOUT, 50mV/Div, Offset=3.3V
TIME: 50µs/Div
Pin Description
PIN
FUNCTION
NO.
NAME
SOT-23-5
SOT-89
SOP-8P
1
2
8
VIN
Voltage Supply Input Pin.
2
1
7
GND
Ground.
3
-
5
EN
4
-
4
NC/ADJ
5
3
1
VOUT
-
-
2, 3, 6
NC
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
Enable Input Pin. Logic low=shutdown; logic high=enable.
NC: No Connection (fixed output voltage version).
ADJ: Output Voltage Feedback Pin (adjust output voltage version).
Regulator Output Pin.
No Connection.
7
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APL5155
Block Diagram
1. Adjust Output Voltage (SOT-23-5/SOP-8P)
VIN
CurrentLimit
POR
EN
Control
Logic
VREF
1.24V
SoftStart
VOUT
OTP
Short-Circuit
Current-Limit
ADJ
GND
2. Fixed Output Voltage (SOT-23-5/SOP-8P)
VIN
CurrentLimit
POR
EN
Control
Logic
VREF
1.24V
SoftStart
VOUT
OTP
Short-Circuit
Current-Limit
GND
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
8
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APL5155
Block Diagram (Cont.)
3. Fixed Output Voltage (SOT-89)
VIN
CurrentLimit
POR
Control
Logic
VREF
1.24V
SoftStart
VOUT
OTP
Short-Circuit
Current-Limit
GND
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
9
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APL5155
Typical Application Circuit
1. Adjust Output Voltage (SOT-23-5/SOP-8P)
VIN
CIN
1µF
VOUT
VIN APL5155 VOUT
B
APL5155
EN KA
ADJ
R1
GND
R2
ON
COUT
2.2µF
OFF
VOUT=1.24V x (R1+R2)/R2
2. Fixed Output Voltage (SOT-23-5/SOP-8P)
VIN
VOUT
VIN
VOUT
CIN
1µF
ON
COUT
EN
2.2µF
GND
OFF
3. Fixed Output Voltage (SOT-89)
VIN
CIN
1µF
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
VOUT
VIN APL5155 VOUT
B
APL5155
KAGND
10
COUT
2.2µF
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APL5155
Application Information
Enable/Shutdown
PD(MAX ) =
The APL5155 features an active-high enable pin that allows the regulator to be disabled. Forcing the enable pin
TJ − TA
θJA
where TJ-TA is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
between junction and ambient air.
low disables the regulator, so current consumed by the
regulator goes nearly to zero. Forcing the enable pin high
enables the output voltage. The enable pin can not float.
For continual operation, do not exceed the absolute maximum junction temperature rating of TJ=125oC.
Input Capacitor
For example:
In SOT-23-5 package θJA=235oC/W. When operates the
The APL5155 has high input voltage up to 25V. The input
capacitor must be rated to sustain voltages that may be
APL5155 at TA=50 oC, the maximum power dissipation
can be determined as below:
used on the input. An input capacitor may be required
when the device is not near the source power supply or
PD(MAX)=(125oC-50oC)/(235oC/W)
PD(MAX)=319.1mW
when supplied by a battery. Small and surface-mounted
ceramic capacitors can be used for bypassing. A larger
value may be required if the source supply has high ripple.
Thermal Pad Consideration
Output Capacitor
The SOP-8P is a cost-effective package which features a
small size, like a standard SOP-8, and a bottom thermal
The APL5155 requires an output capacitor for stability.
The design requires 1µF or greater on the output to main-
pad to minimize the thermal resistance of the package is
applicable to high current applications. The thermal pad
tain stability. It is optimized by using low-ESR ceramic
chip capacitors. The maximum allowable ESR is 3Ω. More
must be soldered down to the copper plane on circuit
board. Heat can be conducted away from the thermal
capacitance improves transient response. Place the out-
pad through the copper plane to ambient. If the copper
plane is not on the top surface of the circuit board, 4 or 6
put capacitor as close to the VOUT pin as possible.
X7R/X5R dielectric-type ceramic capacitors are recom-
vias should be used to thermally couple the thermal pad
to the bottom plane.
mended because of their temperature performance. X7R
type capacitors change capacitance by 15% over their
For good thermal conduction, the vias must be plated
through and solder filled. The copper plane used to con-
operating temperature ranges. To use a ceramic chip
capacitor with Y5V dielectric, the value must be much
duct heat away from the thermal pad should be as large
as practical.
higher than an X7R ceramic capacitor to ensure the same
minimum capacitance over the equivalent operating temperature range.
0.072
0.118
No-Load Stability
0.024
The APL5155 will remain stable and in regulation with no
load unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications.
0.150
Thermal Consideration
The thermal resistance of junction to ambient controls
the APL5155's maximum power dissipation. The power
0.212
dissipation across the device is PD=IOUT (VIN-VOUT), and the
maximum power dissipation is:
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
ground
plane for
thermal
pad
SOP-8P Layout Recommendation
11
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APL5155
Application Information (Cont.)
Adjustable Regulator Application
SOP-8P
The output voltage of APL5155 can be adjusted from 3V
0.024
7




6
5
0.138
where VREF=1.24V
The resistors should be placed as close the device as
possible to avoid noise.
0.118
0.212
 R
VOUT = VREF 1 +  1

  R2
8
0.072
to 20V by using two external resistors. The resistors set
the output voltage based on the following equation:
Recommended Minimum Footprint
1
SOT-23-5
2
0.050
4
Unit : Inch
0.05
0.1
0.076
3
0.038
0.02
Unit : Inch
SOT-89
0.067
0.104
0.140
0.076
0.059
0.022
Unit : Inch
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
12
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APL5155
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
A
MAX.
0.057
1.45
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
0.118
0.071
E
2.60
3.00
0.102
E1
1.40
1.80
0.055
e
0.95 BSC
e1
1.90 BSC
0.037 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
13
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APL5155
Package Information
SOT-89
A
C
L
H
E
E1
D
D1
e
e1
B
B1
S
Y
M
B
O
L
A
SOT-89
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
1.40
1.60
0.055
0.063
0.022
B
0.44
0.56
0.017
B1
0.36
0.48
0.014
0.019
0.017
C
0.35
0.44
0.014
D
4.40
4.60
0.173
0.181
D1
1.62
1.83
0.064
0.072
E
2.29
2.60
0.090
0.102
E1
2.13
2.29
0.084
0.090
e
1.50 BSC
e1
3.00 BSC
0.059 BSC
0.118 BSC
H
3.94
4.25
0.155
0.167
L
0.89
1.20
0.035
0.047
Note : Follow JEDEC TO-243 AA.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
14
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APL5155
Package Information
SOP-8P
-T- SEATING PLANE < 4 mils
D
SEE VIEW A
h X 45o
E
THERMAL
PAD
E1
E2
D1
c
A1
0.25
A2
A
b
e
GAUGE PLANE
SEATING PLANE
θ
L
VIEW A
S
Y
M
B
O
L
A
SOP-8P
INCHES
MILLIMETERS
MAX.
MIN.
MIN.
MAX.
1.60
A1
0.00
0.063
0.15
0.000
0.006
0.049
A2
1.25
b
0.31
0.51
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
D1
2.50
3.50
0.098
0.138
E
5.80
6.20
0.228
0.244
0.157
0.118
E1
3.80
4.00
0.150
E2
2.00
3.00
0.079
e
1.27 BSC
0.050 BSC
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
0o C
8o C
θ
0oC
8o C
Note : 1. Followed from JEDEC MS-012 BA.
2. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side .
3. Dimension "E" does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
15
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APL5155
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-5
Application
SOT-89
Application
SOP-8P
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.50±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
4.80±0.20
4.50±0.20
1.80±0.20
A
H
T1
C
d
D
W
E1
F
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
4.0±0.10
8.0±0.10
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
16
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APL5155
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-5
Tape & Reel
3000
SOT-89
Tape & Reel
1000
SOP-8P
Tape & Reel
2500
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
SOT-89
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
17
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APL5155
Taping Direction Information
SOP-8P
USER DIRECTION OF FEED
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
18
www.anpec.com.tw
APL5155
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
19
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APL5155
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Sep., 2012
20
www.anpec.com.tw