IDT74FCT163827A/B/C 3.3V CMOS 20-BIT BUFFERS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP • Extended commercial range of -40°C to +85°C • VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range • CMOS power levels (0.4µW typ. static) • Rail-to-Rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components The FCT163827A/B/C 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT163827A/B/C have series current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. The inputs of the FCT163827A/B/C can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. FUNCTIONAL BLOCK DIAGRAM 1OE1 2OE 1 1OE2 2OE2 1A1 1Y1 TO 9 OTHER CHANNELS 2A1 2Y1 TO 9 OTHER CHANNELS 3083 drw 01 3083 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE 1996 Integrated Device Technology, Inc. AUGUST 1996 8.9 DSC-3083/3 1 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS PIN DESCRIPTION Pin Names xOEx 1OE1 1 56 1OE2 1Y1 2 55 1A1 1Y2 3 54 1A2 GND 4 53 GND 1Y3 5 52 1A3 1Y4 6 51 1A4 VCC 7 50 VCC 1Y5 8 49 1A5 1Y6 9 48 1A6 1Y7 10 47 1A7 GND 11 46 GND 1Y8 12 45 1A8 1Y9 13 44 1A9 1Y10 2Y1 2Y2 16 41 2A2 2Y3 17 40 2A3 GND 18 39 GND 2Y4 19 38 2A4 2Y5 20 37 2A5 2Y6 21 36 2A6 VCC 22 35 VCC 2Y7 23 34 2A7 24 33 2A8 GND 25 32 GND 2Y9 26 31 2A9 2Y10 27 30 2A10 2OE1 28 29 2OE2 Data Inputs xYx 3-State Outputs ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) TSTG Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature I OUT DC Output Current VTERM(3) VTERM(4) Max. –0.5 to +4.6 Unit V –0.5 to +7.0 V –0.5 to VCC + 0.5 –65 to +150 V °C –60 to +60 mA 3083 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. 2A1 2Y8 xAx 3083 tbl 01 1A10 14 SO56-1 43 SO56-2 15 SO56-3 42 Description Output Enable Inputs (Active LOW) FUNCTION TABLE(1) xOE1 Inputs xOE2 L L L L L L H H H X X Z X H X Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance xAx Outputs xYx 3083 tbl 02 SSOP/ TSSOP/TVSOP TOP VIEW 3083 drw 03 CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V Typ. 3.5 VOUT = 0V 3.5 Max. Unit 6.0 pF 8.0 NOTE: 1. This parameter is measured at characterization but not tested. pF 3083 lnk 04 8.9 2 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V Symbol VIH Test Conditions(1) Guaranteed Logic HIGH Level Min. 2.0 Guaranteed Logic LOW Level VI = 5.5V Input HIGH Current (I/O pins) Input LOW Current (Input pins) Parameter Input HIGH Level (Input pins) Typ.(2) — Max. 5.5 2.0 — VCC+0.5 –0.5 — 0.8 V — — ±1 µA VI = VCC — — ±1 VI = GND — — ±1 Input HIGH Level (I/O pins) VIL Input LOW Level Unit V (Input and I/O pins) II H II L Input HIGH Current (Input pins) VCC = Max. Input LOW Current (I/O pins) VI = GND — — ±1 — — ±1 VO = GND — — ±1 — –0.7 –1.2 V –36 –60 –110 mA 90 200 mA V High Impedance Output Current I OZL (3-State Output pins) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA I ODH Output HIGH Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) I ODL Output LOW Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) 50 VOH Output HIGH Voltage VOL Output LOW Voltage I OS Short Circuit Current(4) VH Input Hysteresis I CCL I CCH I CCZ Quiescent Power Supply Current VCC = Max. VO = V CC I OZH µA VCC = Min. I OH = –0.1mA VCC– 0.2 — — VIN = VIH or V IL I OH = –3mA 2.4 3.0 — VCC = 3.0V VIN = VIH or V IL VCC = Min. I OH = –8mA 2.4 (5) 3.0 — I OL = 0.1mA — — 0.2 VIN = VIH or V IL I OL = 16mA — 0.2 0.4 I OL = 24mA — 0.3 0.55 VCC = 3.0V I OL = 24mA VIN = VIH or V IL VCC = Max., VO = GND(3) — 0.3 0.50 –60 –135 –240 mA — 150 — mV — 0.1 10 µA — VCC = Max., VIN = GND or VCC NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC –0.6V at rated current. 8.9 V 3083 lnk 05 3 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ∆ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) IC Total Power Supply Current (6) VCC = Max. Test Conditions(1) VIN = VCC –0.6V(3) Min. — Typ.(2) 2.0 Max. 30 Unit µA VCC = Max. Outputs Open xOE1 = xOE2 = GND One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND — 50 75 µA/ MHz VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE1 = xOE2 = GND One Bit Toggling VIN = VCC VIN = GND — 0.5 0.7 mA VIN = VCC –0.6V VIN = GND — 0.5 0.8 VIN = VCC VIN = GND — 2.5 3.7 (5) VIN = VCC –0.6V VIN = GND — 2.5 4.1 (5) VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE1 = xOE2 = GND Twenty Bits Toggling NOTES: 1. 2. 3. 4. 5. 6. 3083 tbl 06 For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25°C ambient. Per TTL driven input; all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 8.9 4 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(4) FCT163827A Symbol Parameter tPLH Propagation Delay xAx to xYx tPHL tPZH tPZL tPHZ tPLZ Output Enable Time xOEx to xYx Output Disable Time xOEx to xYx tSK(o) Output Skew (3) Conditions(1) CL = 50pF RL = 500Ω CL = 300pF(4) RL = 500Ω CL = 50pF RL = 500Ω CL = 300pF(4) RL = 500Ω CL = 5pF(4) RL = 500Ω CL = 50pF RL = 500Ω FCT163827B FCT163827C Min.(2) Max. Min.(2) Max. Min.(2) Max. 1.5 8.0 1.5 5.0 1.5 4.4 1.5 15.0 1.5 13.0 1.5 10.0 1.5 12.0 1.5 8.0 1.5 7.0 1.5 23.0 1.5 15.0 1.5 14.0 1.5 9.0 1.5 6.0 1.5 5.7 1.5 10.0 1.5 7.0 1.5 6.0 — 0.5 — 0.5 — 0.5 Unit ns ns ns ns 3083 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 8.9 5 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests 6V ← V CC 500Ω V V IN Pulse Generator Open GND OUT D.U.T. 50pF R T C Switch 6V GND Open 3083 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500Ω L 3083 drw 05 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tH tSU tREM tSU PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH 3083 drw 07 3083 drw 06 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V 1.5V CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH 6V LOW tPZH 3V 1.5V 0V OUTPUT NORMALLY HIGH 3083 drw 08 SWITCH GND 0V tPLZ 3V 3V 1.5V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V 3083 drw 09 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 8.9 6 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT FCT XX XXXX Temp. Range Device Type X Package PV PA PF Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 163827A 163827B 163827C Non-Inverting 20-Bit Buffers 74 –40°C to +85°C 3083 drw 10 8.9 7