3.3V CMOS 16-BIT REGISTERED TRANSCEIVER IDT74FCT163952A/B/C Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP • Extended commercial range of -40°C to +85°C • VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range • CMOS power levels (0.4µW typ. static) • Rail-to-Rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components The FCT163952A/B/C 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be LOW to enter data from the A port. xCLKAB controls the clocking function. When xCLKAB toggles from LOW-to-HIGH, the data present on the A port will be clocked into the register. xOEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. The FCT163952A/B/C have series current limiting resistors. These offer low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. FUNCTIONAL BLOCK DIAGRAM 1CEBA 2CEBA 1CLKBA 2CLKBA 1OEAB 2OEAB 1CEAB 2CEAB 1CLKAB 2CLKAB 1OEBA 2OEBA C CE D 1A1 1B1 C CE D TO 7 OTHER CHANNELS 2A1 C CE D 2B1 C CE D 3096 drw 01 TO 7 OTHER CHANNELS 3096 drw 02 The IDT Logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE 1996 Integrated Device Technology, Inc. AUGUST 1996 8.10 DSC-3096/4 1 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS PIN DESCRIPTION Pin Names xOEAB 1OEAB 1 56 1OEBA 1CLKAB 2 55 1CLKBA 1CEAB 3 54 1CEBA GND 4 53 GND 1A1 5 52 1 B1 1A2 6 51 1 B2 VCC 7 50 VCC 1A3 8 49 1 B3 1A4 9 48 1 B4 1A5 10 47 1 B5 GND 11 46 GND 1A6 12 45 1 B6 1A7 13 44 1 B7 1A8 14 1 B8 2A1 15 SO56-1 43 SO56-2 SO56-3 42 2A2 16 41 2 B2 17 40 2 B3 GND 18 39 GND 2A4 19 38 2 B4 2A5 20 37 2 B5 2A6 21 36 2 B6 VCC 22 35 VCC 2A7 23 34 2 B7 2A8 24 33 2 B8 GND 25 32 GND 2CEAB 26 31 2CEBA 2CLKAB 27 30 2CLKBA 2OEAB 28 29 2OEBA B-to-A Output Enable Input (Active LOW) xCEAB A-to-B Clock Enable Input (Active LOW) xCEBA B-to-A Clock Enable Input (Active LOW) xCLKAB A-to-B Clock Input xCLKBA B-to-A Clock Input xAx A-to-B Data Inputs or B-to-A 3-State Outputs xBx B-to-A Data Inputs or A-to-B 3-State Outputs ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) TSTG Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature I OUT DC Output Current VTERM(3) VTERM(4) Max. –0.5 to +4.6 Unit V –0.5 to +7.0 V –0.5 to VCC + 0.5 –65 to +150 V °C –60 to +60 mA 3096 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. FUNCTION TABLE(1,3) Inputs 3096 drw 03 CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance A-to-B Output Enable Input (Active LOW) 3096 tbl 01 2 B1 2A3 SSOP/ TSSOP/TVSOP TOP VIEW xOEBA Description Conditions VIN = 0V Typ. 3.5 VOUT = 0V 3.5 Max. Unit 6.0 pF 8.0 NOTE: 1. This parameter is measured at characterization but not tested. pF 3096 lnk 04 Outputs xCEAB xCLKAB xOEAB xAx xBx H X L X B(2) X L L X B(2) L ↑ L L L L ↑ L H H X X H X Z NOTES: 3096 tbl 02 1. A-to-B data flow is shown: B-to-A data flow is similar but uses, xCEBA, xCLKBA, and xOEBA. 2. Level of B before the indicated steady-state input conditions were established. 3. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care ↑ = LOW-to-HIGH Transition Z = High-impedance 8.10 2 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V Symbol VIH Test Conditions(1) Guaranteed Logic HIGH Level Min. 2.0 Guaranteed Logic LOW Level VI = 5.5V Input HIGH Current (I/O pins) Input LOW Current (Input pins) Parameter Input HIGH Level (Input pins) Typ.(2) — Max. 5.5 2.0 — VCC+0.5 –0.5 — 0.8 V — — ±1 µA VI = VCC — — ±1 VI = GND — — ±1 Input HIGH Level (I/O pins) VIL Input LOW Level Unit V (Input and I/O pins) II H II L Input HIGH Current (Input pins) VCC = Max. Input LOW Current (I/O pins) VI = GND — — ±1 — — ±1 VO = GND — — ±1 — –0.7 –1.2 V –36 –60 –110 mA 90 200 mA V High Impedance Output Current I OZL (3-State Output pins) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA I ODH Output HIGH Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) I ODL Output LOW Current VCC = 3.3V, V IN = VIH or VIL, VO = 1.5V(3) 50 VOH Output HIGH Voltage VOL Output LOW Voltage I OS Short Circuit Current(4) VH Input Hysteresis I CCL I CCH I CCZ Quiescent Power Supply Current VCC = Max. VO = V CC I OZH µA VCC = Min. I OH = –0.1mA VCC– 0.2 — — VIN = VIH or V IL I OH = –3mA 2.4 3.0 — VCC = 3.0V VIN = VIH or V IL VCC = Min. I OH = –8mA 2.4 (5) 3.0 — I OL = 0.1mA — — 0.2 VIN = VIH or V IL I OL = 16mA — 0.2 0.4 I OL = 24mA — 0.3 0.55 VCC = 3.0V I OL = 24mA VIN = VIH or V IL VCC = Max., VO = GND(3) — 0.3 0.50 –60 –135 –240 mA — 150 — mV — 0.1 10 µA — VCC = Max., VIN = GND or VCC NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC –0.6V at rated current. 8.10 V 3096 lnk 05 3 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ∆ICC Quiescent Power Supply VCC = Max. VIN = VCC –0.6V — 2.0 100 µA ICCD Dynamic Power Supply Current(4) VCC = Max., Outputs Open xOEAB or xOEBA = GND One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND — 60 100 µA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC One Bit Toggling fi = 5MHz 50% Duty Cycle VIN = VCC VIN = GND — 0.6 1.0 mA VIN = VCC –0.6V VIN = GND — 0.6 1.1 VCC = Max., Outputs Open fCP= 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC Sixteen Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND — 3.0 5.0(5) VIN = VCC –0.6V VIN = GND — 3.0 5.9(5) (3) NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 8.10 3096 tbl 07 4 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(5) FCT163952A Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU Parameter Condition(1) Propagation Delay CL = 50pF xCLKAB, xCLKBA to xBx, xAx RL = 500Ω Output Enable Time xOEBA, xOEAB to xAx, xBx Output Disable Time xOEBA, xOEAB to xAx, xBx Set-up Time HIGH or LOW xAx, xBx to xCLKAB, xCLKBA tH Hold Time HIGH or LOW xAx, xBx to xCLKAB, xCLKBA tSU Set-up Time HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA tH Hold Time HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA tW Pulse Width HIGH or LOW xCLKAB or xCLKBA(4) tSK(o) Output Skew (3) Min.(2) FCT163952B FCT163952C Max. Min.(2) Max. Min.(2) Max. Unit 2.0 10.0 2.0 7.5 2.0 6.3 ns 1.5 10.5 1.5 8.0 1.5 7.0 ns 1.5 10.0 1.5 7.5 1.5 6.5 ns 2.5 — 2.5 — 2.5 — ns 2.0 — 1.5 — 1.5 — ns 3.0 — 3.0 — 3.0 — ns 2.0 — 2.0 — 2.0 — ns 3.0 — 3.0 — 3.0 — ns — 0.5 — 0.5 — 0.5 ns NOTES: 3096 tbl 08 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This parameter is guaranteed but not tested. 5. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 8.10 5 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests 6V ← V CC Open GND 500Ω V V IN Pulse Generator OUT D.U.T. 50pF R T C 500Ω L 3096 drw 05 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tH tSU tREM tSU Switch 6V GND Open 3096 lnk 09 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3096 drw 07 3V 1.5V 0V tH 3096 drw 06 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V DISABLE 3V 1.5V CONTROL INPUT OUTPUT NORMALLY SWITCH 6V LOW tPZH 3V 1.5V 0V OUTPUT NORMALLY HIGH 3096 drw 08 SWITCH GND 0V tPLZ tPZL VOH 1.5V VOL 3V 3V 1.5V 0.3V VOL tPHZ 0.3V VOH 1.5V 0V 0V 3096 drw 09 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 8.10 6 IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX FCT X Temp. Range Drive XXXX Device Type X Package PV PA PF Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 952A 952B 952C Non-Inverting 16-Bit Registered Transceiver 163 16-Bit 3.3Volt 74 -40°C to +85°C 3096 drw 10 8.10 7