WM8775-EV1B Evaluation Board User Handbook Rev 1.2 WM8775-EV1M TABLE OF CONTENTS INTRODUCTION ............................................................................................. 3 GETTING STARTED ....................................................................................... 3 EVALUATION KIT CHECKLIST ............................................................................. 3 CUSTOMER REQUIREMENTS.............................................................................. 3 EVALUATION BOARD OPERATION.............................................................. 4 POWER SUPPLIES ............................................................................................... 4 BOARD FUNCTIONALITY ..................................................................................... 4 DIGITAL INPUT...................................................................................................... 5 ANALOGUE INPUT ................................................................................................ 5 DIGITAL INPUT...................................................................................................... 5 INTERFACES......................................................................................................... 6 HEADERS .............................................................................................................. 6 JUMPERS .............................................................................................................. 7 SWITCHES ............................................................................................................ 7 LINKS ..................................................................................................................... 7 SOFTWARE CONTROL.................................................................................. 8 3-WIRE MODE ....................................................................................................... 8 2-WIRE MODE ....................................................................................................... 8 REGISTER MAP .................................................................................................... 9 SERIAL INTERFACE SOFTWARE DESCRIPTION...................................... 10 SOFTWARE DOWNLOAD ................................................................................... 10 SOFTWARE INSTALLATION............................................................................... 10 SOFTWARE OPERATION ................................................................................... 11 EVALUATION BOARD CONFIGURATION .......................................................... 13 SCHEMATIC LAYOUT .................................................................................. 15 WM8775-EV1B PCB LAYOUT...................................................................... 22 WM8775-EV1B BILL OF MATERIAL............................................................ 26 APPENDIX .................................................................................................... 28 EXTERNAL DSP CONNECTION TO THE WM8775-EV1B .................................. 28 EVALUATION SUPPORT ............................................................................. 31 IMPORTANT NOTICE ................................................................................... 32 ADDRESS: ........................................................................................................... 32 w Rev 1.2, February 2004 2 WM8775-EV1M INTRODUCTION The WM8775 is a high performance ADC with 4 channel input multiplexer for surround sound AV processing applications for home hi-fi and automotive audio. This evaluation platform and documentation should be used in conjunction with the latest version of the WM8775 datasheet. The datasheet gives device functionality information as well as timing and data format requirements. This evaluation platform has been designed to allow the user ease of use and give optimum performance in device measurement as well as providing the user with the ability to listen to the excellent audio quality offered by the WM8775. GETTING STARTED EVALUATION KIT CHECKLIST The following items are available from Wolfson: • WM8775-EV1B Evaluation Board (order from Wolfson) • WM8775-EV1S .exe file for control software (download from http://www.wolfsonmicro.com/) • WM8775-EV1M User Handbook (download from http://www.wolfsonmicro.com/) CUSTOMER REQUIREMENTS Minimum customer requirements are: • D.C. Power supply of +5V • D.C. Power supply of +2.7V to +5.5V • PC and printer cable (for software control) Minimum PC spec requirements are: • Win95/98/NT/2000/XP • 486 Processor ADC Signal Path Requires: w • Analogue coaxial signal source • Digital coaxial or optical data receiving unit Rev 1.2, February 2004 3 WM8775-EV1M EVALUATION BOARD OPERATION POWER SUPPLIES Using appropriate power leads with 4mm connectors, power supplies should be connected as described in Table 1. REF-DES J1 SOCKET NAME +5V SUPPLY +5V J2 DGND 0V J3 DVDD +2.7V to +3.6V J4 AVDD +2.7V to +5.5V J5 AGND 0V Table 1 Power Supply Connections The DGND and AGND connections may be connected to a common GND on the supply with no reduction in performance. Note: Refer to WM8775 datasheet for limitations on individual supply voltages. Important: Exceeding the recommended maximum voltage can damage EVB components. Under voltage may cause improper operation of some or all of the EVB components. BOARD FUNCTIONALITY There are three options for inputting the required digital clocks (MCLK, BCLK, ADCLRC) to the WM8775 evaluation board. There is a coaxial input (J8) via a standard phono connector (the CS8427 device will then generate the clocks) or a direct digital input is available via one side of a 2x6 pin header (H1). A further option is to input a MCLK via connector J12 and use the CPLD (U4) to generate BCLK and ADCLRC. The analogue input signals are applied to the evaluation board via double phono connectors J7 (AIN_LEFT/RIGHT1), J9 (AIN_LEFT/RIGHT2), J10 (AIN_LEFT/RIGHT3), J14 (AIN_LEFT/RIGHT4). There are two options for outputting digital data from the WM8775 evaluation board. There is a coaxial output (J6) via a standard phono connector. The digital signals may also be accessed via one side of a 2x8 pin header (H2). If the CS8427 (U3) is being used to generate the MASTER, BCLK and ADCLRC clocks to the WM8775 device in slave mode then a digital input is required to the CS8427. There is a coaxial input (J8) via a standard phono connector. There is also the facility to generate multi-rate clocks from U4 using SW3 as the rate selection and either the MCLK from the CS8427 (U3) or an independent MCLK input to SMB connector J12. The CPLD is designed to provide BCLK and ADCLRC at four different sample rates: 256fs, 384fs, 512fs and 768fs. The CS8427 (U4) device is fixed at 256fs interface. All WM8775 device pins are accessible for easy measurement via the 1x14 pin headers (J13 and J19) running up each side of the device. Level-shift IC (U5) is used to shift the fixed +5V digital input from the CS8427 (U3) down to the same level as DVDD and vice-versa. w Rev 1.2, February 2004 4 WM8775-EV1M DIGITAL INPUT REF-DES J8 SOCKET NAME SPDIF_IN J12 MCLK SIGNAL Digital (AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201) signal. Digital MCLK for WM8775 Table 2 Digital Inputs ANALOGUE INPUT REF-DES J7 SOCKET NAME AIN_L/R_1 SIGNAL Analogue Input signal J9 AIN_L/R_2 Analogue Input signal J10 AIN_L/R_3 Analogue Input signal J14 AIN_L/R_4 Analogue Input signal Table 3 Analogue Inputs Note: Analogue signals applied to these connectors are AC coupled before being input to the WM8775. When used in Slave Mode with the CS8427, an SPDIF signal must still be applied to phono connector J8. This input signal is used to allow correct operation of the CS8427 as well as being used to generate the MCLK for the WM8775. DIGITAL INPUT REF-DES J6 SOCKET NAME SPDIF_OUT SIGNAL Digital (AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201) signal. Table 4 Digital Output w Rev 1.2, February 2004 5 WM8775-EV1M INTERFACES Figure 2 Interfaces HEADERS H1 SIGNAL H2 1/2 SLAVE LRC 12/11 SIGNAL GND 3/4 GND 10/9 ADC DOUT 5/6 SLAVE BCLK 8/7 GND 7/8 GND 6/5 BCLK OUT 9/10 MCLK 4/3 GND 11/12 GND 2/1 ADCLRC OUT Table 5 Headers J13 WM8775 PIN NAME J19 WM8775 PIN NAME 1 1 AIN1L 1 15 ADCREFP 2 2 BCLK 2 16 AVDD 3 3 MCLK 3 17 AGND 4 4 DOUT 4 18 AINVGR 5 5 ADCLRC 5 19 AINOPR 6 6 DGND 6 20 AINVGL 7 7 DVDD 7 21 AINOPL 8 8 MODE 8 22 AIN4R 9 9 CE 9 23 AIN4L 10 10 DI 10 24 AIN3R 11 11 CL 11 25 AIN3L AIN2R 12 12 NC 12 26 13 13 VMIDADC 13 27 AIN2L 14 14 ADCREFGND 14 28 AIN1R Table 6 Headers w Rev 1.2, February 2004 6 WM8775-EV1M JUMPERS JUMPERS JUMPER STATUS DESCRIPTION J15 OPEN SHORT AINR input gain set to 1 AINR input gain set to 0.5 [default setting] J17 OPEN SHORT AINL input gain set to 1 AINL input gain set to 0.5 [default setting] Table 6 Links SWITCHES SWITCHES SWITCH STATUS SW1 (DATA FORMAT) DESCRIPTION 1 1 1 1 SW2 2 0 0 0 3 0 0 0 4 1 0 0 5 0 0 0 6 0 1 0 DATA FORMAT I2S Compatible [default setting] 24-bit Right Justified Left Justified After an input data format change has been made using SW1, the CS8427 will only latch the new settings after SW2 has been pressed and released. SW3 (Sample Frequency Format) J18 (Software Control) 1 1 0 0 0 ON OFF 2 0 1 0 0 3 0 0 1 0 4 0 0 0 1 SAMPLE FREQUENCY 768FS 512FS 384FS 256FS [default setting] 2-wire Control Mode 3-wire (SPI) Control Mode [default setting] Table 7 Switches LINKS LINKS LINK STATUS DESCRIPTION LNK1 (BCLK Source Control) Pins 1 and 2 SHORT Pins 2 and 3 SHORT Centre Position H1 Source For BCLK [default setting] MULTI BCLK (Select using SW3) For WM8775 MASTER MODE LNK2 (ADCLRC Source Control) Pins 1 and 2 SHORT Pins 2 and 3 SHORT Centre Position H1 Source For ADCLRC [default setting] MULTI ADCLRC (Select using SW3) For WM8775 MASTER MODE LNK3 (5V tolerant supply control) Pins 1 and 2 SHORT Pins 2 and 3 SHORT Centre Position DVDD Supply for S/W and mode control [default setting] +5v Supply for S/W and mode control No Supply for S/W and mode control Table 8 Links w Rev 1.2, February 2004 7 WM8775-EV1M SOFTWARE CONTROL There are two possible serial software control modes that may be selected to operate the WM8775. The standard SPI user interface is a 3-wire solution with the second option being a 2-wire solution. 3-WIRE MODE To operate the WM8775 in SPI (3-wire) mode, jumper switch J18 must be set to the OFF position, selection of 3 wire mode will be indicated by D1 being OFF. The 3-wire serial interface then becomes active on pins 9(CE), 10(DI) and 11(CL). The serial interface on the board can be connected to a PC via the printer port or any other standard parallel port. The port used can be selected through the software provided. The software supplied with this kit gives the user access to all the possible features provided by the WM8775. The 3-wire latch, data and clock lines may also be connected to the board via the test points TP20 (CE), TP18 (DI) and TP19 (CL). Please refer to the WM8775 datasheet for full details of the serial interface timing and all register features. latch CE CL DI B15 B14 B13 B12 B11 control register address B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 control register data bits Figure 1 3-Wire Serial Interface 2-WIRE MODE To operate the WM8775 in 2-wire mode, jumper switch J18 must be set to the ON position, selection of 2 wire mode will be indicated by D1 being ON. The 2-wire serial interface becomes active on pins 10(DI) and 11(CL). The serial interface on the board can be connected to a PC via the printer port or any other standard parallel port. Note: a bi1 directional parallel port is required for 2-wire operation . The 2-wire data and clock lines may also be connected to the board via the test points TP18 (DI) and TP19 (CL). When used in 2-wire mode, the WM8775 has two possible addresses (0011010 [0x34h] or 0011011 [0x36h]) that are selectable by pulling CSB low or high. If connecting a probe to the Test Points it must be noted that the CSB line is pulled high on the WM8775 evaluation board selecting address 0011011. CSB must be pulled low or driven low through the software writes if address 0011010 is used (as is performed in the WM8775-EV1S software provided). Figure 2 2-Wire Serial Interface Note: 1If the 2-wire mode is not reporting as expected then the most likely cause is that the parallel port being used is not bi-directional. In most PC’s, the parallel port can be configured in the BIOS settings during initial power up. w Rev 1.2, February 2004 8 WM8775-EV1M REGISTER MAP REGISTER ADDRESS (Bit 15 – 9) Bit[8] R0 (00h) 0 UPDATE LINMUTE HPLA[6:0] R1 (01h) 1 UPDATE RINMUTE HPRA[6:0] R2 (02h) 10 UPDATEA LO1ZC R3 (03h) 11 UPDATED LDA[7:0] R4 (04h) 100 UPDATED RDA[7:0] R5 (05h) 101 UPDATED R6 (06h) 110 0 R7 (07h) 111 0 R8 (08h) 1000 0 Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] HPMASTA[6:0] MASTDA[7:0] 0 0 0 0 PL[3:0] 0 0 0 0 R9 (09h) 1001 0 0 0 R10 (0Ah) 1010 0 0 0 0 0 0 DACWL[1:0] ADCWL[1:0] DZCEN 0 0 0 DMUTE ADCLRP 0 ADCMS DACMS R13 (0Dh) 1101 0 0 R14 (0Eh) 1110 ZCLA LAG[7:0] R15 (0Fh) 1111 ZCRA RAG[7:0] R16 (10h) 10000 R17 (11h) 10001 LCEN R18 (12h) 10010 FDECAY R19 (13h) 10011 0 R20 (14h) 10100 CHGPERZC[1:0] R21 (15h) 10101 LRBOTH MUTELA R22 (16h) 10110 0 0 R23 (17h) 10111 ADCOSR 0 HPPD MAXGAIN[2:0] ALCZC 0 0 0 ADCFMT[1:0] ADCRATE[2:0] DACPD ADCPD PDWN HLD[3:0] ATK[3:0] 0 NGTH[2:0] TRANWIN[2:0] MUTERA DEEMPH DACFMT[1:0] LCT[3:0] 0 DCY[3:0] 0 DZFM[1:0] ADCBCP ADCHPD 1100 LCSEL[1:0] PHASE[1:0] DACLRP 1011 0 ATC 0 R11 (0Bh) AINPD 0 IZD DACBCP R12 (0Ch) DACRATE[2:0] 0 TOD 0 NGG NGAT MAXATTEN[3:0] AMX[4:0] 0 MX[2:0] writing 000000000 to this register resets all registers to their default state Table 9 Mapping of Program Registers Please refer to the WM8775 datasheet for full details of the serial interface timing and all register features. w Rev 1.2, February 2004 9 WM8775-EV1M SERIAL INTERFACE SOFTWARE DESCRIPTION The following section will detail the downloading and installation of evaluation software and also the operation of the software and the functionality of each control button. SOFTWARE DOWNLOAD The current evaluation board software should be downloaded from the Wolfson website [www.wolfsonmicro.com]. From the homepage it is recommended that you do a search for ‘WM8775’ and select the ‘more’ button located under the ‘EVALUATION BOARDS’ heading. Select ‘DOWNLOAD’ from the right hand side of the screen under the ‘SOFTWARE’ heading. Once you have accepted the licence agreement you can select the WM8775_EV1S_REVx.x.ZIP link and download to your hard drive. SOFTWARE INSTALLATION Once the .zip file has been downloaded, to install the software: • Open the .zip file • Double click on the setup.exe file. • Follow the on-screen installation instructions and save to the desired location. The software can then be opened by either running the extracted WM8775_EV1_REV1.exe file from the saved location. Alternatively select: Start > Programs > WM8775-EV1S Revx.x > WM8775-EV1S. w Rev 1.2, February 2004 10 WM8775-EV1M SOFTWARE OPERATION The WM8775 software has been constructed on one main panel which has been split into the functional areas of the device. This makes the software easy to use and also very clear what the register setting configuration currently is. The main menu panel shown in Figure 3 provides full register control as well as offering a number of pull-down menus. Figure 3 Software Main Menu Panel SUBMIT ALL The ‘Submit All’ button will submit the current panel settings to every register of the WM8775. This means changes within all the visible sections will be submitted. This is the only method for writing to the WM8775 device. WM8775 RESET The ‘Reset’ button writes to the reset register (R23) but does not reset the control panel values. If the previous values are to be resubmitted then the ‘Submit All’ button should be pressed. RESET SOFTWARE PANEL SETTINGS If the user would like to start afresh then the ‘Reset Software Panel Settings’ button should also be pressed. Pressing this button does not write to the device, it only resets the panel settings to the WM8775 default state. w Rev 1.2, February 2004 11 WM8775-EV1M WOLFSON LOGO Left clicking on the Wolfson logo will open the PCs default web browser and go top the Wolfson Microelectronics website (‘www.wolfsonmicro.com’). SOFTWARE INTERFACE This panel details the selected interface method from the pull down menu. The WM8775 device should be configured using J18 to match this selection. Important: It must be noted that the CS8427 SPDIF decoder IC will only work at a rate of 256fs. This will limit the sample rates that may be set using the WM8775 unless an external source is used supplying signals directly to the relevant pins of header H1 or taking the signals from the relevant pins of header H2. w Rev 1.2, February 2004 12 WM8775-EV1M EVALUATION BOARD CONFIGURATION The WM8775 device will power up in an operational mode. Therefore no software control is required to obtain a digital output when a signal is applied to AIN_L/R_1. For this reason it is recommended that the default hardware configuration is as follows. +5v DGND DVDD +2.7V to +3.6V J1 J2 J3 AVDD +2.7V to +5.5V J4 AGND J5 AIN_L/R_1 SPDIF_ OUT OPEN 0 SW1 1 1 2 3 4 5 6 AIN_L/R_2 The SPDIF input is required to provide clocks for the WM8775 audio interface. SW2 H1 SPDIF_ IN 1 H2 2 3 SW3 OPEN J12 1 AIN_L/R_3 0 1 J11 J13 1 LNK2 PARALLEL PORT 4 LNK1 AIN_L/R_4 J19 1 1 1 1 1 LNK3 1 J15 J17 J18 1 Figure 4 Evaluation Board Default Configuration This configuration allows an analogue signal to be applied to AIN_L/R_1 and the digital data to be output on the SPDIF_OUT connector. The WM8775 is configured for slave mode and the clocks are generated from the CS8427 device. w Rev 1.2, February 2004 13 WM8775-EV1M LINKS AND JUMPERS LINK/JUMPER STATUS DESCRIPTION H1 Fit jumpers (1,2) (5,6) (9,10) MCLK, BCLK and ADCLRC generated from CS8427 H2 Fit jumpers (1,2) (5,6) (9,10) ADC BCLK, ADCLRC and data to CS8427 J15 SHORT AINR input gain set to 0.5 J17 SHORT AINL input gain set to 0.5 SW1 1 1 2 0 3 0 4 1 SW3 1 0 2 0 3 0 4 1 5 0 6 0 DATA FORMAT I2S Compatible SAMPLE FREQUENCY 256FS J18 OFF 3-wire (SPI) Control Mode LNK1 Pins 1 and 2 SHORT BCLK Selection from H1 LNK2 Pins 1 and 2 SHORT ADCLRC Selection from H1 LNK3 Pins 1 and 2 SHORT DVDD Supply for S/W and mode control Table 10 Default Board Configuration w Rev 1.2, February 2004 14 WM8775-EV1M SCHEMATIC LAYOUT Figure 5 Functional Diagram w Rev 1.2, February 2004 15 WM8775-EV1M Figure 6 Digital Interface w Rev 1.2, February 2004 16 WM8775-EV1M Figure 7 Software Control w Rev 1.2, February 2004 17 WM8775-EV1M Figure 8 Level Shift w Rev 1.2, February 2004 18 WM8775-EV1M Figure 9 Analogue Input w Rev 1.2, February 2004 19 WM8775-EV1M Figure 10 WM8775 w Rev 1.2, February 2004 20 WM8775-EV1M Figure 11 Power w Rev 1.2, February 2004 21 WM8775-EV1M WM8775-EV1B PCB LAYOUT Figure 12 Top Layer Silkscreen w Rev 1.2, February 2004 22 WM8775-EV1M Figure 13 Top Layer w Rev 1.2, February 2004 23 WM8775-EV1M Figure 14 Bottom Layer w Rev 1.2, February 2004 24 WM8775-EV1M Figure 15 Bottom Layer Silkscreen w Rev 1.2, February 2004 25 WM8775-EV1M WM8775-EV1B BILL OF MATERIAL REFERENCE DESIGNATOR QTY 0.1uF 0805 SMD Ceramic Capacitor 50V X7R DESCRIPTION C1, C3, C4, C14, C19, C22, C27, C29, C39, C40, C42, C43, C44, C45, C47, C48, C49, C50, C51 19 0.01uF 0805 SMD Ceramic Capacitor 50V X7R C11 1 10uF 10V SMD Tantalum Capacitor case A C16 1 0.1uF 0603 SMD Ceramic Capacitor 16V X7R C18, C20 2 10uF 6.3 Dia 2.5 pitch Oscon Through Hole Cap. 25V 20% C2, C5, C6, C46, C52, C53, C54 7 4.7nF 0603 SMD Ceramic Capacitor 50V X7R C21 1 Unpop 0805 SMD Ceramic Capacitor site C23, C25, C28, C30, C33, C34, C41 7 10uF 6.3 Dia 2.5 pitch Oscon Through Hole Cap. 16V 20% C7, C9, C12, C15, C24, C31, C35, C37 8 220pF 0805 SMD Ceramic Capacitor 50V X7R C8, C10, C13, C17, C26, C32, C36, C38 8 HSMY-C670 0805 SMD Chip LED YELLOW D1 1 2x6 2.54mm pitch PCB Pin Header VERTICAL H1, H2 2 4mm Non-Insulated Panel Socket 16A J1, J2, J3, J4, J5 5 2x5 2.54mm Male PCB Header LoPro VERTICAL J11 1 SMB Connector PCB Mount 50 Ohm VERTICAL J12 1 1x14 2.54mm pitch PCB Pin Header VERTICAL J13, J19 2 1x2 PCB Pin Header 0.1" VERTICAL J15, J17 2 36-way Centronics/IEE488 PCB mountable Connector J16 1 1x2 Jumper Switch 0.1" on-off VERTICAL J18 1 Phono Socket PCB mount BLACK J6 1 Phono Socket PCB mount Pair Red/White J7, J9, J10, J14 4 Phono Socket PCB mount YELLOW J8 1 0R 1206 Resistor on 1210 Inductor site L1, L2, L3 3 Unpop 1210 Surface Mount Inductor site L4 1 3.3uH 1210 Surface Mount Inductor '1210A series' L5 1 JSK9-16-G0 PCB 1x3 Jumper Switch 0.1" Center-off 3 VERTICAL LNK1, LNK2, LNK3 TN0200T N- Channel MOSFET SOT23 Q1, Q2, Q3 3 10K 0805 SMD chip resistor 1% 0.1W R1, R3, R9, R11, R16, R17, R19, R22, R24, R29, R32, R36, R44, R55, 14 75R 0805 SMD chip resistor 1% 0.125W R10 1 620R 0805 SMD chip resistor 1% 0.1W R12 1 100K 0805 SMD chip resistor 1% 0.1W R13 1 1K2 0805 SMD chip resistor 1% 0.1W R14, R40, R43, R48 4 Unpopulated 0805 resistor site R2, R4, R15, R20, R23, R25, R27, R30, R34, R57, R59 11 33R 0805 SMD chip resistor 1% 0.1W R31, R33, R35, R37, R38, R39 6 4K7 0805 SMD chip resistor 1% 0.1W R41, R46, R52 3 5k1 0805 SMD chip resistor 1% 0.125W R47, R50, R54, R56 4 0R 0805 SMD chip resistor 1% 0.1W R5, R18, R21, R26, R28, R42, R45, R49, R51, 10 R58 560R 0805 SMD chip resistor 1% 0.1W R53 1 47k 1206 SMD chip 4 resistor array 5% 0.063W R6, R7, R8 3 Slotted Panhead Screw - M3 thread; 12mm long SC1, SC2, SC3, SC4 4 Hexagonal brass M3 size spacer 20mm length SPR1, SPR2, SPR3, SPR4 4 w Rev 1.2, February 2004 26 WM8775-EV1M DESCRIPTION QTY REFERENCE DESIGNATOR DIL Switch 6-Way Rocker SW1 1 B3F1000 SPNO PCB mount switch SW2 1 DIL Switch 4-Way Rocker SW3 1 1.32mm PCB Test Terminal BLACK TP1, TP3, TP6, TP7, TP9, TP11,TP12, TP15, TP17, TP21 10 1.32mm PCB Test Terminal RED TP2, TP4, TP5, TP8, TP10, TP13, TP14, TP16, TP18, TP19, TP20 11 2:1 Ratio 96KHz SPDIF Digital Audio transformer SOIC U1 1 DS1813 5V active Low Power-On-Reset chip SOT U2 1 CS8427 96KHz Audio Transceiver U3 1 XC9536XL-15 3.3V 36 macrocell CPLD U4 1 74ALVC164245 16 Bit Dual Supply Bus Transceiver SSO U5 1 WM8775 24-bit 96kHz ADC with 4 Channel I/P Mux U6 1 Plain M3 size washer WSH1, WSH2, WSH3, WSH4 4 Table 11 WM8775EV1B Bill Of Material Note: 1 The audio transformer used on this board is manufactured by Scientific Conversion Inc. (www.scientificonversion.com). w Rev 1.2, February 2004 27 WM8775-EV1M APPENDIX EXTERNAL DSP CONNECTION TO THE WM8775-EV1B The WM8775-EV1B evaluation board has been designed to allow it to be easily connected to an external DSP platform with error free operation. The following information is provided to ease the connection process and ensure that all signals sent and received by the WM8775-EV1B are reliable and at the correct voltage levels. AUDIO INTERFACE CONNECTIONS It is recommended that twisted pair (signal twisted with GND) or shielded wires are used to make the audio interface connections between the DSP and WM8775-EV1B platforms. This is to ensure that no interference or noise is picked up by the clocks or data lines, thus reducing performance and reliability. When the WM8775 is set in Slave Mode, the jumpers on header H1 should be removed, disconnecting the digital input clocks section of the evaluation board. The audio interface timing and data signals from the DSP platform should then be connected as shown in Figure 16. The signals should be connected to H1 and not on the header strip J13 running up the left side of the device. Connecting the signals on the output side of the level-shift IC (U5) will cause drive contention between U5 and the DSP and could result in damage to either or both devices. In most cases, the DSP supplies will be set around 3V for low power portable applications. The inputs to the level-shift IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and low input current requirements (i.e. 15uA max) allowing most DSP's to connect directly. Figure 16 Connections from DSP Platform The digital inputs to the WM8775 have a CMOS threshold (i.e. Logic High (min) = DVDDx0.7; Logic Low (max) = DVDDx0.3). These are met directly by the level shift IC outputs. The jumpers on H2 should also be removed, disconnecting the digital output section of the WM8775 evaluation board. The ADCDAT data (DOUT) from the WM8775 should then be connected to the DSP via pin 4 of header strip J13 and the GND connection should be taken from pin 6 of header strip J13. The DOUT signal should be taken direct from the WM8775 digital output (J13) as the output side of the level-shift IC (U5) from the WM8775 is pulled up to +5V which may overdrive and cause damage to the DSP inputs. The digital output levels of the WM8775 are Logic High (min) = DVDDx0.9; Logic Low (max) = DVDDx0.1 which should meet the input level requirements of most DSPs running at +3V supplies. If the DSP is running with +5V supplies then the connections to it should be made from the output side of the level-shift IC (U5), by connecting H2 pin9 and using pin 10 for ground. w Rev 1.2, February 2004 28 WM8775-EV1M When the WM8775 is set to Master mode the jumpers on header H1 and H2 should be removed, and LNK1 and LNK2 should be set to the centre position, this will disconnect the digital input section of the evaluation board. If an internal MCLK from U5 is to be used then fit a jumper link between H1 pins 9 and 10, a SPDIF signal should then be applied to J8. If an external MCLK signal is being used (i.e. supplied by the DSP) then the DSP platform should be connected as shown in Figure 17. The signals should be connected to H1 and not on the header strip J13 running up the side of the device. Connecting the signals on the output side of the level-shift IC (U5) will cause drive contention between U5 and the DSP and could result in damage to either or both devices. In most cases, the DSP supplies will be set around +3V for low power portable applications. The inputs to the level-shift IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and low input current requirements (i.e. 15uA max) allowing most DSPs to connect directly. MCLK GND H1 Figure 17 Timing Connections from DSP Platform The digital inputs to the WM8775 have a CMOS threshold (i.e. Logic High (min) = DVDDx0.7; Logic Low (max) = DVDDx0.3). These are met directly by the level shift IC outputs. Alternatively an SMB connector (J12) is supplied to apply an external MCLK from example a signal generator. The jumpers on H2 should also be removed, disconnecting the digital output section of the WM8775 evaluation board. The DOUT, BCLK and ADCLRC signals should be taken direct from the WM8775 digital output (DOUT J13/4, BCLK J13/2, ADCLRC J13/5) as the output side of the level-shift IC (U5) from the WM8775 is pulled up to +5V which may overdrive and cause damage to the DSP inputs. The digital output levels of the WM8775 are Logic High (min) = DVDDx0.9; Logic Low (max) = DVDDx0.1 which should meet the input level requirements of most DSPs running at +3V supplies. If the DSP is running with +5V supplies (and +5V tolerant inputs) then the connections from the WM8775 evaluation board to the DSP should be made from H2 on the output side of the level-shift IC from the WM8775. This will ensure that the DSP input level specifications are met. SOFTWARE INTERFACE When using the WM8775-EV1B evaluation board with a DSP platform, the registers may be set using the supplied software with a PC and parallel port cable as shown in Figure 18. The example shown is for the WM8775 set to slave mode, interface connections to the board depends on independent configuration for master or slave. If the DSP is being used to write to the WM8775 registers as well as supplying/receiving the audio interface timing and data signals, then it is recommended that twisted pair or shielded wires are used to connect the DSP platform to the WM8775-EV1B. A direct connection can be made to pin 9 (CE), pin 10 (DI) and pin 11 (CL) of header strip J13 for 3-wire software mode as shown in Figure 19. This is applicable to a DSP with either 3v or 5v tolerant thresholds as the software pins have 5v thresholds. The same connections apply for controlling the WM8775 via 2-wire software mode (i.e. only pin 10 (DI) and pin 11 (CL) of header strip J13 are used). Pin 9 (CE) can be pulled low on the board if device address 0011010 [0x34h] is required or pulled high address 0011011 [0x36h] is required. w Rev 1.2, February 2004 29 WM8775-EV1M CONNECTION DIAGRAMS Software Control WM8775-EV1B J13 DSP Platform Audio Interface J19 H1 Figure 18 DSP Connection with PC Control using Wolfson Software WM8775-EV1B DSP Platform Audio Interface H1 J13 J19 DSP Software Control Figure 19 Full DSP Control w Rev 1.2, February 2004 30 WM8775-EV1M EVALUATION SUPPORT The aim of this evaluation kit is to help you to become familiar with the functionality and performance of the WM8775 CODEC. If you require more information or require technical support please contact Wolfson Microelectronics Applications group through the following channels: Email: [email protected] Telephone Apps: (+44) 131 272 7070 Fax: (+44) 131 272 7001 Mail: Applications Department at address on last page. or contact your local Wolfson representative. Additional information may be made available from time to time on our web site at http://www.wolfsonmicro.com w Rev 1.2, February 2004 31 WM8775-EV1M IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. WM warrants performance of its products to the specifications applicable at the time of sale in accordance with WM’s standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used by the customer to minimise inherent or procedural hazards. Wolfson products are not authorised for use as critical components in life support devices or systems without the express written approval of an officer of the company. Life support devices or systems are devices or systems that are intended for surgical implant into the body, or support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided, can be reasonably expected to result in a significant injury to the user. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of WM covering or relating to any combination, machine, or process in which such products or services might be or are used. WM’s publication of information regarding any third party’s products or services does not constitute WM’s approval, license, warranty or endorsement thereof. Reproduction of information from the WM web site or datasheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use. Resale of WM’s products or services with statements different from or beyond the parameters stated by WM for that product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use. ADDRESS: Wolfson Microelectronics plc 20 Bernard Terrace Edinburgh EH8 9NX United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: [email protected] w Rev 1.2, February 2004 32