Datasheet

AOZ8808
Ultra-Low Capacitance TVS Diode
General Description
Features
The AOZ8808 is a transient voltage suppressor array
designed to protect high speed data lines such as HDMI
1.4/2.0, USB 3.0, MDDI, SATA, and Gigabit Ethernet
from damaging ESD events.
 ESD protection for high-speed data lines:
This device incorporates eight surge rated, low
capacitance steering diodes and a TVS in a single
package. During transient conditions, the steering diodes
direct the transient to either the positive side of the power
supply line or to ground.
The AOZ8808 provides a typical line-to-line capacitance
of 0.3 pF and low insertion loss up to 6 GHz providing
greater signal integrity making it ideally suited for
HDMI 1.4/2.0 or USB 3.0 applications, such as Digital
TVs, DVD players, computing, set-top boxes and MDDI
applications in mobile computing devices.
The AOZ8808 comes in a RoHS compliant and Halogen
Free 2.5 mm x 1.0 mm x 0.55 mm DFN-10 package and
is rated for -40 °C to +85 °C junction temperature range.
– IEC 61000-4-2, level 4 (ESD) immunity test
– Air discharge: ±15 kV; contact discharge: ±15 kV
– IEC61000-4-4 (EFT) 40 A (5/50 nS)
– IEC61000-4-5 (Lightning) 4 A (8/20 µS)
– Human Body Model (HBM) ±24 kV
 Array of surge rated diodes with internal TVS diode
 Small package saves board space
 Protects four I/O lines
 Low capacitance between I/O lines: 0.3 pF
 Low clamping voltage
 Low operating voltage: 3.3V, 5.0 V
Applications
 HDMI 1.4/2.0, USB 3.0, MDDI, SATA ports
 Monitors and flat panel displays
 Set-top box
 Video graphics cards
 Digital Video Interface (DVI)
 Notebook computers
Typical Applications
AOZ8808
AOZ8808
AOZ8802A
TX2+
TX2D+
D-
D+
DUSB 3.0
Connector
SSRX+
SSRX-
SSRX+
SSRX-
TX1+
TX1HDMI 1.4/2.0
Transmitter
TX0+
TX0-
SSTX+
SSTX-
SSTX+
SSTX-
CLK+
CLK-
USB 3.0
Transceiver
RX2+
RX2RX1+
RX1HDMI 1.4/2.0
Receiver
RX0+
RX0CLK+
CLKConnector
AOZ8808
AOZ8808
Figure 1. USB 3.0 Ports
Rev. 4.0 January 2016
Connector
AOZ8808
Figure 2. HDMI 1.4/2.0 Ports
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Page 1 of 8
AOZ8808
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
-40 °C to +85 °C
2.5 mm x 1.0 mm x 0.55 mm DFN-10
Green Product
AOZ8808DI-03
AOZ8808DI-05
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
CH1
1
10 NC
CH2
2
9
NC
VN
3
8
VN
CH3
4
7
NC
CH4
5
6
NC
DFN-10
(Top View)
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the device.
Parameter
AOZ8808DI-03
Storage Temperature (TS)
-65 °C to +150 °C
ESD Rating per IEC61000-4-2, contact
ESD Rating per IEC61000-4-2, air
AOZ8808DI-05
(1)(3)
±15 kV
(1)(3)
±15 kV
ESD Rating per Human Body Model(2)(3)
±24 kV
Notes:
1. IEC 61000-4-2 discharge with CDischarge = 150pF, RDischarge = 330 Ω.
2. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100 pF, RDischarge = 1.5 kΩ.
Maximum Operating Ratings
Parameter
Rating
Junction Temperature (TJ)
Rev. 4.0 January 2016
-40 °C to +125 °C
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Page 2 of 8
AOZ8808
Electrical Characteristics
RDNY
ITLP
IHold
VF
IT
IR
VBR
VHold
VCL VRWM
IF
TA = 25°C unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
3.3
V
AOZ8808DI-03
VRWM
VBR
Reverse Working Voltage
I/O Pin-to-Ground
Reverse Breakdown Voltage
IT = 100µA, I/O Pin-to-Ground
IR
Reverse Leakage Current
VRWM = 3.3V, I/O Pin-to-Ground
IF
Forward Voltage
IF = 15mA
VHOLD
IHOLD
3.5
V
1.0
0.85
µA
V
Hold Voltage of
Snapback(3)
0.8
V
Hold Current of
Snapback(3)
3.0
mA
Voltage(3)(4)
Clamping
(100ns Transmission Line
Pulse, I/O Pin-to-Ground)
ITLP = 1A
3.5
V
VCL
ITLP = 12A
8.0
V
RDNY
Dynamic Resistance(3)(4)
ITLP = 1A to 12A
0.35
Junction Capacitance
VPIN3,8 = 0V, VI/O = 0V, f = 1MHz, I/O Pinto-Ground
0.6
CJ
Ω
0.75
pF
5.0
V
1.0
µA
AOZ8808DI-05
VRWM
Reverse Working Voltage
I/O Pin-to-Ground
Reverse Breakdown Voltage
IT = 100µA, I/O Pin-to-Ground
IR
Reverse Leakage Current
VRWM = 5V, I/O Pin-to-Ground
IF
Forward Voltage
IF = 15mA
VBR
VHOLD
IHOLD
Hold Voltage of
Snapback(3)
Hold Current of
Snapback(3)
6.0
V
0.85
0.8
V
3.5
mA
VCL
Clamping Voltage(3)(4)
(100ns Transmission Line
Pulse, I/O Pin-to-Ground)
RDNY
Dynamic Resistance(3)(4)
ITLP = 1A to 12A
0.35
Junction Capacitance
VPIN3,8 = 0V, VI/O = 0V, f = 1MHz, I/O Pinto-Ground
0.6
CJ
V
ITLP = 1A
4.0
V
ITLP = 12A
9.0
V
0.75
pF
Ω
Notes:
3. These specifications are guaranteed by design and characterization.
4. Measurements performed using a 100ns Transmission Line Pulse (TLP) system.
Rev. 4.0 January 2016
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Page 3 of 8
AOZ8808
Typical Performance Characteristics
Forward Voltage vs. Forward Peak Pulse Current
8
(tperiod = 100ns, tr = 1ns)
10
Clamping Voltage, VCL (V)
AOZ8808DI-3
7
Forward Voltage (V)
Clamping Voltage vs. Peak Pulse Current
(tperiod = 100ns, tr = 1ns)
AOZ8808DI-5
6
5
4
3
2
1
0
AOZ8808DI-3
9
AOZ8808DI-5
8
7
6
5
4
3
2
0
2
4
6
8
10
Forward Current, IPP (A)
12
0
14
2
14
875m
Voltage (V)
Differential Signal (V)
12
HDMI 1.4 Eye Diagram with AOZ8808
USB3.0 Eye Diagram with AOZ8808 (5Gbps)
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
Unit Intervals
4
6
8
10
Peak Puse Current, IPP (A)
-875m
0
Time (s)
898p
HDMI 2.0 Eye Diagram with AOZ8808
Voltage (V)
600m
-600m
0
Rev. 4.0 January 2016
Time (s)
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300p
Page 4 of 8
AOZ8808
High Speed PCB Layout Guidelines
Printed circuit board layout is the key to achieving the
highest level of surge immunity on power and data lines.
The location of the protection devices on the PCB is the
simplest and most important design rule to follow. The
AOZ8808DI devices should be located as close as
possible to the noise source. The AOZ8808DI device
should be placed on all data and power lines that enter or
exit the PCB at the I/O connector. In most systems, surge
pulses occur on data and power lines that enter the PCB
through the I/O connector. Placing the AOZ8808DI
devices as close as possible to the noise source ensures
that a surge voltage will be clamped before the pulse can
be coupled into adjacent PCB traces. In addition, the
PCB should use the shortest possible traces. A short
trace length equates to low impedance, which ensures
that the surge energy will be dissipated by the
AOZ8808DI device. Long signal traces will act as
antennas to receive energy from fields that are produced
by the ESD pulse. By keeping line lengths as short as
possible, the efficiency of the line to act as an antenna for
ESD related fields is reduced. Minimize interconnecting
line lengths by placing devices with the most interconnect
as close together as possible. The protection circuits
should shunt the surge voltage to either the reference or
chassis ground. Shunting the surge voltage directly to the
IC’s signal ground can cause ground bounce. The
clamping performance of TVS diodes on a single ground
PCB can be improved by minimizing the impedance with
relatively short and wide ground traces. The PCB layout
and IC package parasitic inductances can cause
significant overshoot to the TVS’s clamping voltage. The
inductance of the PCB can be reduced by using short
trace lengths and multiple layers with separate ground
and power planes. One effective method to minimize
loop problems is to incorporate a ground plane in the
PCB design.
The AOZ8808DI ultra-low capacitance TVS is designed
to protect four high speed data transmission lines from
transient over-voltages by clamping them to a fixed
reference. The low inductance and construction
minimizes voltage overshoot during high current surges.
When the voltage on the protected line exceeds the
reference voltage the internal steering diodes are forward
biased, conducting the transient current away from the
sensitive circuitry. The AOZ8808DI is designed for ease
of PCB layout by allowing the traces to run underneath
the device. The pinout of the AOZ8808DI is designed to
simply drop onto the IO lines of a High Definition
Multimedia Interface (HDMI 1.4/2.0) or USB 3.0 design
without having to divert the signal lines that may add
more parasitic inductance. Pins 1, 2, 4 and 5 are
connected to the internal TVS devices and pins 6, 7, 9
and 10 are no connects. The no connects was done so
the package can be securely soldered onto the PCB
surface.
Clock
Clock
SSRX+
SSRX+
Data0
Data0
SSRX–
SSRX–
Ground
Ground
Ground
Data1
Data1
SSTX+
SSTX+
Data2
Data2
SSTX–
SSTX–
Ground
Figure 3. Flow Through Layout for HDMI 1.4/2.0
Rev. 4.0 January 2016
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Figure 4. Flow Through Layout for USB 3.0
Page 5 of 8
AOZ8808
Package Dimensions, DFN 2.5mm x 1.0mm x 0.5mm, 10L
D
b1
b
e
E
Pin #1 Dot
by Marking
5
L
TOP VIEW
1
e
Pin #3 Identification R 0.130
BOTTOM VIEW
c
A
SIDE VIEW
A1
Dimensions in millimeters
RECOMMENDED LAND PATTERN
0.10
0.50
0.30
0.15
0.36
0.48
0.72
1.20 0.24
Dimensions in inches
Symbols
A
Min.
0.50
Nom.
0.55
Max.
0.60
Symbols
A
Min.
0.020
Nom.
0.022
Max.
0.024
A1
b
0.00
0.15
—
0.20
0.05
0.25
A1
b
0.000
0.006
—
0.008
0.002
0.010
b1
c
D
0.40
0.152 Ref.
2.45
2.50
2.55
b1
c
D
0.016
0.006 Ref.
0.096 0.098 0.100
E
e
0.95
E
e
0.037
L
0.33
L
0.013
1.00
1.05
0.50 BSC
0.38
0.43
0.039 0.041
0.020 BSC
0.015
0.017
0.20
0.40
Note:
1. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact.
Rev. 4.0 January 2016
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Page 6 of 8
AOZ8808
Tape and Reel Dimensions, DFN 2.5mm x 1.0mm x 0.5mm, 10L
Carrier Tape
P2
P1
D0
D1
E1
K0
E2 E
B0
Ref 5
P0
T
A0
A–A
Feeding Direction
UNIT: mm
Package
DFN 2.5x1.0
B0
2.62
0.05
A0
1.12
0.05
K0
0.70
0.05
D0
D1
E
ø1.55 ø0.55
8.00
0.05
0.05 +0.3/-0.1
Reel
E1
1.75
0.1
E2
3.50
0.05
P0
4.00
0.10
P1
4.0
0.10
P2
2.0
0.05
T
0.25
0.05
W1
S
M
K
N
G
R
H
W
UNIT: mm
Tape Size Reel Size
8mm
ø178
M
ø178.0
1.0
N
ø60.0
0.5
W
11.80
0.5
W1
9.0
0.5
H
ø13.0
+0.5 / –0.2
S
2.40
0.10
K
10.25
0.2
E
ø9.8
R
—
Leader / Trailer & Orientation
Trailer Tape
300mm Min.
Rev. 4.0 January 2016
Components Tape
Orientation in Pocket
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Leader Tape
500mm Min.
Page 7 of 8
AOZ8808
Part Marking
AOZ8808DI-03
(2.5 x 1.0 DFN)
FC12
Assembly Lot Code
Week and Year Code
Part Number Code
AOZ8808DI-05
(2.5 x 1.0 DFN)
AC12
Assembly Lot Code
Week and Year Code
Part Number Code
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 4.0 January 2016
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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