Solder Reflow Guide for Surface Mount Devices February 2013 Technical Note TN1076 Introduction This technical note provides general guidelines for a solder reflow and rework process for Lattice surface mount products. The data used in this document is based on IPC/JEDEC standards. Each board has its own profile which depends upon the reflow equipment used and the board design. The PCB must be individually characterized to find the reliable profile. This document covers SnPb, Pb-Free and Halogen-Free processes. Reflow • Use caution when profiling to insure the maximum temperature difference between components is less than 10°C (7°C within an individual component). • Forced convection reflow with nitrogen is preferred (with maximum oxygen content of 50-75 PPM). Inspection • Pre-reflow: Use visual inspection to verify solder paste dispense location and quantity. • Pick and place: Use machine vision as necessary to ensure proper component placement. • Post reflow: Use electrical testing to verify solder joint formation (100% post-reflow visual inspection is not recommended). Cleaning Recommendations • After solder reflow, printed circuit boards should be thoroughly cleaned and dried using standard cleaning equipment. • Final rinse should be warm DI water (50° to 75°C) with resistivity of 0.2 Meg Ohms/cm or greater. • After cleaning, boards should be baked for a minimum of 1 hour at 125°C to evaporate residual moisture. Rework Recommendations Removal and replacement of SMT packages on printed circuit boards is fairly straightforward. However, reattachment or touch-up of SMT packages that have already been soldered to the board is not practical in most cases. A few important criteria should be considered when choosing a rework system: • Minimize the change in temperature across the solder joint array to promote good solder joint formation, minimize intermetallic growth, improve solderability and minimize component warpage. • Minimize die temperature to prevent die delamination and wire bond failure. • Minimize board temperature adjacent to the rework site to reduce intermetallic growth, prevent secondary reflow, and prevent possible component delamination. • For boards with no internal ground plane, apply localized heat to the SMT package. When the solder is molten, remove package using appropriate vacuum tool. • While the board is still hot, remove excess solder from the site using a vacuum desoldering system or a soldering iron and solder wicking material. Use care to avoid damaging the solder pads or the surrounding solder mask. • For PCBs with internal ground plane(s), preheat the entire board to at least 80°C before removing the SMT packages. © 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1-1 tn1076_02.9 Solder Reflow Guide for Surface Mount Devices • Use alcohol to remove residual flux, then wash the entire board using the standard board cleaning process before attempting to replace SMT components. BGA Reballing BGA reballing is not recommended. Reballed BGA packages will void the original Lattice specifications. Pb-Free/Halogen-Free (RoHS-Compliant) Products All Lattice Pb-Free products are also fully RoHS compliant. Similarly, all Lattice Halogen-free products are also PbFree and RoHS compliant. Lattice offers a broad range of Pb-Free and Halogen-Free (RoHS-compliant) products in a variety of package configurations. These packages include the Thin Quad Flat Pack (TQFP), Quad Flat Pack Saw-Singulated (QFNS), Fine Pitch BGA (fpBGA), Thin BGA (ftBGA), Chip-Scale BGA (csBGA), Ultra Chip-Scale BGA (ucBGA), Chip Array BGA (caBGA) and Flip Chip BGA (fcBGA). Peak Reflow Temperature (TP) by Package Size Table 1 illustrates the peak reflow temperatures by package size. Refer to the Package Diagrams document and use maximum package dimensions to determine package thickness and volume. Table 1. Peak Reflow Temperature (TP) Classification Package Thickness Volume < 350 mm3 < 2.5 mm 240 + 0/-5°C 2.5 mm 225 + 0/-5°C SnPb Package Volume = 350 - 2000 mm3 225 + 0/-5°C < 1.6 mm Pb-Free and HalogenFree Packages Volume > 2000 mm3 260 + 0/-5°C 1.6 mm to < 2.5 mm 260 + 0/-5°C 250 + 0/-5°C 2.5 mm 250 + 0/-5°C 245 + 0/-5°C 245 + 0/-5°C Note: Package volume excludes external terminals (balls, bumps, lands, leads) and non-integral heat sinks. Table 2 shows the peak reflow temperature for Lattice devices by package type and size. Table 2. Peak Reflow Temperature (TP) by Package Type and Size Pb-Free / Halogen-Free Package (RoHS Compliant) SnPb Package Package Type Number of Leads/Balls Moisture Sensitivity Level Peak Reflow Temp. (+0/-5°C) 3 240 Moisture Sensitivity Level 49 caBGA 100 256 332 56 Not Available 3 64 csBGA 260 3 250 3 260 240 Not Available 3 240 144 184 3 240 3 121 132 Not Available Not Available 81 100 Peak Reflow Temp. (+0/-5°C) Not Available 328 2 Solder Reflow Guide for Surface Mount Devices Table 2. Peak Reflow Temperature (TP) by Package Type and Size (Continued) Pb-Free / Halogen-Free Package (RoHS Compliant) SnPb Package Package Type Number of Leads/Balls Moisture Sensitivity Level Peak Reflow Temp. (+0/-5°C) Moisture Sensitivity Level Peak Reflow Temp. (+0/-5°C) 3 260 4 245 36 49 64 ucBGA 81 Not Available 121 132 225 1020 fcBGA 1152 4 225 3 240 1704 100 144 3 260 Not Available 208 256 3 250 388 416 fpBGA Not Available 484 516 672 3 225 3 676 250 Not Available 680 900 3 1152 250 1156 fpSBGA 680 3 208 ftBGA 256 (Option 1)1 Not Available 3 256 (Option 2)2 324 225 225 Not Available 3 225 Not Available 3 260 3 250 3 260 3 260 3 260 48 64 TQFP (Thickness: 1.4mm) 100 128 240 3 144 256 176 44 TQFP (Thickness: 1.0mm) 48 3 100 240 Not Available 256 BGA 272 352 3 225 388 3 Not Available Solder Reflow Guide for Surface Mount Devices Table 2. Peak Reflow Temperature (TP) by Package Type and Size (Continued) Pb-Free / Halogen-Free Package (RoHS Compliant) SnPb Package Package Type Number of Leads/Balls Moisture Sensitivity Level Peak Reflow Temp. (+0/-5°C) 1 225 20 28 PLCC 44 68 3 Moisture Sensitivity Level Peak Reflow Temp. (+0/-5°C) 1 250 1 245 3 245 225 Not Available 84 4 100 3 120 PQFP 128 245 245 Not Available 3 225 160 3 245 1 260 3 260 208 24 32 QFNS Not Available 1 240 36 48 Not Available 64 84 256 SBGA 320 352 3 225 Not Available 1 225 Not Available 432 SSOP 28 WLCSP 25 Not Available 1. ispMACH 4000, MachXO2, MachXO, LatticeXP2. 2. LatticeECP3. 4 1 260 Solder Reflow Guide for Surface Mount Devices Reflow Profile for SMT Packages The typical reflow process includes four phases. 1. Preheat – Brings the assembly from 25°C to TS. During this phase the solvent evaporates from the solder paste. Preheat temperature ramp rate should be less than 2°C/second to avoid solder ball spattering and bridging. • Solder Ball Spattering – The most common solder balling defect is spattering which is caused by explosive evaporation of solvents. It can be eliminated by a slower temperature rise in the preheat phase. • Bridging – Often seen on fine pitch components and usually caused by inaccurate or splashy screen printing. But it can also be a result of solder paste slumping caused by rapid temperature rise in the preheat phase. 2. Flux Activation – The temperature rises slowly and reaches a point at which the flux completely wets the surfaces to be soldered. 3. Reflow – In this phase, the temperature rises to a level sufficient to reflow the solder. The flux wicks surface oxides and contaminants away from the melted solder, resulting in a clean solder joint. 4. Cool Down – Ramp down rate should be as fast as possible in order to control grain size, but should not exceed 6°C/second. Table 3 and Figure 1 describe the reflow profile. Table 3. Reflow Profiles Parameter Description SnPb Package Pb-Free and Halogen-Free Packages Ramp-Up Average Ramp-Up Rate (TSMAX to TP) TSMIN Preheat Peak Min. Temperature 100°C 150°C TSMAX Preheat Peak Max. Temperature 150°C 200°C 3°C/second max. 3°C/second max. tS Time between TSMIN and TSMAX 60-120 seconds 60-120 seconds TL Solder Melting Point 183°C 217°C tL Time Maintained above TL 60-150 seconds 60-150 seconds tP Time within 5°C of Peak Temperature 10-30 seconds 20-40 seconds Ramp-Down Ramp-Down Rate 6°C/second max. 6°C/second max. t 25°C to TP Time from 25°C to Peak Temperature 6 minutes max. 8 minutes max. 5 Solder Reflow Guide for Surface Mount Devices Figure 1. Thermal Reflow Profile TP tP Ramp-up Temperature (°C) TL tL TSMAX Ramp-down tS TSMIN Preheat Flux Activ ation Reflow Cool Do wn 25C t 25C to Peak Time (Seconds) Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: [email protected] Internet: www.latticesemi.com Revision History Date Version — — April 2008 02.2 June 2009 02.3 November 2010 02.4 Change Summary Previous Lattice releases. Updated Peak Reflow Temperature (TP) by Package Type and Size table. Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size, SnPb Packages table. Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size, Pb-Free Packages table. Updated for Halogen-free package support. June 2011 02.5 Updated document to include 25 WLCSP package. February 2012 02.6 Updated document with new corporate logo. April 2012 02.7 Updated document to include the 328-ball csBGA package. August 2012 02.8 Updated document to support iCE40 mobileFPGA packaging: - 36, 49, 81, 121 and 225-ball ucBGA - 81 and 121-ball csBGA - 36 and 84-ball QFNS - 100-pin TQFP (1.0 mm thickness) February 2013 02.9 Updated Peak Reflow Temperature (TP) by Package Type and Size table. 6