QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER QS532805/A/B FEATURES: DESCRIPTION − − − − − − − − The QS532805 clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of 5 non-inverting outputs. The QS532805 incorporates 25Ω series termination resistors. This clock buffer product is designed for use in high performance workstations, embedded and personal computing systems using 3V to 3.6V supply voltages. Several can be used in parallel or scattered throughout a system for guaranteed low skew, system-wide clock distribution networks. The QS532805 can accept 5V input and control signals. − − JEDEC compatible LVTTL level inputs and outputs 10 output, low skew clock signal buffer Monitor output Clock inputs are 5V tolerant Pinout and function compatible with QS5805T 25Ω on-chip resistors for low noise Input hysteresis for better noise margin Guaranteed low skew: • 0.7ns output skew • 0.7ns pulse skew • 1ns part-to-part skew Std., A, and B speed grades (B speed in QSOP package only) Available in QSOP and SOIC packages The QS532805 is characterized for operation at -40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM OEA 5 OA5 INA OA1 MON 5 OB5 INB OB1 OEB NOTE: QS532805 has a 25Ω series termination resistor on each clock output, including monitor. INDUSTRIAL TEMPERATURE RANGE JULY 2000 1 c 1999 Integrated Device Technology, Inc. DSC-5785/- QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol VTERM(2) (1) Description Supply Voltage to Ground Max. – 0.5 to +7 Unit V DC Output Voltage VOUT – 0.5 to Vcc+0.5 V – 0.5 to +7 V -3 V V C CA 1 20 V C CB OA 1 2 19 OB1 VTERM(3) DC Input Voltage VIN OA 2 3 18 OB2 VAC AC Input Voltage (pulse width ≤20ns) OA 3 4 17 OB3 IOUT DC Output Current VIN < 0 -20 mA DC Output Current Max. Sink Current/Pin 120 mA GND A 5 OA 4 6 SO 20-2 16 SO 20-8 15 OA 5 7 14 OB5 GNDQ 8 13 MON OE A 9 12 OEB IN A 10 11 IN B G ND B OB4 TSTG Storage Temperature – 65 to +150 °C TJ Junction Temperature 150 °C NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc Terminals. 3. All terminals except Vcc. QSOP/ SOIC TOP VIEW CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V, VOUT = 0V) Pins CIN Typ. 4 Max. (1) 6 Unit pF COUT 8 10 pF NOTE: 1. This parameter is guaranteed but not production tested. RECOMMENDED OPERATING CONDITIONS Symbol VCC Description Power Supply Voltage Min. 3 Max 3.6 VIN Input Voltage 0 5.5 V VOUT Voltage Applied to Outputs 0 VCC V TA Ambient Operating Temperature – 40 85 °C PIN DESCRIPTION 2 Pin Names OEA, OEB I/O I Description Output Enable INA, INB I Clock Inputs OAn, OBn O Clock Outputs MON O Monitor Outputs (does not 3-state) Unit V QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V Symbol VIH Parameter Input HIGH Voltage Test Conditions Guaranteed Logic HIGH for Inputs Min. 2 Typ.(1) — Max. 5.5 Unit V VIL Input LOW Voltage Guaranteed Logic LOW for Inputs –0.5 — 0.8 V VIC Clamp Diode Voltage (3) Vcc = Min., IIN = -18mA VOH Output HIGH Voltage Vcc = Min., IOH = -100µA VOL Output LOW Voltage — –0.7 –1.2 V Vcc – 0.2 — — V Vcc = Min., IOH = -8mA 2.4 — — V Vcc = Min., IOL = 100µA — — 0.2 V Vcc = Min., IOL = 6mA — — 0.4 V Vcc = Min., IOL = 8mA — — 0.5 V Vcc = Max., VIN = Vcc or GND — — ±1 µA IIN Input Leakage Current IOZ Output Leakage Current Vcc = Max., VOUT = Vcc or GND — — ±1 µA IOFF Input Power Off Leakage Vcc = 0V, VIN = Vcc or GND — — ±1 µA IODH Output HIGH Current (2) Vcc = 3.3V, VIN = VIH or VIL, VO = 1.5V –30 –100 –200 mA IODL Output LOW Current (2) Vcc = 3.3V, VIN = VIH or VIL, VO = 1.5V 30 100 200 mA IOS Short Circuit Current – 60 — — mA ROUT Output Resistance — 28 — Ω (2,3) (4) Vcc = Max., VOUT = GND Vcc = Min NOTES: 1. Typical values are at VCC = 3.3V, TA = 25°C. 2. Not more than one output should be used to test this high power condition. Duration is less than one second. 3. Guaranteed by design but not tested. 4. Output resistance represents the total output impedence of the logic device and includes added series termination resistance. POWER SUPPLY CHARACTERISTICS Symbol ICC Parameter Quiescent Power Supply Current Test Conditions (1) VCC = Max., VIN = GND or Vcc Typ. (3) 0.01 Max. 100 Unit µA ∆ICC Supply Current per Input HIGH VCC = Max., VIN = Vcc – 0.6V, f = 0MHz 0.1 30 µA ICCD Dynamic Power Supply Current per Output (2) 65 100 µA/MHz IC Total Power Supply Current Examples (2,4) VCC = Max., OEA = OEB = GND Outputs Toggling at 50% duty cycle VCC = Max., VIN = GND or Vcc OEA = OEB = GND 50% duty cycle, fI = 10MHz VIN = GND or 3V five outputs toggling VCC = Max., VIN = GND or Vcc OEA = OEB = GND 50% duty cycle, fI = 2.5MHz VIN = GND or 3V All outputs toggling 3.3 5.2 mA 3.3 5.2 mA 1.8 2.9 mA 1.8 2.9 mA NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Guaranteed by design but not tested. CL = 0pF. 3. Typical values are for reference only. Conditions are VCC = 3.3V, TA = 25°C. 4. IC = ICC + (∆ICC)(DH)(NI) + ICCD (fO)(NO) where: DH = Input Duty Cycle NI = Number of TTL HIGH inputs at DH fO = Output Frequency NO = Number of outputs at fO 3 QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE SKEW CHARACTERISTICS OVER OPERATING RANGE TA = -40°C to +85°C, VCC = 3.3V ± 0.3V CLOAD = 50pF (no resistor) QS532805 Parameter (1) Symbol QS532805B (3) QS532805A Min. Max. Min. Max. Min. Max. Unit tSK(01) Skew between all outputs, same transition, same bank — 0.7 — 0.7 — 0.7 ns tSK(02) Skew between two outputs, same transition, different banks — 0.9 — 0.9 — 0.9 ns tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH) — 1 — 0.7 — 0.5 ns tSK(T) Part-to-part skew (2) — 1.5 — 1 — 1 ns NOTES: 1. This parameter is guaranteed but not production tested. Skew parameters apply to propagation delays only. 2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading package, and speed grade. 3. The B speed grade is only available in the QSOP package. SWITCHING CHARACTERISTICS OVER OPERATING RANGE TA = -40°C to +85°C, VCC = 3.3V ± 0.3V CLOAD = 50pF (no resistor) QS532805 Symbol tPLH tPHL tR tF tPZL tPZH tPLZ tPZH Parameter (1,2) QS532805B (4) Min. Max. Min. Max. Min. Max. Unit 1.5 6.5 1.5 5.8 1.5 5.2 ns — 2 — 2 — 2 ns — 2 — 2 — 2 ns 1.5 8 1.5 8 1.5 6.5 ns 1.5 7 1.5 7 1.5 6 ns Propagation Delay Output Rise Time, 0.8V to 2V (3) Output Fall QS532805A Time, 2V to 0.8V (3) Output Enable Time Output Disable Time NOTES: 1. Minimums guaranteed but not production tested. 2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation delays do not imply limit skew. 3. This parameter is guaranteed but not production tested. 4. The B speed grade is only available in the QSOP package. 4 QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS Parameter Tested Switch Position tPLZ , tPZL Closed All Others Open 500Ω V CC 6.0 V V IN V OUT Pulse Generator DUT 50Ω 50pF 500Ω Pulse generator for all pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 3V 3V 1.5V INPUT 0V tPLH 1.5V INPUT tPHL 0V V OH 2.0V 1.5V 0.8V V OL OUPUT tR tPHL tPLH V OH OUPUT 1.5V V OL tF tSK(p) = t PHL - tPLH PROPAGATION DELAY PULSE SKEW — tSK(P) 3V 3V 1.5V INPUT 1.5V INPUT 0V 0V tPHL1 tPLH1 tPHLA tPLHA V OH V OH 1.5V OUPUT 1 OUPUT A 1.5V V OL tSK(01) tSK(01) V OL OUPUT 2 tSK(02) tSK(02) V OH OUPUT B 1.5V 1.5V V OL V OL tPLH2 tPLHB tPHL2 tSK(01) = t PLH2 - tPLH1 or tPHL2 - t PHL1 tPHLB tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA OUTPUT SKEW (SAME BANK) — tSK(O1) ENABLE OUPUT SKEW (DIFFERENT BANKS) — tSK(O2) DISABLE 3V 3V CONTROL INPUT 1.5V 0V tPLH1 tPLZ tPHL1 V OH 3V SWITCH CLOSED PART 1 O UTPUT 1.5V V OL tPHZ tSK(t) 0.3V V OH SWITCH OPEN 1.5V 0.3V V OL tPZH OUTPUT NORMALLY HIG H 1.5V INPUT 0V tPZL OUTPUT NORM ALLY LOW V OH 1.5V tSK(t) PART 2 O UTPUT V OH 1.5V V OL 0V tPLH2 tPHL2 tSK(t) = t PLH2 - tPLH1 or tPHL2 - tPHL1 PART-TO-PART SKEW — tSK(T) ENABLE AND DISABLE TIMES 5 QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION QS XXXX XX Device Type Package Q SO Quarter Size Small Outline Pacakge (SO20-8) Small Outline IC (SO20-2) 532805 Guaranteed Low Skew 3.3V CMOS Clock Driver/Buffer 532805A (532805B) (QSOP package only) CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. 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