NTE7209 Integrated Circuit Vertical Output w/Bus Control Support for TV and CRT Displays Description: The NTE7209 is a vertical deflection output integrated circuit in a 7-Lead Staggered SIP type pack‐ age designed for high image quality TV and CRT displays that supports the use of a bus control sys‐ tem signal processing IC. The sawtooth wavweform from the bus control system signal processing IC can directly drive the deflection yoke (including the DC component). Color TV vertical deflection system adjustment functions can be controlled over a bus system by connecting the NTE7209 to vari‐ ous bus control system signal processing ICs. Features: D Built-In Pump-Up Circuit for Low Power Dissipation D Vertical Output Circuit D Thermal Protection Circuit Absolute Maximum Ratings: (TA = +25°C unless otherwise specified) Pump-Up Block Supply Voltage, +B2max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45V Output Block Supply Voltage, +B6max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92V Allowable Power Dissipation (Mounted on an arbitrarily large heat sink), Pdmax . . . . . . . . . . . . 9W Deflection Output Current, I5max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5 to +1.5Ap-o Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20° to +85°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40° to +150°C Thermal Resistance, Junction-to-Case, RthJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3°C/W Recommended Operating Conditions: (TA = 25°C, unless otherwise specified) Parameter Min Typ Max Unit +B2 - 30 - V Operating Supply Voltage Range +B2op 16 - 43 V Deflection Output Current I5P-P - - 2.2 AP-P Min Typ Max Unit Recommended Supply Voltage Symbol Test Conditions Electrical Characteristics: (+B2 = 24V, TA = 25°C, unless otherwise specified) Parameter Deflection Output Saturation Voltage Lower Symbol Test Conditions Vsat5-4 I5 = 1.1A - - 15 V Vsat6-5 I5 = -1.1A - - 3.5 V Pump-Up Charge Saturation Voltage Vsat3-4 I3 = 20mA - - 1.8 V Pump-Up- Discharge Saturation Voltage Vsat2-3 I3 = -1.1A - - 3.2 V Idl 20 - 50 mA Vmid 14 15 16 V Upper Idling Current Midpoint Voltage Note 1. Current flowing into the IC is positive (+) and current flowing out is negative (-). Pin Connection Diagram (Front View) 7 Non-Inverting Input 6 Output Stage VCC 5 Vertical Output 4 GND 3 Pump-Up Output 2 VCC 1 Inverting Input .409 (10.4) Max .170 (4.5) .590 (15.0) .340 (8.8) 1 .870 (22.3) 7 0.01 (0.45) .050 (1.27) .020 (0.60) .200 (5.08)