NTE NTE7153

NTE7153
Integrated Circuit
Vertical Deflection Output Circuit
Description:
The NTE7153 is a vertical deflection output integrated circuit in a 7–Lead SIP type package designed
for use in TV and CRT displays with excellent image quality that use a BUS control system signal processing IC. This device can drive the direct (even including a DC component) deflection yoke with the
sawtooth wave output from the BUS control system signal processing IC. Because the maximum
deflection current is 2.2AP–P, the NTE7153 is suitable for use in large screen sets.
Features:
D Low Power Dissipation due to Built–In Pump–Up Circuit
D Vertical Output Circuit
D Thermal Protection Circuit Built–In
D Excellent Crossover Characteristics
D DC Coupling Possible
Absolute Maximum Ratings: (TA = +25°C unless otherwise specified)
Maximum Supply Voltage, VCC6 max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34V
Output Block Supply Voltage, VCC3 max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70V
Deflection Output Current, I2max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.5 to +1.5AP–O
Allowable Power Dissipation (With Arbitraily Large Heat Sink), PDmax . . . . . . . . . . . . . . . . . . . . 9W
Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20° to +85°C
Storage Temperature Range, Tstgv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40° to +150°C
Thermal Resistance, Junction–to–Case, RthJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4°C/W
Recommended Operation Conditions: (TA = +25°C unless otherwise specified)
Parameter
Recommended Supply Voltage
Operating Supply Voltage Range
Recommended Deflection Output Current
Symbol
Test Conditions
Min
Typ
Max
Unit
VCC6
–
24
–
V
VCC6 op
16
–
33
V
I2P–P
–
–
2.2
AP–P
Electrical Characteristics: (VCC6 = 24V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Pump–Up Charge Saturation Voltage
VS7–1
I7 = 20mA
–
–
1.8
V
Pump–Up Discharge Saturation Voltage
VS6–7
I7 = –1.1A
–
–
3.2
V
Deflection Output Saturation Voltage (Lower)
VS2–1
I2 = 1.1A
–
–
1.5
V
Deflection Output Saturation Voltage (Upper)
VS3–2
I2 = –1.1A
–
–
3.5
V
IDL
35
–
65
mA
VMID
11
12
13
V
Idling Current
Midpoint Voltage
Pin Connection Diagram
(Front View)
7 Pump–Up Output
6 VCC
5 Inverting Input
4 Non–Inverting Input
3 Output Stage VCC
2 Ver. Output
1 GND
.708 (18.0)
.118 (3.0)
.590
(15.0)
.527
(13.4)
1
.425
(10.8)
7
.228
(5.8)
.100 (2.54)