VISHAY SILICONIX www.vishay.com Power MOSFETs Device Application Note AN608A Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance INTRODUCTION This note is part of a series of application notes that define the fundamental behavior of MOSFETs, both as standalone devices and as switching devices implemented in a Switch Mode Power Supply (SMPS). Vishay Application Note AN-605 [1] provides a basic description of the MOSFET and the terminology behind the device, including definitions and physical structure. AN-850 [2] provides a broad, physical description of the switching process. This application note goes into more detail on the switching behavior of the MOSFET when used in a practical application circuit and attempts to enable the reader / designer to choose the right device for the application using the minimum available information from the datasheet. The note goes through several methods of assessing the switching performance of the MOSFET and compares these methods against practical results. Several definitions used within the text are drawn from application note AN-605. VDS Cgd Ig Igs Cgs Fig. 1 - An Equivalent MOSFET Gate Circuit Showing Just Cgs, Cgd, and Rg Using Capacitance V GS - V gs I g = -----------------------Rg (1) I g = I gs + I gd (2) dV gs I gs = C gs x ------------dt (3) Since VDS is fixed d V gs – V DS I gd = C gd x ---------------------------------dt dVgs = C gd x ------------dt V GS - V gs I g = ------------------------ = I gs + I gd Rg (4) therefore dVgs dV gs I g = C gs ------------- + C gd ------------dt dt If a step input is applied at VGS, then the following holds true: dV gs = C gs + C gd ------------dt (5) dV gs dt ------------------------- = ----------------------------------------------V GS - V gs R g x C gs + C gd (6) and Revision: 16-Feb-16 Document Number: 73217 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE The voltage VGS is the actual voltage at the gate of the device, and it is this point that should be considered when analyzing the switching behavior. Throughout this note upper case subscripts will refer to rated or applied voltages and currents, while measured or time varying quantities will be designated by lower case subscripts. For example the variable gate drain capacitance is designated as Cgd while its corresponding charge will be designated as QGD. Igd Vgs VGS SWITCHING THE MOSFET IN ISOLATION To get a fundamental understanding of the switching behavior of a MOSFET, it is best first to consider the device in isolation and without any external influences. Under these conditions, an equivalent circuit of the MOSFET gate is illustrated in Fig. 1, where the gate consists of an internal gate resistance (Rg), and two input capacitors (Cgs and Cgd). With this simple equivalent circuit it is possible to obtain the output voltage response for a step gate voltage. Rg Device Application Note AN608A www.vishay.com Vishay Siliconix Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance giving t -In V GS - Vgs = ----------------------------------------------- + K R g x C gs + C gd V gs = V GS - K x e -t ---------------------------------------------R g x C gs + C gd Ids (7) V gs (8) V gp at t = 0 s, VGS = 0 V, solving for K, V TH -t --------------------------------------------- R g x C gs + C gd V gs = V GS 1 - e (9) V ds t1 We define two parameters RG and Ciss to simplify the equations. RG is the effective total gate resistance defined as the sum of internal gate resistance Rg of the MOSFET and any external resistance Rgext that is part of the gate drive circuitry. Ciss is the effective input capacitance of the MOSFET as seen by the gate drive circuit. t3 t2 Fig. 2 - Turn-On Transient of the MOSFET 1 -------------------x ln V TH ---------1 V GS (11) 1 t 2 = R G C iss x ln -------------------- V gp 1 - ---------V GS (12) V DS t 3 = R G C gd x -------------------------V GS - V gp (13) t 1 = R G C iss RG = Rg + Rgext and Ciss = Cgs + Cgd Rewriting equation (9) with effective values of gate resistance and capacitance e t - -----------------R G C iss V gs = 1 - ---------V GS and In most cases the parameter of importance is not the actual gate voltage but the time taken to reach it. t = R G C iss 1 x ln -------------------- V gs 1 - ---------V GS (10) This gives accurate t1 and t2 when using datasheet values, but the time period t3 is difficult to calculate since Cgd changes with Vds. During t3, gate voltage Vgs is constant at Vgp and all of the gate current goes to discharge Cgd from VDS to almost zero. The drain source voltage across the MOSFET when conducting full load current is considered negligible compared to VDS voltage across the MOSFET when it is off. Using the same principles for turn-off, the formulas for the switching transients are given below: V GS t 4 = R G C iss x ln ---------- V gp (14) V DS t 5 = R G C gd x ---------V gp (15) V gp t 6 = R G C iss ln ---------- V TH (16) Document Number: 73217 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE While the RC circuit of Fig. 1 is rather simple, when the MOSFET is considered with additional parasitics, it becomes increasingly difficult to manipulate these equations manually. Therefore a method of analyzing a practical circuit is required. If the second order or parasitic components are ignored, then it is possible to come up with analytical solutions for formulas for the turn-on and turn-off time periods of the MOSFET. These are given in equations (11) through to (16) and the resulting waveforms are shown in Fig. 2 and Fig. 3. These equations are based on those developed in [3], VTH is the MOSFET threshold voltage, and Vgp is the gate plateau voltage. Revision: 16-Feb-16 Time Device Application Note AN608A www.vishay.com Vishay Siliconix In this instance, t4 and t6 can be calculated accurately, but it is the formula for t5 which is more difficult to solve, since during this time period VDS will change, causing Cgs to also change. Therefore some method is required to calculate t3 and t5 without using the dynamic Cgd. Ids V gs V ds Gate Source Voltage (V) Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance QG V GS QGD QGS V gp Miller Plateau Gate Charge (nC) V gp Fig. 4 - Sketch Showing Breakdown of Gate Charge V TH t4 t5 t6 Time Fig. 3 - Turn-Off Transient of the MOSFET Using Gate Charge to Determine Switching Time Looking at the gate charge waveform in Fig. 4, QGS is defined as the charge from the origin to the start of the Miller Plateau Vgp; QGD is defined as the charge from Vgp to the end of the plateau; and QG is defined as the charge from the origin to the point on the curve at which the driving voltage VGS equals the actual gate voltage of the device. [4] Revision: 16-Feb-16 It should be noted that once the plateau is finished (when Vds reaches its on-state value), Cgd becomes constant again and the bulk of the current flows into Cgs. The gradient is not as steep as it was in the first period t2, because Cgd is much larger and closer in magnitude to that of Cgs. Combination of Gate Charge and Capacitance to Obtain Switching Times The objective of this note is to use datasheet values to predict the switching times of the MOSFET and hence allow the estimation of switching losses. Since it is the time from the end of t1 to the end of t3 that causes the turn-on loss, it is necessary to obtain this time (Fig. 2). Combining 11 and 12 it is possible to obtain the rise time of the current (tir = t2 - t1) and because Vds stays constant during this time then it is possible to use the specified datasheet value of Ciss at the appropriate VDS value. t ir = t 2 - t 1 = R G C iss at V DS V GS - V TH x ln --------------------------- V GS - V gp (17) Document Number: 73217 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE The rise in Vgs during t2 (Fig. 2) is brought about by charging Cgs and Cgd. During this time Vds does not change and as such Cgd and Cds stay relatively constant, since they vary as a function of Vds. At this time Cgs is generally larger than Cgd and therefore the majority of drive current flows into Cgs rather than into Cgd. This current, through Cgd and Cds, depends on the time derivative of the product of the capacitance and its voltage. The gate charge can therefore be assumed to be QGS. The next part of the waveform is the Miller Plateau. It is generally accepted that the point at which the gate charge figure goes into the plateau region coincides with the peak value of the drain current. However, the knee in the gate charge actually depends on the product (Cgd x Vgd) with respect to time [4]. This means if there is a small value of drain current and large value of output impedance, then IDS can actually reach its maximum value after the left knee occurs. However, it can be assumed that the maximum value of the current will be close to this knee point and throughout this application note it is assumed that the gate voltage at the knee point corresponds to the load current, IDS. The slope of the Miller Plateau is generally shown to have a zero, or a near-zero slope, but this gradient depends on the division of drive current between Cgd and Cgs. If the slope is non-zero then some of the drive current is flowing into Cgs. If the slope is zero then all the drive current is flowing into Cgd. This happens if the Cgd x Vgd product increases very quickly and all the drive current is being used to accommodate the change in voltage across Cgd. As such, QGD is the charge injected into the gate during the time the device is in the Miller Plateau. Device Application Note AN608A www.vishay.com Vishay Siliconix Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance It is often stated in the literature that VTH + IDS/gfs can be substituted for Vgp. While technically correct, the users should be aware that transconductance is not constant but varies with load. The datasheet value for VTH is specified at a low value of IDS, at which the Vgp tends to be higher than the calculated value. Using the value of Vgp from the gate charge curves is recommended for accurate results. Comparing Equations with Datasheet Values The definition of the turn-on and turn-off times given in the datasheet can be seen in Fig. 5. These definitions can be equated to the equations described above and are shown here: t d on t 1 + t ir (21) t r t vf (22) t d off t 4 (23) t f t vr (24) It is difficult to use a value of Cgd for the fall time period of Vds (tvf = t3). Therefore if the datasheet value of gate charge QGD is used and divided by the voltage swing seen on the drain connection VDS then this effectively gives a value for Cgd based on the datasheet transient. Q GD D V DS t vf = t 3 = R G x ------------------- x ------------------------------V DS(D) V GS - V gp (18) Similarly for the turn-off transition, the voltage rise time (tvr = t5) is: t vr Q GD D V DS = t 5 = R G x ------------------- x ---------V DS D V gp td(off) td(on) V gs tr 90% (19) The current fall time (tif = t6) is: t ir = t 6 = R G C iss at V 10% DS V gp x ln ---------- V TH (20) MIN. TYP. MAX. Circuit Conditions UNIT VDS 10.5 12 13.5 VGS 4.5 5 5.5 VDS(D) 13.5 15 16.5 V IDS(D) 9 10 11 A RDS(on) 1.45 1.8 2.15 VTH 1.1 1.7 2.2 Vgp 2.4 2.6 2.8 Ciss at VDS 2880 3600 4320 Ciss at 0 V 3200 4000 4800 QGD gfs m 16 A 360 t1 (equation 11) 275 526 800 tir (equation 17) 197 403 755 pF tvf (equation 18) 378 469 549 685 919 1175 3 4 5 nC 1.3 2.5 tvr (equation 19) 331 433 530 S tif (equation 20) 236 538 1222 td(on) (= t1 + tir) 472 929 1555 24 tr (= tvf) 378 469 549 td(off) (= t4) 685 919 1175 331 433 530 tir - 330 - tvf - 560 - tvr - 648 - tif - 250 - 100 120 - 12 - 10 20 td(off) - 30 60 - Revision: 16-Feb-16 15 350 0.3 tr tf 14 340 Calculations V Datasheet Values for Switching Times td(on) IDS Rgext t4 (equation 14) 80 8 16 V ns tf (= tvr) ns Measured Values ns Document Number: 73217 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE Rg Fig. 5 - Sketch Showing Definition of Turn-On and Turn-Off Times TABLE 2 - MEASUREMENT OF SWITCHING TRANSIENT: SiRA04DP TABLE 1 - WORKED EXAMPLE FOR SWITCHING TRANSIENTS: SiRA04DP MOSFET PARAMETERS V ds tf Device Application Note AN608A www.vishay.com Vishay Siliconix Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance Comparing Equations with Measured Switching Transients The datasheet switching transients are measured with a resistive load and are not truly representative of a practical circuit. As such the device will not behave according to the ideal operation described above. Therefore, calculations were done for actual circuit conditions shown below. For purposes of illustration, a large value of Rgext is selected here to deliberately slow down the switching transient. The aim is to reduce excessive ringing in the waveforms and measure the rise and fall times more accurately. VDS = 12 V, IDS = 15 A, VGS = 5 V, and Rgext = 350 The minimum switching transients were calculated using the appropriate value of the parameters, which resulted in producing the shortest switching transient value. In some circumstances this meant that the maximum value of a parameter was used to calculate the minimum switching transient and vice versa for the maximum switching transients. Actual switching waveforms were measured, and these are shown in Fig. 6 and Fig. 7. These switching transients are for the SiRA04 turned on and off with an inductive load. The voltage fall time tvf was measured starting from the time current reached the peak IDS. The dip prior to current peak is the di/dt drop in the parasitic inductances of the circuit and should be excluded from the voltage fall time. Table 2 also shows the comparison between the calculations and the measured transients. It is seen that the measured voltage transients are relatively on the higher side while the current rise and fall times are lower than calculated. While there is good agreement between calculated and measured transients for voltage, the difference for current transients is wider. The differences are also more pronounced at turn off The current transients were calculated using VTH which is based on a low IDS value of 250 μA. The oscilloscope measurements lack the resolution to make measurements at that level. For switching loss calculations, the extra time interval may be ignored as the current is quite low. Fig. 7 - Measured Current and Voltage Turn-Off Switching Transient Limitations of the Driving Circuit The switching times of the MOSFET are affected not only by the parasitic elements, but also by the driving circuit. Under the conditions described above, it was assumed that the gate circuit does not limit the switching performance of the power MOSFET. For example, with a MOSFET p-channel and n-channel driver, it is possible that the theoretical current into the gate will be larger than that which the driver is able to supply. There are several ways in which a MOSFET driver can be realized and this goes beyond the study of this application note. The formulas described in the text are used to gauge the switching times and therefore estimate the switching losses without navigating complex formulas, models, and expensive simulation software. However, large discrepancies between the calculated and the measured current transients can also occur because the calculations assume an ideal situation with respect to source inductance of the package. Therefore, further consideration has to be taken for the current rise and fall times, and this is described below. g fs L src I DS V src = L src ------------ = --------------------------------- x t R G C iss at V DS Fig. 6 - Measured Current and Voltage Turn-On Switching Transient Revision: 16-Feb-16 V GS - V TH x 1 - e t - --------------------------------- R G C iss at V DS (25) Document Number: 73217 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE Current Transients One major parameter that should be considered into the equations is the package inductance of the MOSFET. This will slow the current transient and can be taken into account with relative ease if a few assumptions are made. Since the load current will generally be much larger than the gate current, it is assumed that all the current through the package inductance will be IDS. Therefore it can be shown that the voltage across the package inductance of the MOSFET during turn-on will be: Device Application Note AN608A www.vishay.com Vishay Siliconix Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance This is the voltage that occurs from the current transient and as such subtracts from the gate voltage and hence slows down the current transient. It has been shown in [5] that there is an upper limit to Vsrc, given by VTH. In the test set up, source inductance was kept to the minimum with good routing practices, and also a large value of Rgext was used for illustration purposes. Therefore, source inductance drop and its influence on current rise and fall times are not significant. However, in real applications with low gate resistances, effects of Vsrc need to be taken into account as explained below. If equation 25 is subtracted from VGS and solved for time, the tir transient duration is: t ir = R G C iss at V DS x g fs L src V GS - V TH ln 1 + --------------------------------- x --------------------------R V GS - V gp G C iss at V DS (26) CONCLUSION This application note shows good approximations for the rise and fall times of the power MOSFET, when evaluated in isolation. Datasheet values for the formulas derived can be used to get a reasonable indication of the switching performance of the MOSFET as well as the switching losses. However, as illustrated in Fig. 2 and Fig. 3, the ideal switching transients will always be shorter than those actually achieved, so the maximum parameters from the datasheet should always be used to give realistic results. REFERENCES 1. Vishay AN-605, “Power MOSFET Basics: Understanding MOSFET Characteristics” www.vishay.com/doc?71933 2. Vishay AN-850, “Power MOSFET Basics: Understanding the Turn ON Process.” www.vishay.com/doc?68214 3. B. J. Baliga, “Power Semiconductor Devices” Applying the same principle for tif results in a current transient as follows: t if = R G C iss at V DS (27) Document Number: 73217 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE Revision: 16-Feb-16 5. Sanjay Havanur, “Quasi Clamped Inductive Switching Behavior of Power MOSFETs”, PESC Proceedings, 2008, pp 4349 - 4354. x g fs L src V GP ln 1 + --------------------------------- x ---------R G C iss at V V TH DS 4. “Gate Charge Principles and Usage”, Power Electronics Technology Europe. Issue 3, 2002.