IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS IDT74ALVC16244A FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V µ W typ. static) • CMOS power levels (0.4µ • Rail-to-Rail output swing for increased noise margin • Available in SSOP, TSSOP, and TVSOP packages This 16-bit buffer/driver is built using advanced dual metal CMOS technology. The ALVC16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. The ALVC16244A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. DRIVE FEATURES: APPLICATIONS: • High Output Drivers: ±24mA • Suitable for heavy loads • 3.3V high speed systems • 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 OE 1 3 OE 1A 1 47 2 1A 2 46 3 44 5 43 6 1A 3 1A 4 2 OE 48 2A 1 41 8 40 9 38 11 37 12 2A 2 2A 3 2A 4 1Y 1 3A 1 1Y 2 3A 2 1Y 3 3A 3 1Y 4 3A 4 25 36 13 35 14 33 16 32 17 3Y 1 3Y 2 3Y 3 3Y 4 4 OE 24 2Y 1 4A 1 30 19 4Y 1 2Y 2 4A 2 29 20 4Y 2 2Y 3 4A 3 27 22 2Y 4 4A 4 26 23 4Y 3 4Y 4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE MARCH 1999 1 © 1999 Integrated Device Technology, Inc. DSC-4698/1 IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol Description VTERM(2) Max Unit Terminal Voltage with Respect to GND –0.5 to +4.6 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C –50 to +50 mA ±50 mA 1 OE 1 48 2O E 1Y 1 2 47 1A 1 1Y 2 3 46 1A 2 GND 4 45 GND 1Y 3 5 44 1A 3 1Y 4 6 43 1A 4 V CC 7 42 V CC 2Y 1 8 41 2A 1 2Y 2 9 40 2A 2 G ND 10 39 GND 2Y 3 11 38 2A 3 2Y 4 12 37 2A 4 3Y 1 13 36 3A 1 CIN Input Capacitance VIN = 0V 5 7 pF 3Y 2 14 35 3A 2 COUT Output Capacitance VOUT = 0V 7 9 pF GND 15 34 GND COUT I/O Port Capacitance VIN = 0V 7 9 pF 3Y 3 16 33 3A 3 3Y 4 17 32 3A 4 V CC 18 31 V CC 4Y 1 19 30 4A 1 4Y 2 20 29 4A 2 GND 21 28 GND 4Y 3 22 27 4A 3 4Y 4 23 26 4A 4 4 OE 24 25 3 OE IOUT DC Output Current IIK Continuous Clamp Current, VI < 0 or VI > VCC IOK Continuous Clamp Current, VO < 0 –50 mA ICC ISS Continuous Current through each VCC or GND ±100 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Symbol Conditions Typ. Max. NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names Description xOE 3-State Output Enable Inputs (Active LOW) xAx Data Inputs xYx 3-State Outputs FUNCTION TABLE(1) SSOP/ TSSOP/ TVSOP TOP VIEW Inputs xOE xAx xYx L H H L L L H X Z NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High-Impedance 2 Outputs Unit IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V IIH Input HIGH Current VCC = 3.6V VI = VCC — — ±5 µA IIL Input LOW Current VCC = 3.6V VI = GND — — ±5 µA IOZH High Impedance Output Current VCC = 3.6V VO = VCC — — ±10 µA IOZL (3-State Output pins) VO = GND — — ±10 VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ∆ICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 0.1 — 40 mV µA Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND — — 750 µA NOTE: 1. Typical values are at VCC = 3.3V, +25°C ambient. OUTPUT DRIVE CHARACTERISTICS Symbol VOH VOL Test Conditions(1) Parameter Output HIGH Voltage Output LOW Voltage Min. Max. Unit V VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — VCC = 2.3V IOH = – 6mA 2 — VCC = 2.3V IOH = – 12mA 1.7 — VCC = 2.7V 2.2 — VCC = 3V 2.4 — VCC = 3V IOH = – 24mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 6mA — 0.4 IOL = 12mA — 0.7 VCC = 2.7V IOL = 12mA — 0.4 VCC = 3V IOL = 24mA — 0.55 V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. 3 IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OPERATING CHARACTERISTICS, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance Outputs enabled CPD Power Dissipation Capacitance Outputs disabled VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Test Conditions Typical Typical Unit CL = 0pF, f = 10Mhz 16 19 pF 4 5 SWITCHING CHARACTERISTICS(1) VCC = 2.5V ± 0.2V Symbol Parameter tPLH Propagation Delay tPHL xA to xBx tPZH Output Enable Time tPZL OE to xBx tPHZ Output Disable Time tPLZ OE to xBx tSK(o) Output Skew(2) VCC = 3.3V ± 0.3V Max. Min. Max. Min. Max. Unit 1 4.4 — 4 1 3.6 ns 1 6.3 — 6 1 5 ns 1 5.8 — 5.2 1 5 ns — — — — — 500 ps NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 VCC = 2.7V Min. IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS VCC(1)= 3.3V±0.3V VCC(1)= 2.7V Symbol V IH VT 0V SAME PHASE INPU T TRAN SITION VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF t PLH t PHL tPLH t PHL V OH VT VOL OU TPUT V IH VT 0V OPPOSITE PHASE INPU T TRAN SITION ALV C Link Propagation Delay V LOAD V CC Open 500 Ω (1, 2) V IN CON TROL IN PUT V OUT Pulse Generator DISABLE ENABLE GND D .U .T. t PZL OUTPU T SW ITCH NOR MALLY CLO SED LOW t PZ H OU TPUT SW ITCH NORMALLY O PE N H IGH 500 Ω RT CL ALVC Link Test Circuit for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. VLOAD Disable High Enable High GND All Other Tests Open V LOAD/2 V OL + V LZ V OL t PHZ V OH V OH - V HZ VT 0V 0V Enable and Disable Times SWITCH POSITION Open Drain Disable Low Enable Low V LOAD/2 VT NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. DATA INPUT Switch 0V t PLZ ALV C Link NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns. Test V IH VT tSU V IH VT 0V V IH VT 0V V IH VT 0V V IH VT 0V tH TIMING INPU T tR EM ASYNC HRON OU S CON TROL SYNC HRON OU S CON TROL t SU tH ALVC Link Set-up, Hold, and Release Times V IH INPU T VT 0V tPHL1 t PLH1 LOW -H IGH -LOW PULSE V OH OUTPUT 1 tSK (x) VT V OL t SK (x) tW V OH HIGH-LOW -HIGH PULSE VT V OL OUTPUT 2 t PLH2 VT ALVC Link Pulse Width t PHL2 t SK (x) = t PLH2 - tPLH1 or t PH L2 - t PHL1 Output Skew - tSK(X) VT ALVC Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74ALVC16244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX X ALVC Bus-Hold Temp. Range XX Family XXX XX Device Type Package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 PV PA PF Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 244A 16-Bit Buffer/Driver with 3-State Outputs 16 Double-Density, ±24mA Blank No Bus-Hold 74 – 40°C to +85°C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 6 for Tech Support: [email protected] (408) 654-6459