IDT IDT74LVCH244APY

IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
IDT74LVCH244A
DESCRIPTION:
FEATURES:
The LVCH244A octal buffer/driver is built using advanced dual metal
CMOS technology. This device is organized as two 4-bit line drivers with
separate output-enable (OE) inputs. When OE is low, the device passes
data from the A inputs to the Y outputs. When OE is high, the outputs are
in the high-impedance state.
The LVCH244A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environment.
The LVCH244A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
µ W typ. static)
• CMOS power levels (0.4µ
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, QSOP, and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
1OE
1A1
1A2
1A3
1A4
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
AUGUST 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4625/1
IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
1OE
1
20
VCC
1A1
2
19
2OE
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
–50
mA
2Y4
3
18
1Y1
ICC
ISS
Continuous Current through each
VCC or GND
±100
mA
1A2
4
17
2A4
2Y3
5
16
1Y2
1A3
6
15
2A3
2Y2
7
14
1Y3
1A4
8
13
2A2
2Y1
9
12
1Y4
GND
10
11
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
Symbol
2A1
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
NOTE:
1. As applicable to the device type.
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
xAx
Data Inputs(1)
xYx
3-State Outputs
xOE
Output Enable Inputs(1) (Active LOW)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE (EACH BUFFER)(1)
Inputs
xOE
xAx
xYx
L
H
H
L
L
L
H
X
Z
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2
Outputs
IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
Symbol
VIH
VIL
Min.
Typ.(1)
Max.
Unit
VCC = 2.3V to 2.7V
1.7
—
—
V
VCC = 2.7V to 3.6V
2
—
—
VCC = 2.3V to 2.7V
—
—
0.7
VCC = 2.7V to 3.6V
—
—
0.8
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Test Conditions
V
Input Leakage Current
VCC = 3.6V
VI = 0 to 5.5V
—
—
±5
µA
IOZH
High Impedance Output Current
VCC = 3.6V
VO = 0 to 5.5V
—
—
±10
µA
IOZL
(3-State Output pins)
IOFF
Input/Output Power Off Leakage
VCC = 0V, VIN or VO ≤ 5.5V
—
—
±50
µA
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
—
–0.7
–1.2
V
VH
ICCL
ICCH
ICCZ
∆ICC
Input Hysteresis
Quiescent Power Supply Current
VCC = 3.3V
VCC = 3.6V
VIN = GND or VCC
—
—
100
—
—
10
mV
µA
3.6 ≤ VIN ≤ 5.5V(2)
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
—
—
10
500
µA
Min.
Typ.(2)
Max.
Unit
– 75
—
—
µA
VI = 0.8V
75
—
—
VI = 1.7V
—
—
—
IIH
IIL
Quiescent Power Supply Current
Variation
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol
IBHH
Parameter(1)
Test Conditions
Bus-Hold Input Sustain Current
VCC = 3V
Bus-Hold Input Sustain Current
VCC = 2.3V
Bus-Hold Input Overdrive Current
VCC = 3.6V
VI = 2V
IBHL
IBHH
IBHL
IBHHO
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3
VI = 0.7V
—
—
—
VI = 0 to 3.6V
—
—
±500
µA
µA
IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
Test Conditions(1)
Parameter
Output HIGH Voltage
Min.
Max.
Unit
VCC – 0.2
—
V
IOH = – 6mA
2
—
IOH = – 12mA
1.7
—
2.2
—
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
VCC = 2.3V
VCC = 2.7V
VCC = 3V
VOL
Output LOW Voltage
2.4
—
VCC = 3V
IOH = – 24mA
2.2
—
VCC = 2.3V to 3.6V
IOL = 0.1mA
—
0.2
VCC = 2.3V
IOL = 6mA
—
0.4
IOL = 12mA
—
0.7
VCC = 2.7V
IOL = 12mA
—
0.4
VCC = 3V
IOL = 24mA
—
0.55
V
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol
Parameter
CPD
Power Dissipation Capacitance per Buffer/Driver Outputs enabled
CPD
Power Dissipation Capacitance per Buffer/Driver Outputs disabled
Test Conditions
Typical
Unit
CL = 0pF, f = 10Mhz
47
pF
2
SWITCHING CHARACTERISTICS(1)
VCC = 2.7V
Symbol
VCC = 3.3V ± 0.3V
Parameter
Min.
Max.
Min.
Max.
Unit
tPLH
Propagation Delay
—
6.9
1.5
5.9
ns
tPHL
xAx to xYx
tPZH
Output Enable Time
—
8.6
1
7.6
ns
tPZL
xOE to xYx
tPHZ
Output Disable Time
—
6.8
1.5
5.8
ns
tPLZ
xOE to xYx
tSK(o)
Output Skew(2)
—
—
—
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
Symbol
VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
VCC(2)= 2.5V±0.2V
Unit
VLOAD
6
6
2 x Vcc
V
VIH
2.7
2.7
Vcc
V
VT
1.5
1.5
Vcc / 2
V
VLZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
30
pF
VIN
Pulse (1, 2)
Generator
GND
tPZL
OUTPUT
SWITCH
NORMALLY
VLOAD
LOW
tPZH
OUTPUT SWITCH
NORMALLY
GND
HIGH
500Ω
LVC Link
Switch
DATA
INPUT
VLOAD
TIMING
INPUT
Disable High
Enable High
GND
ASYNCHRONOUS
CONTROL
All Other Tests
Open
SYNCHRONOUS
CONTROL
VIH
VT
0V
tPHL1
tSK (x)
tSK (x)
VOH
VOH-VHZ
0V
VT
0V
tSU
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
tH
tREM
tSU
tH
Set-up, Hold, and Release Times
VOH
VT
VOL
LOW-HIGH-LOW
PULSE
VT
tW
HIGH-LOW-HIGH
PULSE
tPHL2
VT
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
tPHZ
LVC Link
VOH
VT
VOL
OUTPUT 2
VLOAD/2
VOL+VLZ
VOL
Enable and Disable Times
SWITCH POSITION
Open Drain
Disable Low
Enable Low
tPLZ
VLOAD/2
VT
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
Test
VIH
VT
0V
LVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
tPLH2
DISABLE
ENABLE
Test Circuit for All Outputs
OUTPUT 1
VIH
VT
0V
CONTROL
INPUT
CL
tPLH1
tPHL
Propagation Delay
D.U.T.
INPUT
tPLH
LVC Link
VOUT
RT
tPHL
OPPOSITE PHASE
INPUT TRANSITION
Open
500Ω
tPLH
OUTPUT
VLOAD
VCC
VIH
VT
0V
VOH
VT
VOL
SAME PHASE
INPUT TRANSITION
LVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
LVC Link
IDT74LVCH244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
X
LVC
IDT
XX
XXXX
XX
Temp. Range
Bus-Hold Device Type Package
SO
PY
Q
PG
Small Outline IC (gull wing)
Shrink Small Outline Package
Quarter Size Small Outline Package
Thin Shrink Small Outline Package
244A
Octal Buffer/Driver with 3-State Outputs, ±24mA
H
Bus-hold
74
–40°C to +85°C
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