HFA1114 850MHz Video Cable Driving Buffer November 1996 Features Description • Access to Summing Node Allows Circuit Customization The HFA1114 is a closed loop Buffer featuring user programmable gain and ultra high speed performance. Manufactured on Intersil’ proprietary complementary bipolar UHF-1 process, the HFA1114 offers a wide -3dB bandwidth of 850MHz, very fast slew rate, excellent gain flatness, low distortion and high output current. • User Programmable For Closed-Loop Gains of +1, -1 or +2 Without Use of External Resistors • Wide -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . 850MHz • Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . 2400V/µs • Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . 11ns • High Output Current . . . . . . . . . . . . . . . . . . . . . . . 60mA • Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . 0.99V/V • Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . <10ns • Standard Operational Amplifier Pinout Applications • RF/IF Processors A unique feature of the pinout allows the user to select a voltage gain of +1, -1, or +2, without the use of any external components. Gain selection is accomplished via connections to the inputs, as described in the “Application Information” section. The result is a more flexible product, fewer part types in inventory, and more efficient use of board space. Compatibility with existing op amp pinouts provides flexibility to upgrade low gain amplifiers, while decreasing component count. Unlike most buffers, the standard pinout provides an upgrade path should a higher closed loop gain be needed at a future date. For applications requiring a standard buffer pinout, please refer to the HFA1110 datasheet. • Driving Flash A/D Converters • High Speed Communications Ordering Information • Impedance Transformation • Line Driving PART NUMBER (BRAND) • Video Switching and Routing • Radar Systems • Medical Imaging Systems PKG. NO. PACKAGE HFA1114IP -40 to 85 8 Ld PDIP E8.3 HFA1114IB (H1114I) -40 to 85 8 Ld SOIC M8.15 HFA11XXEVAL Pinout TEMP. RANGE (oC) DIP Evaluation Board for High Speed Op Amps Pin Descriptions HFA1114 (PDIP, SOIC) TOP VIEW NC 1 -IN 2 +IN V- 300 8 NC 7 V+ 3 6 OUT 4 5 SN 300 - + NAME PIN NUMBER NC 1, 8 No Connection -IN 2 Inverting Input +IN 3 Non-Inverting Input V- 4 Negative Supply SN 5 Summing Node OUT 6 Output V+ 7 Positive Supply CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 5-1 DESCRIPTION File Number 3151.3 HFA1114 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS 25 - 8 25 mV Full - - 35 mV Output Offset Voltage Drift Full - 10 - µV/oC PSRR 25 39 45 - dB Full 35 - - dB PARAMETER INPUT CHARACTERISTICS Output Offset Voltage Input Noise Voltage 100kHz 25 - 9 - nV/√Hz Non-Inverting Input Noise Current 100kHz 25 - 37 - pA/√Hz 25 - 25 40 µA Full - - 65 µA Non-Inverting Input Resistance 25 25 50 - kΩ Inverting Input Resistance 25 240 300 360 Ω 25 - 2 - pF Full ±2.5 ±2.8 - V 25 0.980 0.990 1.02 V/V Full 0.975 - 1.025 V/V 25 1.96 1.98 2.04 V/V Full 1.95 - 2.05 V/V AV = +2, ±2V Full Scale 25 - 0.02 - % AV = -1 25 ±3.0 ±3.3 - V Full ±2.5 ±3.0 - V 25, 85 50 60 - mA -40oC 35 50 - mA 25 - 0.3 - Ω Non-Inverting Input Bias Current Input Capacitance Either Input Input Common Mode Range TRANSFER CHARACTERISTICS Gain AV = +1, VIN = +2V AV = +2, VIN = +1V DC Non-Linearity OUTPUT CHARACTERISTICS Output Voltage Output Current Closed Loop Output Impedance AV = -1, RL = 50Ω AV = +2, DC 5-2 HFA1114 Electrical Specifications VSUPPLY = ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS Supply Voltage Range Full ±4.5 - ±5.5 V Supply Current 25 - 21 26 mA Full - - 33 mA AV = -1 25 - 800 - MHz AV = +1 25 - 850 - MHz AV = +2 25 - 550 - MHz AV = -1 25 - 2400 - V/µs AV = +1 25 - 1500 - V/µs AV = +2 25 - 1900 - V/µs Full Power BW 5VP-P, AV = +2 25 - 220 - MHz Gain Flatness To 30MHz, AV = +2 25 - ±0.015 - dB Gain Flatness To 100MHz, AV = +2 25 - ±0.07 - dB 2nd Harmonic Distortion 50MHz, VOUT = 2VP-P 25 - -53 - dBc 3rd Harmonic Distortion 50MHz, VOUT = 2VP-P 25 - -68 - dBc 3rd Order Intercept 100MHz, AV = +2 25 - 28 - dBm 1dB Compression 100MHz, AV = +2 25 - 19 - dBm Rise Time (VOUT = 0.5V Step) AV = +2 25 - 700 - ps AV = +1 25 - 480 - ps Overshoot VOUT = 0.5V Step, AV = +2 25 - 6 - % 0.1% Settling Time VOUT = 2V to 0V 25 - 11 - ns 0.05% Settling Time VOUT = 2V to 0V 25 - 15 - ns 25 - 8.5 - ns AV = +1, 3.58MHz, RL = 150Ω 25 - 0.03 - % AV = +2, 3.58MHz, RL = 150Ω 25 - 0.02 - % AV = +1, 3.58MHz, RL = 150Ω 25 - 0.05 - Degrees AV = +2, 3.58MHz, RL = 150Ω 25 - 0.04 - Degrees PARAMETER POWER SUPPLY CHARACTERISTICS AC CHARACTERISTICS -3dB Bandwidth (VOUT = 0.2VP-P) Slew Rate (VOUT = 5VP-P) Overdrive Recovery Time Differential Gain Differential Phase 5-3 HFA1114 Application Information Closed Loop Gain Selection The HFA1114 features a novel design which allows the user to select from three closed loop gains, without any external components. The result is a more flexible product, fewer part types in inventory, and more efficient use of board space. This “buffer” operates in closed loop gains of -1, +1, or +2, and gain selection is accomplished via connections to the ±inputs. Applying the input signal to +IN and floating -IN selects a gain of +1, while grounding -IN selects a gain of +2. A gain of -1 is obtained by applying the input signal to -IN with +IN grounded. The table below summarizes these connections: CONNECTIONS GAIN (ACL) +INPUT (PIN 3) -INPUT (PIN 2) -1 GND Input +1 Input NC (Floating) +2 Input GND Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850MHz. By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50Ω , CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5Ω , CL = 340pF. RS (Ω) PC Board Layout The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! For unity gain applications, care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input. At higher frequencies this capacitance will tend to short the -INPUT to GND, resulting in a closed loop gain which increases with frequency. This will cause excessive high frequency peaking and potentially other problems as well. 10µF 80 120 160 200 240 280 320 LOAD CAPACITANCE (pF) 2. Remove the 500Ω feedback resistor (R2), and leave the connection open. 3. a. For AV = +1 evaluation, remove the 500Ω gain setting resistor (R1), and leave pin 2 floating. b. For AV = +2, replace the 500Ω gain setting resistor with a 0Ω resistor to GND. 4. Isolate Pin 5 from the stray board capacitance to minimize peaking and overshoot. The layout and modified schematic of the board are shown in Figure 2. To order evaluation boards (part number HFA11XXEVAL), please contact your local sales office. TOP LAYOUT VH 1 8 50Ω 2 7 0.1µF 10µF 1 +5V 50Ω 3 6 4 5 -5V GND 0.1µF +IN OUT X GND 360 400 The performance of the HFA1114 may be evaluated using the HFA11XX Evaluation Board, slightly modified as follows: VH R1 IN 40 Evaluation Board Driving Capacitive Loads ∞ (AV = +1) or 0Ω (AV = +2) AV = +2 FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE An example of a good high frequency layout is the Evaluation Board shown in Figure 2. Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. AV = +1 0 Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. 50 45 40 35 30 25 20 15 10 5 0 OUT V+ VL VGND VL FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT 5-4 BOTTOM LAYOUT HFA1114 Die Characteristics DIE DIMENSIONS: PASSIVATION: 63 mils x 44 mils x 19 mils 1600µm x 1130µm x 483µm Type: Nitride Thickness: 4kÅ ±0.5kÅ METALLIZATION: TRANSISTOR COUNT: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ 52 SUBSTRATE POTENTIAL (Powered Up): Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ Floating (Recommend Connection to V-) Metallization Mask Layout HFA1114 NC +IN V- -IN NC NC SN V+ OUT All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 5-5 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029