ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 ® Data Sheet August 2004 3.3V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers These Intersil RS-485/RS-422 devices are BiCMOS 3.3V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Unlike competitive devices, this Intersil family is specified for 10% tolerance supplies (3V to 3.6V). The ISL83483 and ISL83488 utilize slew rate limited drivers which reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Data rates up to 10Mbps are achievable by using the ISL83485, ISL83490, or ISL83491, which feature higher slew rates. Logic inputs (e.g., DI and DE) accept signals in excess of 5.5V, making them compatible with 5V logic families. Receiver (Rx) inputs feature a “fail-safe if open” design, which ensures a logic high output if Rx inputs are floating. All devices present a “single unit load” to the RS-485 bus, which allows up to 32 transceivers on the network. FN6052.3 Features • Operate from a Single +3.3V Supply (10% Tolerance) • Interoperable with 5V Logic • High Data Rates. . . . . . . . . . . . . . . . . . . . . up to 10Mbps • Single Unit Load Allows up to 32 Devices on the Bus • Slew Rate Limited Versions for Error Free Data Transmission (ISL83483, ISL83488) . . . . . .up to 250kbps • Low Current Shutdown Mode (ISL83483, ISL83485, ISL83491). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15nA • -7V to +12V Common Mode Input Voltage Range • Three State Rx and Tx Outputs (Except ISL83488, ISL83490) • 10ns Propagation Delay, 1ns Skew (ISL83485, ISL83490, ISL83491) • Full Duplex and Half Duplex Pinouts • Current Limiting and Thermal Shutdown for driver Overload Protection • Pb-free available Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. Applications The ISL83488, ISL83490, ISL83491 are configured for full duplex (separate Rx input and Tx output pins) applications. The ISL83488 and ISL83490 are offered in space saving 8 lead packages for applications not requiring Rx and Tx output disable functions (e.g., point-to-point and RS-422). Half duplex configurations (ISL83483, ISL83485) multiplex the Rx inputs and Tx outputs to provide transceivers with Rx and Tx disable functions in 8 lead packages. • Building Environmental Control Systems • Factory Automation • Security Networks • Industrial/Process Control Networks • Level Translators (e.g., RS-232 to RS-422) • RS-232 “Extension Cords” TABLE 1. SUMMARY OF FEATURES PART NUMBER HALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED? RECEIVER/DRIVER ENABLE? QUIESCENT ICC (mA) LOW POWER SHUTDOWN? PIN COUNT ISL83483 Half 0.25 Yes Yes 0.65 Yes 8 ISL83485 Half 10 No Yes 0.65 Yes 8 ISL83488 Full 0.25 Yes No 0.65 No 8 ISL83490 Full 10 No No 0.65 No 8 ISL83491 Full 10 No Yes 0.65 Yes 14 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Pinouts ISL83483, ISL83485 (PDIP, SOIC) TOP VIEW RO 1 R RE 2 7 DE 3 DI 4 8 6 D ISL83488, ISL83490 (PDIP, SOIC) TOP VIEW VCC VCC 1 B/Z RO 2 A/Y 5 GND R DI 3 GND 4 D ISL83491 (PDIP, SOIC) TOP VIEW 8 A NC 1 7 B RO 2 6 Z RE 3 5 Y DE 4 DI 5 Ordering Information PART NO. (BRAND) TEMP. RANGE (oC) 13 VCC R 12 A 11 B D 10 Z GND 6 9 Y GND 7 8 NC Truth Tables PACKAGE TRANSMITTING PKG. DWG. # ISL83483IB* (83483IB) -40 to 85 8 Ld SOIC M8.15 ISL83483IBZ* (83483IB) (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL83483IP -40 to 85 8 Ld PDIP E8.3 ISL83485IB* (83485IB) -40 to 85 8 Ld SOIC M8.15 ISL83485IBZ* (83485IB) (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL83485IP -40 to 85 8 Ld PDIP E8.3 ISL83488IB* (83488IB) -40 to 85 8 Ld SOIC M8.15 ISL83488IBZ* (83488IB) (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL83488IP -40 to 85 8 Ld PDIP E8.3 ISL83490IB* (83490IB) -40 to 85 8 Ld SOIC M8.15 ISL83490IBZ* (83490IB) (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL83490IP -40 to 85 8 Ld PDIP E8.3 ISL83491IB* -40 to 85 14 Ld SOIC M14.15 ISL83491IBZ* (Note) -40 to 85 14 Ld SOIC (Pb-free) M14.15 ISL83491IP -40 to 85 14 Ld PDIP E14.3 INPUTS NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. OUTPUTS RE DE DI Z Y X 1 1 0 1 X 1 0 1 0 0 0 X High-Z High-Z 1 0 X High-Z * High-Z * NOTE: *Shutdown Mode for ISL83483, ISL83485, ISL83491 RECEIVING INPUTS RE *Add “-T” suffix to part number for tape and reel packaging. 2 14 VCC OUTPUT DE DE Half Duplex Full Duplex A-B RO 0 0 X ≥ +0.2V 1 0 0 X ≤ -0.2V 0 0 0 X Inputs Open 1 1 0 0 X High-Z * 1 1 1 X High-Z NOTE: *Shutdown Mode for ISL83483, ISL83485, ISL83491 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Pin Descriptions PIN FUNCTION RO Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating). RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. GND Ground connection. A/Y Noninverting receiver input and noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. B/Z Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. A Noninverting receiver input. B Inverting receiver input. Y Noninverting driver output. Z Inverting driver output. VCC System power supply input (3V to 3.6V). NC No Connection. 3 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Typical Operating Circuits ISL83483, ISL83485 +3.3V +3.3V + 8 0.1µF 0.1µF + 8 VCC 1 RO VCC R D 2 RE B/Z 7 3 DE A/Y 6 4 DI RT RT DI 4 7 B/Z DE 3 6 A/Y RE 2 RO 1 R D GND GND 5 5 ISL83488, ISL83490 +3.3V +3.3V + 1 0.1µF 0.1µF + 1 VCC VCC RT A 8 2 RO R B 7 RT Z 6 3 DI Y 6 Z D 7 B Y 5 D 5 RO 2 R 8 A GND GND 4 4 DI 3 ISL83491 +3.3V +3.3V + 13, 14 VCC 2 RO R A 12 0.1µF 0.1µF RT + 13,14 VCC 9 Y B 11 D 10 Z 3 RE DE 4 RE 3 4 DE Z 10 5 DI DI 5 Y 9 D GND 6, 7 4 RT 11 B R 12 A GND 6, 7 RO 2 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V Input/Output Voltages A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Thermal Resistance (Typical, Note 1) θJA (oC/W) 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . 140 14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 130 14 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 105 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC- Lead Tips Only) Operating Conditions Temperature Range ISL834XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25oC, Note 2 Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS Full - - VCC V Full 2 2.7 - V DC CHARACTERISTICS Driver Differential VOUT (no load) VOD1 Driver Differential VOUT (with load) VOD2 Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States RL = 100Ω (RS-422) (Figure 1A) RL = 54Ω (RS-485) (Figure 1A) Full 1.5 2.3 VCC V RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B) Full 1.5 2.6 - V ∆VOD RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V VOC RL = 54Ω or 100Ω (Figure 1A) Full - 1.8 3 V ∆VOC RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V Logic Input High Voltage VIH DE, DI, RE Full 2 - - V Logic Input Low Voltage VIL DE, DI, RE Full - - 0.8 V Logic Input Current IIN1 DE, DI Full -2 - 2 µA Input Current (A, B) IIN2 DE = 0V, VCC = 0V or 3.6V Full -25 - 25 µA VIN = 12V Full - 0.6 1 mA VIN = -7V Full - -0.3 -0.8 mA 14 20 µA RE Output Leakage Current (Y, Z) (ISL83491) IIN3 RE = 0V, DE = 0V, VCC = 0V or 3.6V VIN = 12V Full - VIN = -7V Full -20 -11 - µA Output Leakage Current (Y, Z) in Shutdown Mode (ISL83491) IIN3 RE = VCC, DE = 0V, VCC = 0V or 3.6V VIN = 12V Full - 0.03 1 µA VIN = -7V Full -1 -0.01 - µA Receiver Differential Threshold Voltage VTH -7V ≤ VCM ≤ 12V Full -0.2 - 0.2 V Receiver Input Hysteresis ∆VTH VCM = 0V 25 - 50 - mV Receiver Output High Voltage VOH IO = -4mA, VID = 200mV Full VCC 0.4 - - V Receiver Output Low Voltage VOL IO = -4mA, VID = 200mV Full - - 0.4 V 5 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25oC, Note 2 (Continued) Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS Three-State (high impedance) Receiver Output Current IOZR 0.4V ≤ VO ≤ 2.4V Full -1 - 1 µA Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V Full 12 19 - kΩ No-Load Supply Current (Note 3) ICC DI = 0V or VCC DE = VCC, RE = 0V or VCC Full - 0.75 1.2 mA DE = 0V, RE = 0V Full - 0.65 1 mA Shutdown Supply Current (Except ISL83488 and ISL83490) ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full - 15 100 nA Driver Short-Circuit Current, VO = High or Low IOSD1 DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 4) Full - - 250 mA Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full 8 - 60 mA Full 12 15 - Mbps DRIVER SWITCHING CHARACTERISTICS (ISL83485, ISL83490, ISL83491) Maximum Data Rate fMAX Driver Differential Output Delay Driver Differential Rise or Fall Time Driver Input to Output Delay Driver Output Skew tDD RDIFF = 60Ω, CL = 15pF (Figure 2A) Full 1 10 35 ns tR, tF RDIFF = 60Ω, CL = 15pF (Figure 2A) Full 3 5 20 ns tPLH, tPHL RL = 27Ω, CL = 15pF (Figure 2C) Full 6 10 35 ns RL = 27Ω, CL = 15pF (Figure 2C) Full - 1 8 ns tSKEW Driver Enable to Output High (Except ISL83490) tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Note 5) Full - 45 90 ns Driver Enable to Output Low (Except ISL83490) tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Note 5) Full - 45 90 ns Driver Disable from Output High (Except ISL83490) tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 3) 25 - 65 80 ns Full - - 110 ns Driver Disable from Output Low (Except ISL83490) tLZ RL = 110Ω, CL = 50pF, SW = VCC (Figure 3) 25 - 65 80 ns Full - - 110 ns Driver Enable from Shutdown to Output High (Except ISL83490) tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Notes 7, 8) Full - 115 150 ns Driver Enable from Shutdown to Output Low (Except ISL83490) tZL(SHDN) Full - 115 150 ns Full 250 - - kbps RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Notes 7, 8) DRIVER SWITCHING CHARACTERISTICS (ISL83483, ISL83488) Maximum Data Rate fMAX Driver Differential Output Delay Driver Differential Rise or Fall Time tDD RDIFF = 60Ω, CL = 15pF (Figure 2A) Full 600 930 1400 ns tR, tF RDIFF = 60Ω, CL = 15pF (Figure 2A) Full 400 900 1200 ns tPLH, tPHL RL = 27Ω, CL = 15pF (Figure 2C) Driver Input to Output Delay Driver Output Skew tSKEW 25 600 930 1500 ns Full 400 - 1500 ns RL = 27Ω, CL = 15pF (Figure 2C) Full - 140 - ns Driver Enable to Output High (Except ISL83488) tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Note 5) Full - 385 800 ns Driver Enable to Output Low (Except ISL83488) tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Note 5) Full - 55 800 ns Driver Disable from Output High (Except ISL83488) tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 3) 25 - 63 80 ns Full - - 110 ns 6 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25oC, Note 2 (Continued) Electrical Specifications PARAMETER SYMBOL Driver Disable from Output Low (Except ISL83488) tLZ TEST CONDITIONS RL = 110Ω, CL = 50pF, SW = VCC (Figure 3) TEMP (oC) MIN TYP MAX UNITS 25 - 70 80 ns Full - - 110 ns Driver Enable from Shutdown to Output High (Except ISL83488) tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Notes 7, 8) Full - 450 2000 ns Driver Enable from Shutdown to Output Low (Except ISL83488) tZL(SHDN) Full - 126 2000 ns Full 25 45 90 ns 25 - 2 10 ns Full - 2 12 ns RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Notes 7, 8) RECEIVER SWITCHING CHARACTERISTICS (All Versions) Receiver Input to Output Delay tPLH, tPHL (Figure 4) Receiver Skew | tPLH - tPHL | tSKD (Figure 4) Receiver Enable to Output High (Except ISL83488 and ISL83490) tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 5), (Note 6) Full - 11 50 ns Receiver Enable to Output Low (Except ISL83488 and ISL83490) tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5), (Note 6) Full - 11 50 ns Receiver Disable from Output High (Except ISL83488 and ISL83490) tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 5) Full - 7 45 ns Receiver Disable from Output Low (Except ISL83488 and ISL83490) tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5) Full - 7 45 ns Time to Shutdown (Except ISL83488 and ISL83490) tSHDN (Note 7) Full 80 190 300 ns Receiver Enable from Shutdown to Output High (Except ISL83488 and ISL83490) tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 5), (Notes 7, 9) Full - 240 600 ns Receiver Enable from Shutdown to Output Low (Except ISL83488 and ISL83490) tZL(SHDN) Full - 240 600 ns RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5), (Notes 7, 9) NOTES: 2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 3. Supply current specification is valid for loaded drivers when DE = 0V. 4. Applies to peak current. See “Typical Performance Curves” for more information. 5. When testing the ISL83483, ISL83485, ISL83491, keep RE = 0 to prevent the device from entering SHDN. 6. When testing the ISL83483, ISL83485, ISL83491, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 7. The ISL83483, ISL83485, ISL83491 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown. See “Low-Power Shutdown Mode” section. 8. Keep RE = VCC, and set the DE signal low time >300ns to ensure that the device enters SHDN. 9. Set the RE signal high time >300ns to ensure that the device enters SHDN. 7 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Test Circuits and Waveforms VCC RL/2 DE 375Ω VCC Z DI Z DI VOD D DE VCM VOD D Y RL = 60Ω -7V to +12V Y VOC RL/2 375Ω FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1A. VOD AND VOC FIGURE 1. DC DRIVER TEST CIRCUITS 3V CL = 15pF DI 1.5V 1.5V DE 3V 0V Z DI tPLH RDIFF = 60Ω D Y tPHL VOH CL = 15pF 50% OUT (Y) 50% SIGNAL GENERATOR VOL tPLH tPHL VOH FIGURE 2A. DIFFERENTIAL TEST CIRCUIT OUT (Z) 50% 50% VOL OUT 3V tDD tDD DE Z DI DIFF OUT (Y - Z) RL = 27Ω VOM D 90% 50% 10% tR Y CL = 15pF VOH + VOL 2 FIGURE 2C. SINGLE ENDED TEST CIRCUIT tF ≈1.5V FIGURE 2B. MEASUREMENT POINTS FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES 8 50% 10% SKEW = |tPLH (Y or Z) - tPHL (Z or Y)| SIGNAL GENERATOR VOM = +VOD 90% -VOD ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Test Circuits and Waveforms (Continued) DE Z DI 110Ω SIGNAL GENERATOR DE GND SW Y 3V VCC D NOTE 7 1.5V 1.5V 0V CL = 50pF tZH, tZH(SHDN) tHZ OUTPUT HIGH NOTE 7 PARAMETER OUTPUT RE DI SW tHZ Y/Z X 1/0 GND tLZ Y/Z X 0/1 VCC tZH Y/Z 0 (Note 5) 1/0 GND tZL Y/Z 0 (Note 5) 0/1 VCC tZH(SHDN) Y/Z 1 (Note 8) 1/0 GND tZL(SHDN) Y/Z 1 (Note 8) 0/1 VCC VOH - 0.25V VOH 50% OUT (Y, Z) 0V tZL, tZL(SHDN) tLZ NOTE 7 VCC OUT (Y, Z) 50% VOL + 0.25V V OL OUTPUT LOW FIGURE 3A. TEST CIRCUIT FIGURE 3B. MEASUREMENT POINTS FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL83488, ISL83490) RE GND 3V 15pF B +1.5V R A A 1.5V RO 1.5V 0V tPLH tPHL VCC SIGNAL GENERATOR 50% RO 50% 0V FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS FIGURE 4. RECEIVER PROPAGATION DELAY RE GND B A 1kΩ RO R SW SIGNAL GENERATOR NOTE 7 VCC GND 3V RE 1.5V 1.5V 15pF 0V tZH, tZH(SHDN) NOTE 7 PARAMETER DE A SW tHZ 0 +1.5V GND tLZ 0 -1.5V VCC tZH (Note 6) 0 +1.5V GND tZL (Note 6) 0 -1.5V VCC tZH(SHDN) (Note 9) 0 +1.5V GND tZL(SHDN) (Note 9) 0 -1.5V FIGURE 5A. TEST CIRCUIT VCC tHZ OUTPUT HIGH VOH - 0.25V RO 0V tZL, tZL(SHDN) tLZ NOTE 7 RO VCC 1.5V VOL + 0.25V V OUTPUT LOW FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL83488, ISL83490) 9 VOH 1.5V OL ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Application Information RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000’, so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. Receiver Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±200mV, as required by the RS422 and RS-485 specifications. Receiver input impedance surpasses the RS-422 spec of 4kΩ, and meets the RS-485 “Unit Load” requirement of 12kΩ minimum. Receiver inputs function with common mode voltages as great as +9V/-7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. All the receivers include a “fail-safe if open” function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). Receivers easily meet the data rates supported by the corresponding driver. ISL83483, ISL83485, ISL83491 receiver outputs are tristatable via the active low RE input. Driver Features The RS-485, RS-422 driver is a differential output device that delivers at least 1.5V across a 54Ω load (RS-485), and at least 2V across a 100Ω load (RS-422) even with VCC = 3V. The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. Drivers of the ISL83483, ISL83485, ISL83491 are tri-statable via the active high DE input. ISL83483/88 driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Data rate on these slew 10 rate limited versions is a maximum of 250kbps. Outputs of ISL83485, ISL83490, ISL83491 drivers are not limited, so faster output transition times allow data rates of at least 10Mbps. Data Rate, Cables, and Terminations RS-485, RS-422 are intended for network lengths up to 4000’, but the maximum system data rate decreases as the transmission length increases. Devices operating at 10Mbps are limited to lengths of a few hundred feet, while the 250kbps versions can operate at full data rates with lengths in excess of 1000’. Twisted pair is the cable of choice for RS-485, RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative, when using the 10Mbps devices, to minimize reflections. Short networks using the 250kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. Built-In Driver Overload Protection As stated previously, the RS-485 spec requires that drivers survive worst case bus contentions undamaged. The ISL834XX devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the RS-485 spec, even at the common mode voltage range extremes. Additionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, ISL834XX devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically reenable after the die temperature drops about 15 degrees. If the contention persists, the thermal shutdown/reenable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Low Power Shutdown Mode (ISL83483, ISL83485, ISL83491 Only) These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but the ISL83483, ISL83485, ISL83491 include a shutdown feature that reduces the already low quiescent ICC to a 15nA trickle. They enter shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a Typical Performance Curves period of at least 300ns. Disabling both the driver and the receiver for less than 80ns guarantees that shutdown is not entered. Note that receiver and driver enable times increase when these devices enable from shutdown. Refer to Notes 5-9, at the end of the Electrical Specification table, for more information. VCC = 3.3V, TA = 25oC, ISL83483 thru ISL83491; Unless Otherwise Specified 2.9 DIFFERENTIAL OUTPUT VOLTAGE (V) DRIVER OUTPUT CURRENT (mA) 110 100 90 80 70 60 50 40 30 20 10 0 0 0.5 1 1.5 2 2.5 DIFFERENTIAL OUTPUT VOLTAGE (V) 3 2.8 RDIFF = 100Ω 2.7 2.6 2.5 2.4 2.3 RDIFF = 54Ω 2.2 2.1 2 -40 3.5 -25 0 25 50 75 85 TEMPERATURE (oC) FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE 160 800 140 120 750 80 60 40 ICC (µA) OUTPUT CURRENT (mA) ISL83483/85, DE = VCC, RE = X Y OR Z = LOW 100 20 0 -20 700 ISL83483/85, DE = RE = GND; ISL83491, DE = X, RE = GND; ISL83488/90 Y OR Z = HIGH -40 650 -60 -80 -100 -120 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 12 FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE 11 600 -40 -25 0 25 50 75 TEMPERATURE (oC) FIGURE 9. SUPPLY CURRENT vs TEMPERATURE 85 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Typical Performance Curves 1200 VCC = 3.3V, TA = 25oC, ISL83483 thru ISL83491; Unless Otherwise Specified (Continued) 300 RDIFF = 54Ω 250 1100 tPLHZ PROPAGATION DELAY (ns) RDIFF = 54Ω FIGURE 2A |tPHLY - tPLHZ| |tPLHY - tPHLZ| tPLHY 200 SKEW (ns) 1000 tPHLY 900 150 100 tPHLZ 800 50 |CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑| 700 -40 -25 0 25 TEMPERATURE (oC) 50 0 -40 85 75 FIGURE 10. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL83483, ISL83488) 15 3.5 RDIFF = 54Ω FIGURE 2A |tPHLY - tPLHZ| tPLHZ 14 3 13 2.5 SKEW (ns) tPLHY 12 11 tPHLY 10 2 1.5 |CROSSING PT. OF Y↑ & Z↓ CROSSING PT. OF Y↓ & Z↑| tPHLY 1 9 tPHLZ -25 0 25 |tPLHY - tPHLZ| 50 0.5 -40 85 75 -25 TEMPERATURE (oC) 5 DI 0 5 RO 0 DRIVER OUTPUT (V) 3 2.5 B/Z 2 1.5 1 A/Y 0.5 0 TIME (400ns/DIV) FIGURE 14. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83483, ISL83488) 12 50 85 75 FIGURE 13. DRIVER SKEW vs TEMPERATURE (ISL83485, ISL84390, ISL83491) RECEIVER OUTPUT (V) RDIFF = 54Ω, CL = 15pF DRIVER INPUT (V) FIGURE 12. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL83485, ISL83490, ISL83491) 0 25 TEMPERATURE (oC) RDIFF = 54Ω, CL = 15pF 5 DI 0 5 RO 0 3 2.5 2 A/Y 1.5 1 0.5 B/Z 0 TIME (400ns/DIV) FIGURE 15. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL83483, ISL83488) DRIVER INPUT (V) 8 -40 RECEIVER OUTPUT (V) 85 75 4 RDIFF = 54Ω DRIVER OUTPUT (V) 0 50 25 TEMPERATURE (oC) FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL83483, ISL83488) 16 PROPAGATION DELAY (ns) -25 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 DI 0 5 RO 0 3 2.5 B/Z 2 1.5 1 A/Y 0.5 0 TIME (10ns/DIV) FIGURE 16. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83485, ISL83490, ISL83491) Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 528 PROCESS: Si Gate CMOS 13 RDIFF = 54Ω, CL = 15pF 5 DI 0 5 RO 0 3 2.5 2 A/Y 1.5 1 0.5 B/Z 0 TIME (10ns/DIV) FIGURE 17. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL83485, ISL83490, ISL83491) DRIVER INPUT (V) 5 RECEIVER OUTPUT (V) RDIFF = 54Ω, CL = 15pF DRIVER INPUT (V) VCC = 3.3V, TA = 25oC, ISL83483 thru ISL83491; Unless Otherwise Specified (Continued) DRIVER OUTPUT (V) DRIVER OUTPUT (V) RECEIVER OUTPUT (V) Typical Performance Curves ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Dual-In-Line Plastic Packages (PDIP) E8.3 (JEDEC MS-001-BA ISSUE D) N 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AD E BASE PLANE -C- A2 SEATING PLANE A L D1 e B1 D1 A1 eC B 0.010 (0.25) M C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 0.204 C D 0.355 0.400 9.01 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC eA 0.300 BSC 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eB - L 0.115 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 14 5 D1 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.355 10.16 N 8 2.54 BSC 7.62 BSC 0.430 - 0.150 2.93 10.92 3.81 8 6 7 4 9 Rev. 0 12/93 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Dual-In-Line Plastic Packages (PDIP) E14.3 (JEDEC MS-001-AA ISSUE D) N 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 SYMBOL -B- -C- A2 SEATING PLANE e B1 D1 A1 eC B 0.010 (0.25) M C A B S MAX NOTES - 0.210 - 5.33 4 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8 eA C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 D1 0.005 - 0.13 - 5 A L D1 MIN A E BASE PLANE MAX A1 -AD MILLIMETERS MIN C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 19.68 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. eA 0.300 BSC 7.62 BSC 6 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm). 15 N 14 14 9 Rev. 0 12/93 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N INDEX AREA 0.25(0.010) M H 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- e µα A1 B 0.25(0.010) M C C A M B S 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 16 MILLIMETERS MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8o 0o N NOTES: MAX A1 e 0.10(0.004) MIN α 8 0o 8 7 8o Rev. 0 12/93 ISL83483, ISL83485, ISL83488, ISL83490, ISL83491 Small Outline Plastic Packages (SOIC) M14.15 (JEDEC MS-012-AB ISSUE C) N INDEX AREA 0.25(0.010) M H 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 3 L SEATING PLANE -A- h x 45o A D -C- µα e A1 B 0.25(0.010) M C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3367 0.3444 8.55 8.75 3 E 0.1497 0.1574 3.80 4.00 4 e C 0.10(0.004) B S 0.050 BSC 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N NOTES: MILLIMETERS α 14 0o 14 8o 0o 7 8o Rev. 0 12/93 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17