Datasheet

UNISONIC TECHNOLOGIES CO., LTD
US5C3305
Preliminary
CMOS IC
2-BIT BUS SWITCH WITH
INDIVIDUAL ENABLES

DESCRIPTION
The UTC US5C3305 consist of two independent 5Ω switches
with fast individual enables. The “A” pin is connected to the “B” pin
directly when the associated Bus Enable (BE) pin is set to “High”.
The bus switch introduces no additional propagation delay or
additional ground bounce noise.

FEATURES
* Low on-resistor between two ports (5Ω typical)
* Near-Zero propagation delay
* Direct bus connection when switches are ON
* Ultra Low Quiescent Power (0.2μA typical)
- Ideally suited for notebook applications
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ORDERING INFORMATION
Ordering Number
US5C3305G-SM1-R

Package
MSOP-8
Packing
Tape Reel
MARKING
www.unisonic.com.tw
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CMOS IC
PIN CONFIGURATION
BE1
1
8
VCC
A1
2
7
BE2
B1
3
6
B2
GND
4
5
A2
PIN DESCRIPTION
PIN NO.
1, 7
2, 5
3, 6
4
8

Preliminary
PIN NAME
BEn
A1, A2
B1, B2
GND
VCC
DESCRIPTION
Switch Enable
Bus A
Bus B
Ground
Power
TRUTH TABLE (Note 1)
BEn
An
Bn
VCC
X (Note 2)
Hi-Z
Hi-Z
GND
L
Hi-Z
Hi-Z
VCC
H
Bn
An
VCC
Notes: 1. H=High Voltage Level, L=Low Voltage Level, Hi-Z=High Impedance, X=Don’t Care
2. A pull-up resistor should be provided for power-up protection.

Function
Disconnect
Disconnect
Connect
BLOCK DIAGRAM
A1
B1
BE1
A2
B2
BE2
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Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING (TA =25°C , unless otherwise specified)
(Above which the useful life may be impaired. For user guidelines, not tested.)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage to Ground Potential
-0.5~+7.0
V
DC Input Voltage
-0.5~+7.0
V
DC Output Current
120
mA
Power Dissipation
PD
0.5
W
Storage Temperature
TSTG
-65~+150
°C
Ambient Temperature with Power Applied
TA
-40~+85
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

DC ELECTRICAL CHARACTERISTICS
(Over the Operating Range, TA=-40°C~+85°C, VCC=4V~5.5V)
PARAMETER
SYMBOL
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance Output Current
Low Impedance Output Current
Input Hysteresis at Control Pins
VIH
VIL
IIH
IIL
IOZ
ION
VH
TEST CONDITIONS (Note 1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC=Max., VIN=VCC
VCC=Max., VIN=GND
0≤A, B≤VCC
0≤A, B≤VCC
TYP
MAX
(Note 2)
2.0
-0.5
0.8
±1
±1
±1
±1
250
MIN
UNIT
V
V
μA
μA
μA
μA
mV
VCC=4.5V, VIN=0.0V,
4
7
Ω
ION=30mA or 64mA
Switch On-Resistance (Note 3)
RON
VCC=4.5V, VIN=2.4V,
8
15
Ω
ION=-15mA
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the
applicable device type
2. Typical values are at VCC=5.0V, TA=25°C ambient and maximum loading.
3. Measured by the voltage drop between A and B pin at indicated current through the switch. On-Resistance
is determined by the lower of the voltages on the two (A, B) pin

POWER SUPPLY CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS (Note 1)
MIN
TYP
MAX
(Note 2)
0.1
3.0
UNIT
Quiescent Power Supply Current
ICC
VIN=GND or VCC
μA
VCC=Max.
Supply Current per Input @
△ICC
VIN=3.4V (Note 3)
2.5
mA
TTL HIGH
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the
applicable device.
2. Typical values are at VCC=5.0V, +25°C ambient.
3. Per TTL driven input (VIN=3.4V, control inputs only); A and B pins do not contribute to ICC.
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CAPACITANCE (TA=25°C, f =1MHz)
PARAMETER (Note 1)
SYMBOL
TEST CONDITIONS (Note 1)
MIN
Input Capacitance
CIN
VIN=0V
A/B Capacitance, Switch Off
COFF
A/B Capacitance, Switch On
CON
Note: This parameter is determined by device characterization but is not production tested.
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TYP
3
5
10
MAX
UNIT
pF
pF
pF
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Preliminary
CMOS IC
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (CL=50pF, RL=500Ω)
PARAMETER
SYMBOL
Propagation Delay Time Signal A to B,
B to A (Note 2, 3)
tPLH/tPHL
Bus Enable Time
tPZH/tPZL
Bus Disable Time
tPHZ/tPLZ
TEST CONDITIONS
(Note 1)
VCC=4V
VCC=5V±10%
VCC=4V
VCC=5V±10%
VCC=4V
VCC=5V±10%
MIN
1.0
1.0
TYP
MAX
UNIT
0.25
0.25
5.5
4.9
4.5
4.2
ns
ns
ns
ns
ns
ns
Notes: 1. See test circuit and waveforms.
2. This parameter is guaranteed but not tested on Propagation Delays.
3. The bus switch contributes no propagational delay other than the RC delay of the On-Resistance of the
switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 50pF
load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very
little propagational delay to the system. Propagational delay of the bus switch when used in a system is
determined by the driving circuit on the driving side of the switch and its interaction with the load on the
driven side.
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TEST CIRCUIT
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SWITCH POSITIONS
Preliminary
CMOS IC
Test
Switch
Open Drain
Disable LOW
7V
Enable LOW
All Other Inputs
Open
Note: CL=Load Capacitance: inlcudes jig and proble capacitance.
RT=Termination Resistance: should be equal to the ZOUT of the Pulse Generator.

ENABLE AND DISABLE TIMING
Notes: 1. Input Control Enable = Low; Input Control Disable=High
2. Pulse Generator for All Pulses: Rate ≤1.0 MHz; ZOUT≤50Ω; tF, tR, ≤2.5ns.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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