1-2-1 2-Phase Stepper Motor Unipolar Driver ICs SLA7070MR, MPR, MPRT/7071MR, MPR, MPRT/7072MR, MPR, MPRT/7073MR, MPR, MPRT 2-Phase/1-2 Phase Excitation Support, Built-in Sequencer ■Features ■Absolute Maximum Ratings • Lineup of built-in current sense resistor and built-in protection circuit-type Parameter Symbol Ratings Unit Motor Supply Voltage VM VBB VDD Io VIN VREF VRS 46 46 6 *1 V V V A V V V • Power supply voltages, VBB: 46 V (max), 10 to 44 V normal operating range Driver Supply Voltage • Logic supply voltages, VDD: 3.0 to 5.5 V Output Current • Maximum output currents: 1 A, 1.5 A, 2 A, and 3A Logic Input Voltage • Built-in sequencer Sense Voltage • Self-excitation PWM current control with fixed off-time Power Dissipation • Synchronous PWM chopping function prevents motor noise in Hold mode Junction Temperature • Sleep mode for reducing the IC input current in stand-by state Storage Temperature Logic Supply Voltage REF Input Voltage Operating Ambient Temperature • ZIP type 23-pin molded package (SLA package) –0.3 to VDD+0.3 –0.3 to VDD+0.3 ±2 4.7 17 +150 PD Tj Ta Tstg –20 to +85 –30 to +150 W Remarks Mode F Excluding tw<1µs When Ta = 25°C When Tc = 25°C °C °C °C *1: Output current value may be limited for the SLA7070MR, MPR, MPRT (1.0 A), SLA7071MR, MPR, MPRT (1.5 A), SLA7072MR, MPR, MPRT (2.0 A), and SA7073MR, MPR, MPRT (3.0 A), depending on the duty ratio, ambient temperature, and heating conditions. Be sure that junction temperature of Tj is not exceeded under any circumstances. ■Recommended Operating Conditions Parameter Rating Symbol min. max. Unit Remarks Motor Supply Voltage VM 44 V Driver Supply Voltage VBB 10 44 V Logic Supply Voltage VDD 3.0 5.5 V The VDD surge voltage should be 0.5 V or lower Case Temperature TC 90 °C Temperature at Pin-12 Lead (without heatsink) ■Electrical Characteristics Parameter Main Supply Current Logic Supply Current Output MOSFET Breakdown Voltage Output MOSFET ON Resistance Output MOSFET Diode Forward Voltage Maximum Clock Frequency Logic Input Voltage Logic Input Current REF Input Voltage REF Input Current Sense Voltage Sleep-Enable Recovery Time Switching Time Sense Resistance Symbol IBB IBBS IDD V(BR)DSS VREF VREFS IREF VSENSE TSE tcon tcoff RS Vocp Overcurrent Sense Current Iocp Flag Output Voltage Flag Output Current Step Reference Current Ratio PWM Minimum ON Time PWM OFF Time Ttsd VFlagL VFlagH IFlagL IFlagH ModeF Mode8 ton(min) toff 0.7 0.45 0.25 0.18 0.85 1.0 0.95 0.95 ICs 0.85 0.6 0.4 0.24 1.1 1.25 1.2 2.1 250 0.75VDD ±1 ±1 ±10 VREF Ω V 2.0 1.5 0.305 0.305 0.205 0.155 0.7 2.3 3.5 4.6 140 0.314 0.314 0.211 0.160 0.75 Ω V °C 1.25–VDD 1.25 100 70.7 3.2 12 V A 1.25 –1.25 In operation Sleep 1 and Sleep 2 modes VBB=44V, ID=1mA SLA7070M, ID=1.0A SLA7071M, ID=1.5A SLA7072M, ID=2.0A SLA7073M, ID=3.0A SLA7070M, ID=1.0A SLA7071M, ID=1.5A SLA7072M, ID=2.0A SLA7073M, ID=3.0A When Clock Duty = 50% V µA V µS µS µS 100 0.296 0.296 0.199 0.150 0.65 mA µA mA V µA 0.3 0.45 0.4 0.45 VDD 0.04 0.04 0.04 0.04 2 Conditions Unit kHz 0.25VDD * The direction in which current flows out of the device is regarded as negative. 94 max. 100 VF Fclock VIL VIH IIL IIH Ratings typ. 15 100 5 RDS(ON) Overcurrent Sense Voltage Thermal Protection Temperature min. V mA % % µs µs SLA7070M, within the current setting range SLA7071M, within the current setting range SLA7072M, within the current setting range SLA7073M, within the current setting range Output OFF (Sleep 1) When step reference current ratio is 100% Sleep1&Sleep2 Clock → Out ON Clock → Out OFF SLA7070M, tolerance of ±3% SLA7071M, tolerance of ±3% SLA7072M, tolerance of ±3% SLA7073M, tolerance of ±3% SLA7070xMPR, MPRT, when motor coil shorts out SLA7070MPR, MPRT/7071MPR, MPRT SLA7072MPR, MPRT SLA7073MPR, MPRT SLA707xMPRT, Rear of case (at the saturation temperature) SLA707xMPR, MPRT, IFlagL=1.25mA SLA707xMPR, MPRT, IFlagH=–1.25mA SLA707xMPR, MPRT SLA7070MR, MPR, MPRT/7071MR, MPR, MPRT/7072MR, MPR, MPRT/7073MR, MPR, MPRT ■Internal Block Diagram ■Pin Assignment Pin No. OutB PreDriver Sequencer & Sleep Circuit Protect Protect DAC DAC PWM Control PWM Control OSC 19 – Synchro Control + + – RS 20 21 22 23 Reg PreDriver 5 OutB 11 OutB 9 16 10 15 MIC SenseA OutB VBB Clock 8 Reset 7 M3 6 CW/CCW 18 M2 15 M1 14 Flag 4 N.C. Ref/Sleep1 VDD 3 OutA 2 OutA OutA OutA 1 17 SenseB RS OSC 12 The protect circuit is deleted and the flag pin is N.C. for SLA7070MR, 7071MR, 7072MR, and 7073MR. ■Typical Connection Diagram Symbol Function 1 Phase A output OutA 2 3 Phase A output OutA/ 4 SenseA Phase A current sense 5 6 N.C. N.C. M1 7 M2 Excitation mode/Sleep 2 setting input 8 9 M3 Clock Step Clock input 10 VBB Driver supply (motor supply) 11 12 Gnd Device GND Ref/Sleep1 Control current mode/Sleep 1 setting input 13 VDD Logic supply 14 15 Reset Internal logic reset input CW/CCW Normal/reverse control input 16 Sync PWM control signal input 17 18 Protection circuit monitor output*1 Flag*1 SenseB Phase B current sense 19 20 OutB/ Phase B current output 21 22 OutB Phase B current output 23 *1: N.C. pin for SLA7070MR, 7071MR, 7072MR, and 7073MR. ■External Dimensions (ZIP23 with Fin[SLA23Pin]) 31±0.2 Vs=10V to 44V 24.4±0.2 4.8±0.2 16.4±0.2 1.7±0.1 Gate burr φ 3.2±0.15 × 3.8 OutB OutB φ 3.2±0.15 Reset Clock CW/CCW M2 M3 4–(R1) SLA7070M Series (2-phase/1-2 phase excitation) +1 M1 Microcomputer, etc. 2.45±0.2 (Measured at the root) 9.5 –0.5 + 9.9±0.2 Q1 CB 5±0.5 BB 12.9±0.2 CA r1 OutA OutA C1 VDD 16±0.2 + Vcc=3.0V to 5.5V R-end Sync N.C. +0.2 Ref/Sleep1 SenseA r2 r3 Gnd 22 × P1.27±0.5 = 27.94±1 SenseB 31.3±0.2 (Including the resin burr) C2 (4.3) 0.65 –0.1 Flag +0.2 0.55 –0.1 ±0.7 4.5 (Measured at the tip) One-point Gnd Logic Gnd Power Gnd Forming No. No.2151 Product Mass : Approx.6g * There is no Flag pin (Pin-18) for SLA7070MR, 7071MR, 7072MR, and 7073MR. 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