Si9174 Vishay Siliconix High Performance Step-Down DC-DC Converter With Dynamically Adjustable Output Voltage D Synchronizable to13-MHz Clock D User Selectable PWM, PSM, or AUTO Mode D PSM Frequency w20 kHz for Inaudible Harmonics FEATURES D D D D D D D D D D D D D D 2-MHz PWM Operation Integrated MOSFET Switches 2.6-V to 6.0-V Input Voltage Range Minimal Number of External Components Up to 96% conversion efficiency 600-mA Load Capability 100% Duty Cycle Allows Low Dropout Integrated Compensation Circuit Over-Current Protection Shutdown Current < 2 mA Thermal Shutdown Integrated UVLO 10-Pin MSOP and Space Saving MLP33 Packaging DAC Input for Dynamic Output Voltage Adjustment APPLICATIONS D D D D D D D D D W-CDMA Cell Phone PDAs/Palmtop PCs LCD Modules Portable Image Scanners GPS Receivers Smart Phones MP3 Players 3G Cell Phone Digital Cameras DESCRIPTION The Si9174 is a high efficiency 600-mA step down converter with internal low on resistance power MOSFET switch and synchronous rectifier transistors. It is designed to convert one cell LiIon battery or three cell alkaline battery voltages to a dynamically adjustable dc output. The voltage on the DAC pin controls the output voltage. The output voltage is adjustable between 0.4 V and the input voltage VIN less a small dropout voltage and settles in <30 ms. minimize system noise, the switching frequency can be synchronized to an external 13-MHz clock. In order to insure efficient conversion throughout the entire load range, PWM (pulse width modulation), PSM (pulse skipping mode) or Auto mode can be selected. In PWM mode, 2-MHz switching permits use of small external inductor and capacitor sizes allowing one of the smallest solutions. To The Si9174 is available in the10-pin MSOP and the even smaller MLP33 package and is specified to operate over the industrial temperature range of –40_C to 85_C. The Si9174 packaged in the MLP33 package is available in both standard and lead (Pb)-free. PSM mode provides increased efficiency at light loads. In PSM mode the oscillator frequency is kept above 20 kHz to avoid audio band interference. When operating in Auto mode, the converter automatically selects operating in either PWM or PSM mode according to load current demand. TYPICAL APPLICATIONS CIRCUIT BATTERY VIN 2.2 mH LX VDD CIN 10 mF COUT 4.7 mF Si9174 VOUT R1 PGND 13 MHz DAC ENABLE PWM/PSM/AUTO Document Number: 71668 S-41148—Rev. C, 14-jun-04 SYNC DAC FB SD MODE AGND R2 www.vishay.com 1 Si9174 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to AGND = 0 V VIN, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 V Lx, SD, MODE, FB, DAC, SYNC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 6.2 V (or to VDD )0.3 V whichever is less) GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +0.3 V ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 125_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C Power Dissipation (Package)a 10-pin MSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481 mW 10-pin MLP33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 915 mW Thermal Impedance (QJA) 10-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135_C/W 10-Pin MLP33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71_C/W Peak Inductor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 A Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 7.4 mW/_C above 85_C. c. Derate 14 mW/_C above 85_C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE VIN Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 V to 5.5 V Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 mH CIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mF Ceramic Operating Load Current PWM Mode . . . . . . . . . . . . . . . . . . . . . . 0 to 600 mA COUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.7 mF Ceramic Operating Load Current PSM Mode . . . . . . . . . . . . . . . . . . . . . . . 0 to 150 mA SPECIFICATIONS Test Conditions Unless Specified Parameter Modef Symbol Limits −40_C 40_C to 85_C, 85_C VIN = VDD, 1.215 215 V V, CIN = 10 mF, mF DD VDAC = 1 COUT = 4.7 mF, L = 2.2 mH, 2.6 V v VIN v 5.5 V R1 = 11.3 kW, R2 = 20 kW Mina VIN rising 2.3 Typb Maxa Unit Under Voltage Lockout (UVLO) Under Voltage Lockout (turn-on) Hysteresis 2.5 0.1 V Shutdown (SD) Logic HIGH VSDH Logic LOW VSDL Delay to Outputc ten Pull Down ISD 1.6 0.4 Settle Within $2% accuracy SD rising tr < 1 ms RL = 3.3 W 100 RL = 51 W 100 Input at VIN V ms mA Mode Selection Tri-Level Logic (MODE) MODE Pin HIGH PWM MODE Pin LOW Auto VIN −0.4 VIN 0.4 Mode Pin Input Current MODE = GND −5 MODE = VIN 5 V mA Oscillator Frequency fOSC 1.6 2 2.4 MHz External Clock Synchronization (SYNC) Frequency SYNC Input = 500 mVp-p Ac Coupled Sinewave Frequency = 13 MHz 13 MHz 0.2 0.8 Vp-p VDAC −20 VDAC +20 mV Error Amplifier (FB, DAC Pin) FB Voltage Accuracy DAC Input Voltage Range Input Bias Current FB, DAC www.vishay.com 2 IFBDAC VIN > 2.6, VIN − VDAC > 0.5 V 0.28 VFB = 1.25 V −1 0.01 2.45 V 1 mA Document Number: 71668 S-41148—Rev. C, 14-jun-04 Si9174 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Specified Parameter Modef Symbol −40_C to 85_C, VIN = VDD, VDAC = 1.215 V, CIN = 10 mF, COUT = 4.7 mF, L = 2.2 mH, 2.6 V v VIN v 5.5 V R1 = 11.3 kW, R2 = 20 kW Maximum Output Current PWM ILOAD VIN = 3.6 V Maximum Output Current PSM ILOAD VIN = 3.6 V Dropout Voltagee VDD VIN = 2.6 V, IOUT = 600 mA Closed Loop Bandwidth BW Limits Mina 600 Typb Maxa Unit Converter Operation Load Regulationc Line Regulation PWM PWM 150 190 IOUT = 30 mA to 600 mA 0.5 IOUT = 30 mA to 75 mA 0.25 IAUpk 200 Maximum Inductor Peak Current Limit ILpk 1500 Maximum NMOS Transistor Current Sink On Resistance Output Ripple Voltage Efficiency Frequency PWM P-Channel N-Channel Negative Transition on VDAC rDS(on) DS( ) PWM PWM VIN = 3.6 3 6 V, V VOUT = 3.3 33V PSM PSM %/V mA 1500 250 VIN = 3.6 36V 0 05 W COUT(ESR) 0.05 PSM mW 250 IOUT = 600 mA 60 IOUT = 30 mA 80 IOUT = 600 mA 90 IOUT = 30 mA 80 IOUT w 30 mA mV % "0.1 PWM/PSM Switch Threshold Current mA kHz "0.1 VOUT = 3.0 3 0 V, V VIN = 3.5 3 5 V to 5 5.5 5V PSM 300 300 VIN = 3.6 V VOUT = 1.9 V @ 25_C PSM mA mVp-p % 20 kHz Supply Current Input Supply Current PWM PSM Shutdown Supply Current ISUPPLY (VDD & VIN) IOUT = 0 mA, mA VIN = 3.6 3 6 V (not switching switching, FB = GND) ISD SD = Low 500 800 mA 400 2 Thermal Shutdown Thermal Shutdown Temperaturec Thermal Hysteresisc TJ(S/D) 165 20 _C Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. b. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. c. Guaranteed by design. d. Settling times, ts, apply after ten. e. Bypass is a device mode of operation, in which, the device is in 100% duty cycle. Bypass operation is possible in either PWM or PSM. f. Operating modes are controlled with the MODE pin where Auto mode = MODE = LOW, PWM Mode = MODE = HIGH, and PSM mode = MODE = OPEN. Document Number: 71668 S-41148—Rev. C, 14-jun-04 www.vishay.com 3 Si9174 Vishay Siliconix PIN CONFIGURATION MSOP-10 MLP33 LX 1 10 PGND AGND 2 9 VIN FB 3 8 SYNC VDD 4 7 SD DAC 5 6 MODE LX AGND FB VDD DAC 10 9 8 7 6 2 3 4 5 PGND VIN SYNC SD MODE Top View Top View PIN DESCRIPTION Pin Number Name 1 LX 2 AGND Function Inductor connection Low power analog ground 3 FB Output voltage feedback 4 VDD Input supply voltage for the analog circuit. 5 DAC Voltage from external DAC to adjust output voltage. Used to select switching mode of the buck converter PWM/PSM Pin Logic: 6 MODE 7 SD 8 SYNC 9 VIN 10 PGND MODE Pin VIN Open GND Operating Mode PWM PSM AUTO Logic low disables IC and reduces quiescent current to below 2 mA Converter switching frequency can be synchronized to 1/6 of the clock frequency at this pin. Input supply voltage Low impedance power ground ORDERING INFORMATION MSOP-10 MLP33 Standard Part Number Marking Temperature Standard Part Number Lead (Pb)-Free Part Number Marking Temperature Si9174DH-T1 9174 −40 to 85_C Si9174DM-T1 Si9174DM-T1—E3 9174 −40 to 85_C Additional voltage options are available. www.vishay.com 4 Eval Kit Temperature Range Board Si9174DB −40 to 85_C Surface Mount Document Number: 71668 S-41148—Rev. C, 14-jun-04 Si9174 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VDD VIN Si9174 PMOS Current Sense Error Amplifier FB − + DAC Clamp PWM Comparator − + PWM and Pulse Skipping Logic LX To IC Bias Voltage Reference UVLO B6 AGND SYNC NMOS Current Sense 2 MHz Oscillator MODE SD PGND DETAIL DESCRIPTION General The Si9174 is a high efficiency synchronous dc-dc converter that is ideally suited for lithium ion battery or three cell alkaline applications, as well as step-down of 3.3-V or 5.0-V supplies. It is design to provide power to the power amplifier in WCDMA cell phones, but can utilized in any applications requiring a dynamically adjustable 600-mA power supply. The major blocks of the Si9174 are shown in the Functional Block Diagram. The 0.25-W internal MOSFETs switching at a frequency of 2-MHz minimize PC board space while providing high conversion efficiency and performance. The high frequency error-amplifier with built-in loop compensation minimizes external components and provides rapid output settling times of <30 ms. Sensing of the inductor current for control is accomplished internally without power wasting resistors. The switching frequency can be synchronized to an external 13-MHz clock signal. prevents false start-stop cycling as the input voltage approaches the UVLO switching threshold. Start-up is always accomplished in PWM mode to ensure start-up under all load conditions. Switching to other modes of operation occurs according to the state of the MODE pin and the load current. The start-up sequence occurs after SD switches from LOW to HIGH with VIN applied, or after VIN rises above the UVLO threshold and SD is a logic HIGH. Mode Control (MODE) The MODE pin allows the user to control the mode of operation or to enable the Si9174 to automatically optimize the mode of operation according to load current. There are three different modes of operation as controlled by the MODE pin. Switching waveforms are shown in the Typical Switching Waveform sections, page 9. PWM Mode (MODE pin = HIGH) Start-Up When voltage is applied to VIN and VDD, the under-voltage lockout (UVLO) circuit prevents the oscillator and control circuitry from turning on until the voltage on the exceeds 2.4 V. With a typical UVLO hysteresis of 0.1 V, the converter operates continuously until the voltage on VIN drops below 2.3 V, whereupon the converter shuts down. This hysteresis Document Number: 71668 S-41148—Rev. C, 14-jun-04 With the MODE pin in the logic HIGH condition, the Si9174 operates as a 2-MHz fixed frequency voltage mode converter. A NMOS synchronous rectification MOSFET transistor provides very high conversion efficiency for large load currents by minimizing the conduction losses. PWM mode provides low output ripple, fast transient response, and switching frequency synchronization. Output load currents can range from 0 to 600 mA. www.vishay.com 5 Si9174 Vishay Siliconix The error amplifier and comparator control the duty cycle of the PMOS MOSFET to continuously force the DAC pin and FB pin voltages to be equal. As the input-to-output voltage difference drops, the duty cycle of the PMOS MOSFET can reach 100% to allow system designers to extract the maximum stored energy from the battery. The dropout voltage is 190 mV at 600 mA. provide smooth operation. Thus, the mode PSM-to-PWM mode switchover current for increasing load currents is higher than that of PWM-to-PSM mode switchover for decreasing load currents. During each cycle, the PMOS switch current is limited to a maximum of 1.5 A (typical) thereby protecting the IC while continuing to force maximum current into the load. Similarly, the NMOS switch is internally limited to a maximum of 1.5 A (typical) during negative output voltage transients. The internal oscillator provides for a fixed 2-MHz switching frequency. In order to minimize system noise, the oscillator of the Si9174 can be synchronized to an external clock, typically an ac-coupled 13-MHz sine wave. An on-chip divide-by-six circuit sets the converter switching frequency to 2.167 MHz in this mode. The frequency lock range of the synchronization circuitry is typically 20%. If synchronization is not required, the SYNC pin must be tied to GND permitting the internal oscillator to oscillate at 2 MHz. Pulse Skipping Mode (MODE pin = OPEN) By leaving the MODE pin open-circuit, the converter runs in pulse skipping mode (PSM). In PSM mode the oscillator continues to operate, but switching only occurs if the FB pin voltage is below the DAC voltage at the start of each clock cycle. Clock cycles are skipped thereby reducing the switching frequency to well below 100 kHz and minimizing switching losses for improved efficiency at loads under 150 mA. Although PSM mode switching frequency varies with line and load conditions, the minimum PSM frequency will be kept above 20 kHz for load currents of 30 mA or more to prevent switching noise from reaching the audio frequency range. Each time the PMOS switch is turned on, the inductor current is allowed to reach 300 mA. Once achieved, the PMOS switch is turned off and the NMOS switch is turned on in the normal manner. However, unlike PWM mode, the NMOS switch, turns off as the switch current approaches zero current to maximize efficiency. The PMOS switch remains on continuously (100% duty cycle) when the input-voltage-to-output-voltage difference is low enabling maximum possible energy extraction from the battery. PSM mode is recommend for load currents of 150 mA or less. Oscillator Synchronization (SYNC) Dynamic Output Voltage Control (DAC) The Si9174 is designed to dynamically adjust the output voltage according to the voltage present on the DAC pin. The output voltage is regulated to the same voltage the DAC pin through the resistor divider. For VDAC within the voltage range of 0.28 – 2.45 V, VOUT is proportional to VDAC according to the following relationship: ǒ VOUT + 1 ) R1 R2 Ǔ VDAC Converter Shutdown (SD pin) With logic LOW level on the SD pin, the Si9174 is shutdown. Shutdown reduces current consumption to less than 2-mA by shutting off all of the internal circuits. Both the PMOS and NMOS transistors are turned off. A logic HIGH enables the IC to start up as described in “Start-up” section. Auto Mode Thermal Shutdown When the MODE pin grounded, the converter is set to Auto mode. Switching between PWM mode and PSM modes takes place automatically without an external control signal. For heavy load operation, the converter will operate in PWM mode to achieve maximum efficiency. When delivering light load currents, the converter operates in PSM mode to conserve power. The switchover threshold between the two modes is determined by the peak inductor current, which is 300 mA nominal. There is hysteresis in the switchover threshold to www.vishay.com 6 The Si9174 includes thermal shutdown circuitry, which turns off the regulator when the junction temperature exceeds 165_C. Once the junction temperature drops below 145_C, the regulator is enabled. If the condition causing the over temperature, the Si9174 begins thermal cycling, turning the regulator on and off in response to junction temperature. Restart from a thermal shutdown condition is the same as described in the “Start-up” section. Document Number: 71668 S-41148—Rev. C, 14-jun-04 Si9174 Vishay Siliconix APPLICATIONS CIRCUIT BATT CIN 10 mF VIN 2.2 mH VDD C1 VOUT LX C2 COUT 4.7 mF Si9174 R1 PGND 13 MHz DAC ENABLE PWM/PSM/AUTO SYNC DAC FB SD MODE R2 AGND CIN = 10 mF, Ceramic, Murata GRM42-2X5R106K16 C1, C2 = 0.01 mF, Vishay VJ0603Y 104KXXAT COUT = 4.7 mF, Ceramic, Murata GRM42-6X5R475K16 R1 = 8.2 kW, Vishay CRCW06031132F R2 = 20 kW, Vishay CRCW06032002F L1 = 2.2 mH, Toko A914BYW-2R2M TYPICAL CHARACTERISTICS VOUT 3.83 0.44 VDAC 0.28 2.45 VOUT-vs. VDAC Characteristics (VIN = 5 V) Figure 1. VSDH VSDL SD tr ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ VDAC VOUT Don’t Care tf tf 0.2 V ten tr 2.5 V ÉÉÉ ÉÉÉ ÉÉÉ Don’t Care ts 3.47 V Undefined (Load Dependent) 0.4 V ts d Indicates VOUT settles to $2% of the final value. Figure 2. Document Number: 71668 S-41148—Rev. C, 14-jun-04 Time PWM Mode VOUT Settling www.vishay.com 7 Si9174 Vishay Siliconix TYPICAL CHARACTERISTICS Dropout Voltage vs. ILOAD Auto Mode Efficiency vs. Load 100 200 VIN = 3.6 V VOUT = 3.0 V Dropout Voltage (mV) Efficiency (%) 95 90 VOUT = 1.9 V 85 80 160 VIN = 2.6 V VIN = 3.6 V 120 80 VIN = 5.5 V 40 75 0 70 0 100 200 300 400 500 0 600 100 200 300 400 500 600 Load Current (mA) Load Current (mA) PSM vs. PWM Efficiency PWM 95 PSM 90 VIN = 3.6 V VOUT = 1.9 V COUT = 4.7 mF 85 80 75 0 100 200 300 400 500 600 Load Current (mA) Auto Mode Efficiency vs. Load Direction 100 Efficiency (%) VOUT Ripple 100 VOUT Ripple (mVp-p) Efficiency (%) 100 PSM 80 60 40 Load Decreasing 95 20 Load Increasing 90 PWM 85 0 80 0 75 0 100 200 300 400 500 600 30 60 90 120 150 Load Current (mA) Load Current (mA) www.vishay.com 8 Document Number: 71668 S-41148—Rev. C, 14-jun-04 Si9174 Vishay Siliconix TYPICAL SWITCHING WAVEFORMS (VIN = 3.6 V, VOUT = 3.0 V) PWM mode Heavy-Load Switching Waveforms, IOUT = 600 mA, MODE = HIGH PWM Mode Medium-Load Switching Waveforms, IOUT = 300 mA, MODE = HIGH VLX, 5 V/div VLX, 2 V/div Inductor Current 500 mA/div Inductor Current 500 mA/div VOUT (AC-Coupled) 10 mV/div VOUT (AC-Coupled) 10 mV/div 200 nS/div 200 nS/div PWM Mode Light-Load Switching Waveforms, IOUT = 0 mA, MODE = HIGH PSM Mode Light-Load Switching Waveforms, IOUT = 150 mA, MODE = OPEN VLX, 5 V/div VLX, 5 V/div Inductor Current 200 mA/div Inductor Current 200 mA/div VOUT (AC-Coupled) 10 mV/div VOUT (AC-Coupled) 10 mV/div 200 nS/div 1.0 mS/div PSM Mode Light-Load Switching Waveforms, IOUT = 30 mA, MODE = OPEN VLX, 5 V/div Inductor Current 200 mA/div VOUT (AC-Coupled) 100 mV/div 2.0 mS/div Document Number: 71668 S-41148—Rev. C, 14-jun-04 www.vishay.com 9 Si9174 Vishay Siliconix TYPICAL WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V) PWM Mode Heavy-Load Switching Waveforms, IOUT = 600 mA, MODE = HIGH PWM Mode Medium-Load Switching Waveforms, IOUT = 300 mA, MODE = HIGH VLX, 5 V/div VLX, 5 V/div Inductor Current 500 mA/div Inductor Current 500 mA/div VOUT (AC-Coupled) 10 mV/div VOUT (AC-Coupled) 10 mV/div 200 nS/div 200 nS/div PWM Mode Light-Load Switching Waveforms, IOUT = 0 mA, MODE = HIGH PSM Mode Light-Load Switching Waveforms, IOUT = 150 mA, MODE = OPEN VLX, 5 V/div VLX, 5 V/div Inductor Current 200 mA/div Inductor Current 200 mA/div VOUT (AC-Coupled) 10 mV/div 200 nS/div VOUT (AC-Coupled) 100 mV/div 1.0 mS/div PSM Mode Light-Load Switching Waveforms, IOUT = 30 mA, MODE = OPEN VLX, 5 V/div Inductor Current 200 mA/div VOUT (AC-Coupled) 100 mV/div 2.0 mS/div www.vishay.com 10 Document Number: 71668 S-41148—Rev. C, 14-jun-04 Si9174 Vishay Siliconix TYPICAL START-UP AND SHUTDOWN TRANSIENT WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V) Start-Up, RLOAD = 4 W Start-Up, VIN = VSD = 3.6 V, RLOAD = 4 W VIN, VSD, 1 V/div VSD, 1 V/div VOUT, 500 mV/div VOUT, 500 mV/div 20 mS/div 20 mS/div Shutdown, RLOAD = 4 W Enable Switching, RLOAD = 4 W VSD, 1 V/div VSD 1 V/div VOUT, 500 mV/div VOUT, 500 mV/div 200 mS/div 20 mS/div TYPICAL MODE SWITCH TRANSIENT WAVEFORM Output Transient At Mode Switch, ILOAD = 30 mA VOUT (AC-Coupled) 200 mV/div Mode Pin 1 V/div 100 mS/div Document Number: 71668 S-41148—Rev. C, 14-jun-04 www.vishay.com 11 Si9174 Vishay Siliconix TYPICAL LOAD TRANSIENT WAVEFORMS (VIN = 3.6 V, VOUT = 1.9 V) Load Transient, Auto Mode, ILOAD = 30 to 500 mA, MODE = LOW Load Transient, PWM Mode, ILOAD = 30 to 500 mA, L = 2.2 mH, MODE= HIGH ILOAD, 200 mA /div ILOAD, 200 mA /div VOUT (AC-Coupled) 50 V/div VOUT (AC-Coupled) 50 mV/div 10 mS/div 10 mS/div Load Transient (PSM Mode), ILOAD = 30 to 150 mA, L = 2.2 mH ILOAD, 200 mA /div VOUT (AC-Coupled) 50 mV/div 100 mS/div TYPICAL DAC INPUT RESPONSE WAVEFORM Output Transient At Mode Switch, ILOAD = 30 mA VDAC, 1 V/div VOUT, 1 V/div 100 mS/div www.vishay.com 12 Document Number: 71668 S-41148—Rev. C, 14-jun-04 Legal Disclaimer Notice Vishay Notice Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale. Document Number: 91000 Revision: 08-Apr-05 www.vishay.com 1 Package Information Vishay Siliconix MSOP: 10-LEADS (POWER IC ONLY) JEDEC Part Number: MO-187, (Variation AA and BA) (N/2) Tips) 2X 5 N N-1 A B C 0.20 0.60 0.48 Max Detail “B” (Scale: 30/1) Dambar Protrusion E 0.50 1 2 0.60 N/2 0.08 M C B S b Top View A S 7 b1 e1 With Plating e A See Detail “B” c1 0.10 C A1 -H- D 6 Seating Plane c Section “C-C” Scale: 100/1 (See Note 8) Base Metal -A- 3 See Detail “A” Side View 0.25 BSC Parting Line C 0.07 R. Min 2 Places A2 Seating Plane L 4 T 0.95 C ς 0.05 S E1 -B- -C- 3 End View Detail “A” (Scale: 30/1) NOTES: 1. 2. Dimensioning and tolerances per ANSI.Y14.5M-1994. 3. Dimensions “D” and “E1” do not include mold flash or protrusions, and are measured at Datum plane -H- , mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimension is the length of terminal for soldering to a substrate. 5. Terminal positions are shown for reference only. 6. Formed leads shall be planar with respect to one another within 0.10 mm at seating plane. 7. N = 10L Die thickness allowable is 0.203"0.0127. The lead width dimension does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the lead width dimension at maximum material condition. Dambar cannot be located on the lower radius or the lead foot. Minimum space between protrusions and an adjacent lead to be 0.14 mm. See detail “B” and Section “C-C”. 8. Section “C-C” to be determined at 0.10 mm to 0.25 mm from the lead tip. 9. Controlling dimension: millimeters. 10. This part is compliant with JEDEC registration MO-187, variation AA and BA. 11. Datums -A- and -B- to be determined Datum plane -H- . 12. Exposed pad area in bottom side is the same as teh leadframe pad size. Document Number: 72817 28-Jan-04 MILLIMETERS Dim A A1 A2 b b1 c c1 D E E1 e e1 L N T Min Nom Max Note − − 1.10 0.05 0.10 0.15 0.75 0.85 0.95 0.17 − 0.27 8 0.17 0.20 0.23 8 0.13 − 0.23 0.15 0.18 0.13 3.00 BSC 3 4.90 BSC 2.90 3.00 3.10 3 0.70 4 0.50 BSC 2.00 BSC 0.40 0.55 10 0_ 4_ 5 6_ ECN: S-40082—Rev. A, 02-Feb-04 DWG: 5922 www.vishay.com 1 Package Information Vishay Siliconix MLP33Ć10 (POWER IC ONLY) JEDEC Part Number: Outline is consistent with JEDEC MO229-VEED-2 Detail D 4xQ // ccc C A2 A A1 NX A3 0.08 C Side View e 1 A1 5 NX b bbb M C A B 2 L2 ddd M C D ÉÉÉ ÇÇ ÉÉÉ ÇÇ ÉÉÉ L + L2 Detail C Seating Plane C Detail C A L2 B 8 R2 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Detail A Detail D Pin 1 Mark 4 N N-1 0.20 Ref 6 7 Detail B (ND-1) x E 1 aaa C 2 X e L2 TopView Bottom View 7 2X aaa C Datum A or B Datum A or B NX R1 NX R1 L e2/2 e L2 Terminal Tip Terminal Tip e 5 5 Detail B Even Terminal/Side Odd Terminal/Side L1 L2 This Feature Applies To Both Ends of The Package B Exposed Metalized Feature Detail A Document Number: 72819 28-Nov-05 0.17 0.30 Edge of Plastic Body www.vishay.com 1 Package Information Vishay Siliconix MLP33Ć10 (POWER IC ONLY) N = 10 PITCH: 0.50 mm, BODY SIZE: 3.00 x 3.00 MILLIMETERS* Dim Min Nom INCHES Max Min Nom Max Notes A 0.80 0.90 1.00 A1 0 0.025 0.05 A2 0.65 0.70 0.75 A3 0.15 0.20 0.25 aaa – 0.10 – b 0.20 0.25 0.30 bbb – 0.10 – ccc – 0.10 – D 3.00 BSC ddd – 0.05 – E 3.00 BSC e – 0.5 – e2 1.10 1.20 1.30 L 0.45 0,58 0.65 L1 0.20 0.29 0.45 L2 – – 0.125 N 10 ND 5 R1 Ref – 0.100 – R2 Ref – 0.075 – Q 0_ 10_ 12_ * Use millimeters as the primary measurement. 0.031 0 0.026 0.006 – 0.008 – – 0.035 0.001 0.028 0.008 0.004 0.010 0.004 0.004 0.118 BSC 0.002 0.118 BSC 0.002 0.047 0.023 0.012 – 10 5 0.039 0.002 0.030 0.010 – 0.012 – – 1, 2 1, 2 1, 2 1, 2 1, 2 5, 11 1, 2 1, 2 1, 2 1, 2 1, 2 – 0.043 0.018 0.008 – – – 0_ 0.003 10_ – 0.051 0.026 0.018 0.005 – – 12_ 1, 2, 9 1, 2 1, 2 5, 11 3 6 5, 11 1, 2 1, 2 ECN: S-52448—Rev. B, 28-Nov-05 DWG: 5924 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. All angels are in degrees. 3. N is the total number of terminals. 4. The terminal #1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be a molded, marked, or metallized feature. 5. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.20 mm from the terminal tip. 6. ND refers to the maximum number of terminals on the D side. 7. Profile tolerance (aaa) will be applicable only to the plastic body and not to the metallized features (such as the terminal tips and tie bars.) Metallized features may protrude a maximum of L2 from the plastic body profile. 8. The corner will be sharp unless otherwise specified with radius dimensions. 9. Package outline is consistent with JEDEC M0229-VEED-2. www.vishay.com 2 Document Number: 72819 28-Nov-05 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1