HC-5524 Data Sheet February 1999 File Number 2798.6 EIA/ITU 24V PABX SLIC with 25mA Loop Feed Features The HC-5524 telephone Subscriber Line Interface Circuit integrates most of the BORSCHT functions on a monolithic IC. The device is manufactured in a Dielectric Isolation (DI) process and is designed for use as a 24V interface between the traditional telephone subscriber pair (Tip and Ring) and the low voltage filtering and coding/decoding functions of the line card. Together with a secondary protection diode bridge, the device will withstand 500V induced surges, in plastic packages. The SLIC also maintains specified transmission performance in the presence of externally induced longitudinal currents. The BORSCHT functions that the SLIC provides are: • Compatible with Worldwide PBX and DLC Performance Requirements • DI Monolithic High Voltage Process • Controlled Supply of Battery Feed Current with Programmable Current Limit • Operates with 5V Positive Supply (VB+) • Internal Ring Relay Driver and a Utility Relay Driver • High Impedance Mode for Subscriber Loop • High Temperature Alarm Output • Low Power Consumption During Standby Functions • Battery Feed with Subscriber Loop Current Limiting • Switch Hook, Ground Key, and Ring Trip Detection • Overvoltage Protection • Selective Power Denial to Subscriber • Ring Relay Driver • Voice Path Active During Power Denial • Supervisory Signaling Functions • On-Chip Op Amp for 2-Wire Impedance Matching • Hybrid Functions (with External Op-Amp) Applications • Test (or Battery Reversal) Relay Driver In addition, the SLIC provides selective denial of power to subscriber loops, a programmable subscriber loop current limit from 20mA to 60mA, a thermal shutdown with an alarm output and line fault protection. Switch hook detection, ring trip detection and ground key detection functions are also incorporated in the SLIC device. • Solid State Line Interface Circuit for PBX or Digital Loop Carrier Systems The HC-5524 SLIC is ideally suited for line card designs in PBX and DLC systems, replacing traditional transformer solutions. • 2-Wire/4-Wire, 4-Wire/2-Wire Hybrid Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. HC4P5524-9 -40 to 85 44 Ld PLCC N44.65 HC9P5524-5 0 to 75 28 Ld SOIC M28.3 1 • Hotel/Motel Switching Systems • Direct Inward Dialing (DID) Trunks • Voice Messaging PBXs • Related Literature - AN9607, Impedance Matching Design Equations - AN9628, AC Voltage Gain - AN9608, Implementing Pulse Metering - AN549, The HC-5502S/4X Telephone Subscriber Line Interface Circuits (SLIC) CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HC-5524 Absolute Maximum Ratings (Note 1) Thermal Information Maximum Supply Voltages (VB+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V (VB+) - (VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Relay Drive Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 15V Thermal Resistance (Typical, Note 2) θJA (oC/W) PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . -65oC to TA to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (PLCC and SOIC - Lead Tips Only) Operating Conditions Operating Temperature Range HC-5524-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to TA to 75oC HC-5524-9 . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to TA to 85oC Relay Driver Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 12V Positive Power Supply (VB+) . . . . . . . . . . . . . . . . . . . . . . . . 5V ±5% Negative Power Supply (VB-). . . . . . . . . . . . . . . . . . . . -20V to -28V Die Characteristics Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224 Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . .174 mils x 120 mils Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified PARAMETER TEST CONDITIONS MIN TYP MAX UNITS - 100 - kΩ AC TRANSMISSION PARAMETERS RX Input Impedance 300Hz to 3.4kHz, (Note 3) TX Output Impedance 4-Wire Input Overload Level 300Hz to 3.4kHz, 600Ω Reference 2-Wire Return Loss SRL LO Matched for 600Ω, (Note 3) ERL SRL HI - - 20 Ω +1.0 - - VPEAK 26 35 - dB 30 40 - dB 30 40 - dB 2-Wire Longitudinal to Metallic Balance Off Hook Per ANSI/IEEE STD 455-1976, 300Hz to 3400Hz, (Note 3) 58 63 - dB 4-Wire Longitudinal Balance Off Hook Per ANSI/IEEE STD 455-1976, 300Hz to 3400Hz, (Note 3) 50 55 - dB Low Frequency Longitudinal Balance R.E.A. Test Circuit - -80 -67 dBmp - 10 23 dBrnC Longitudinal Current Capability ILINE = 40mA, TA = 25oC (Note 3) ILINE = 40mA, TA = 25oC (Note 3) - - 40 mARMS Insertion Loss 2-Wire/4-Wire -1.58dBm at 1kHz, Referenced 600Ω - ±0.05 ±0.2 dB 0dBm at 1kHz, Referenced 600Ω - ±0.05 ±0.2 dB 4-Wire/2-Wire -1.58dBm at 1kHz, Referenced 600Ω - - ±0.2 dB Frequency Response 300Hz to 3400Hz, Referenced to Absolute Level at 1kHz, 0dBm Referenced 600Ω (Note 3) - ±0.02 ±0.06 dB Level Linearity 2-Wire to 4-Wire and 4-Wire to 2-Wire Referenced to -10dBm, (Note 3) +3 to -40dBm - - ±0.08 dB -40 to -50dBm - - ±0.12 dB -50 to -55dBm - - ±0.3 dB 4-Wire/4-Wire 2 HC-5524 Electrical Specifications Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified (Continued) MIN TYP MAX UNITS Absolute Delay 2-Wire/4-Wire PARAMETER (Note 2) 300Hz to 3400Hz TEST CONDITIONS - - 1 µs 4-Wire/2-Wire 300Hz to 3400Hz - - 1 µs 4-Wire/4-Wire 300Hz to 3400Hz - 0.95 1.5 µs Total Harmonic Distortion 2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire Reference Level 0dBm at 600Ω, 300Hz to 3400Hz (Note 3) - - -50 dB Idle Channel Noise 2-Wire and 4-Wire C-Message, (Note 3) - - 5 dBrnC Psophometric - - -85 dBmp 3kHz Flat - - 16 dBrn Open Loop Voltage (VTIP - VRING) VB+ = 5V, VB- = -24V - 15.8 - V Power Supply Rejection Ratio VB+ to 2-Wire 30Hz to 200Hz, RL = 600Ω, (Note 3) 20 40 - dB VB+ to 4-Wire 20 40 - dB VB- to 2-Wire 20 40 - dB VB- to 4-Wire 20 50 - dB 30 40 - dB VB+ to 4-Wire VB+ to 2-Wire 200Hz to 16kHz, RL = 600Ω 20 28 - dB VB- to 2-Wire 20 50 - dB VB- to 4-Wire 20 50 - dB 50 - 500 µs 20 - 60 mA 10 - - % - ±4 ±7 mA - 30 - mA RING to Ground - 120 - mA TIP and RING to Ground - 150 - mA Switch Hook Detection Threshold - 12 15 mA Ground Key Detection Threshold - 10 - mA 140 - 160 oC - 10 - mA Ring Trip Detection Period - 100 150 ms Dial Pulse Distortion - 0.1 0.5 ms Ring Sync Pulse Width DC PARAMETERS Loop Current Programming Limit Range Accuracy Loop Current During Power Denial RL = 200Ω Fault Currents TIP to Ground Thermal ALM Output Safe Operating Die Temperature Exceeded Ring Trip Detection Threshold VRING = 105VRMS, fRING = 20Hz Relay Driver Outputs On Voltage VOL Off Leakage Current IOL (PR) = 60mA, IOL (RD) = 30mA - 0.2 0.5 V VOH = 13.2V - ±10 ±100 µA TTL/CMOS Logic Inputs (F0, F1, RS, TST, PRI) Logic ‘0’ VIL Logic ‘1’ VIH - - 0.8 V 2.0 - 5.5 V Input Current (F0, F1, RS, TST, PRI) 0V ≤ VIN ≤ 5V - - ±100 µA Logic Outputs Logic ‘0’ VOL ILOAD = 800µA - 0.1 0.5 V ILOAD = 40µA 2.7 - - V Logic ‘1’ VOH 3 HC-5524 Electrical Specifications Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS Power Dissipation On Hook Relay Drivers Off VB+ = 5.25V, VB- = -28V, RLOOP = ∞ IB+ VB+ = 5.25V, VB- = -28V, RLOOP = ∞ IB- MIN TYP MAX UNITS - 60 - mW - - 4 mA -4 - - mA IB+ VB+ = 5V, VB- = -24V, RLOOP = 600Ω - 3 6 mA IB- VB+ = 5V, VB- = -24V, RLOOP = 600Ω -28 -24 - mA - ±5 - mV UNCOMMITTED OP AMP PARAMETERS Input Offset Voltage - ±10 - nA (Note 3) - 1 - MΩ Output Voltage Swing RL = 10kΩ - ±3 - VP-P Small Signal GBW (Note 3) - 1 - MHz Input Offset Current Differential Input Resistance NOTE: 3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance. Pin Descriptions SOIC PLCC SYMBOL DESCRIPTION 1 2 AG (Note 4) Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive input terminals. 2 3 VB+ 3 4 C1 Capacitor #C1 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function. 4 8 F1 Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page. F1 should be toggled high after power is applied. 5 9 F0 Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page. 6 10 RS Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse (50µs - 500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5V. 7 11 SHD Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output. 8 12 GKD Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output. 9 13 TST A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper F1, F0 state is set and will keep ALM low. See Truth Table on front page. 10 17 ALM A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on front page. It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduce component life. 11 18 ILIMIT Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage divider. 12 19 OUT1 The analog output of the spare operational amplifier. 13 20 -IN1 Positive Voltage Source - Most Positive Supply. The inverting analog input of the spare operational amplifier. 4 HC-5524 Pin Descriptions (Continued) SOIC PLCC SYMBOL DESCRIPTION 14 22 TIP An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop monitoring purposes. 15 24 RING An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor. Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes. 16 25 RFS Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins must be shorted. 17 27 VRX Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip Feed and Ring Feed amplifiers differentially. 18 31 C2 Capacitor #2 - An external capacitor to be connected between this terminal and ground. It prevents false ring trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines and other noise sources. This capacitor should be nonpolarized. 19 32 VTX Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement two to four wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is necessary. 20 33 PRI A TTL compatible input used to control PR. PRI active High = PR active low. 21 34 PR An active low open collector output. Can be used to drive a Polarity Reversal Relay. 22 35 DG (Note 4) Digital Ground - To be connected to zero potential. Serves as a reference for all digital inputs and outputs on the SLIC. 23 36 RD Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ringing signals onto the 2-Wire line. 24 37 VFB (Note 5) Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal and the spare op-amp to accommodate 2-Wire line impedance matching. (This is not used in the typical applications circuit). 25 38 TF2 Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitudinal currents. Must be tied to TF1. NA 39 TF1 Tie directly to TF2 in the PLCC application. 26 41 RF1 Ring Feed - A low impedance analog output connected to the RING terminal through a feed resistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal currents. Tie directly to RF2. NA 42 RF2 Tie directly to RF1 in the PLCC application. 27 43 VB- The battery voltage source. The most negative supply. 28 44 BG (Note 4) 1, 5, 6, 7, 14, 15, 16, 21, 23, 26, 28, 29, 30, 40 NC Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. No internal connection. NOTES: 4. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 5. Although not used in the typical applications circuit, VFB may be used in matching complex 2-Wire impedances. 5 HC-5524 Pinouts 7 22 DG GKD 8 21 PR TST 9 20 PRI ALM 10 19 VTX ILMT 11 18 C2 OUT 1 12 17 VRX -IN 1 13 16 RFS TIP 14 15 RING 6 N/C SHD RF1 23 RD RF2 6 0 0 Action Normal Loop Feed 0 1 RD Active 1 0 Power Down Latch RESET 1 1 0 1 Power on RESET Loop Power Denial Active 1 44 43 42 41 40 N/C 7 39 TF1 F1 8 38 TF2 F0 9 37 VFB RS SHD 10 36 11 35 RD DG GKD TST 12 34 13 33 N/C N/C 14 32 15 31 VTX C2 N/C 16 30 N/C ALM 17 29 N/C 18 19 20 21 22 23 24 25 26 27 28 VRX N/C RS 3 2 VB- 24 VFB 4 BG 5 F0 RFS N/C F0 5 N/C 25 TF F1 RING 4 VB+ F1 6 AG 26 RF TIP N/C 3 C1 C1 TRUTH TABLE N/C 27 VB- -IN 1 28 BG 2 ILMT 1 OUT 1 AG VB+ N/C HC-5524 (PLCC) TOP VIEW N/C HC-5524 (SOIC) TOP VIEW PR PRI HC-5524 Functional Diagram DIP OR SOIC R TF 25 TF VRX R - 12 13 2R + VFB -IN1 OUT1 17 VTX 24 VB + 19 AG DG 2 - + OP AMP 22 1 28 BIAS NETWORK R/2 27 RF1 BG VB - 2R R R F1 5 TA - R + R 2R F0 SH SHD RS THERM LTD 4.5kΩ RING RFS RTD GKD 100kΩ 15 16 TSD 25kΩ 100kΩ LA - 100kΩ + 100kΩ 25kΩ 6 90kΩ GK IIL LOGIC INTERFACE TIP 14 4 2R 9 TST 20 PRI 21 PR 23 RD FAULT DET 4.5kΩ 7 SHD 8 90kΩ GKD RFC 90kΩ 10 ALM RF - 26 90kΩ + R = 108kΩ RF2 - VB/2 REF 3 RF + 18 GM C2 C1 11 ILIMIT PLCC R 38 VRX TF2 TF1 39 TF 27 R - VFB 20 19 37 VTX VB+ 32 3 DG 35 AG 2 44 2R + -IN 1 OUT 1 - + OP AMP BIAS NETWORK R/2 43 RF1 2R F0 TA - R + R 2R SH SHD RS THERM LTD 4.5kΩ RING RFS 24 25 TSD 25kΩ 100kΩ 100kΩ - 10 LA 100kΩ + 100kΩ 25kΩ RTD GKD 90kΩ GK 13 TST 33 PRI 34 PR 36 RD 11 FAULT DET 4.5kΩ IIL LOGIC INTERFACE TIP F1 9 R 22 VB- 8 2R R BG SHD 12 GKD 90kΩ 42 RF2 RF1 41 RFC 90kΩ 17 ALM RF - 90kΩ + GM VB/2 REF 31 4 C1 7 - + C2 RF2 18 ILIMIT NOTES: 6. R = 108kΩ. 7. NC = 1, 5, 6, 7, 14, 15, 16, 21, 23, 26, 28, 29, 30, 40. HC-5524 Logic Diagram RS TTL TO I2L RELAY DRIVER RD TTL TO I2L F0 I2L TO TTL GKD GK I2L TO TTL SHD THERMAL SHUT DOWN TTL TO I2L I2L TO TTL ALM F1 PD SH THERMAL SHUTDOWN LATCH TO BIAS NETWORK TTL TO I2L INJ A B C A B TEST C KEY Overvoltage Protection and Longitudinal Current Protection The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maximum or 40mARMS, 20mARMS per leg, without any performance degradation. TABLE 1. PARAMETER TEST CONDITION Longitudinal Surge 10µs Rise/ Metallic Surge 10µs Rise/ PERFORMANCE (MAX) UNITS ±1000 (Plastic) VPEAK ±1000 (Plastic) VPEAK ±1000 (Plastic) VPEAK 700 (Plastic) V RMS 1000µs Fall 1000µs Fall T/GND 10µs Rise/ R/GND 1000µs Fall 50/60Hz Current 8 T/GND 11 Cycles R/GND Limited to 10ARMS HC-5524 Typical Applications 5V SYSTEM CONTROLLER 5V K1 CS1 RS1 K2 PR K1A TIP SHD GKD PRI RS TEST F1 ALARM F0 RD RB1 SECONDARY PROTECTION (NOTE 6) RL2 TIP ILIMIT TF1 (NOTE 7) VRX+ TF2 (NOTE 7) VFB VBC5 CAC SLIC HC-5524 PRIMARY PROTECTION VTX KRF RF2 (NOTE 7) RS2 KIB -IN1 RF1 (NOTE 7) K(Z0 - RF/2) CS2 RFS VRING 150VPEAK (MAX) RING Z1 FROM PCM FILTER/CODER RL1 OUT1 TO HYBRID BALANCE NETWORK RB2 RING VB- BG C2 DG AG VB+ C1 PTC C3 C4 5V FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC Typical Component Values C1 = 0.5µF, 20V. ILIMIT = (.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100kΩ. C2 = 1.0µF ±10%, 20V (for other values of C2, refer to AN9667). KRF = 20kΩ, RF = 2(RB1+RB2), K = Scaling Factor = 100). C3 = 0.01µF, 50V ±20%. RB1 = RB2 = 50Ω (1% absolute, matching requirements covered in a Tech Brief). C4 = 0.01µF, 50V ±20%. RS1 = RS2 = 1kΩ typically. C5 = 0.01µF, 50V ±20%. CS1 = CS2 = 0.1µF, 200V typically, depending on VRing and line length. CAC = 0.5µF, 20V. K(Z0 - RF/2) = 50kΩ, (Z0 = 600Ω, K = Scaling Factor = 100). RL1, RL2; Current Limit Setting Resistors. RL1+RL2 > 90kΩ. Z1 = 150V to 200V transient protector. PTC used as ring generator ballast. NOTES: 8. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 9. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used. 10. Secondary protection diode bridge recommended is 3A, 200V type. 11. TF1, TF2 and RF1, RF2 are on PLCC only and should be connected together as shown. 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