UNISONIC TECHNOLOGIES CO., LTD UC3842A/3843A LINEAR INTEGRATED CIRCUIT CURRENT MODE PWM CONTROL CIRCUITS DESCRIPTION The UTC UC3842A/3843A provide the necessary functions to implement off-line or DC to DC fixed frequency current mode , controlled switching circuits with minimal external components. FEATURES *Low Start Up Current ( Typical 0.12mA ) *Automatic Feed Forward Compensation *Pulse-by-Pulse Current Limiting *Under-voltage Lockout with Hysteresis *Double Pulse Suppression *High Current Totem Pole Output to Drive MOSFET Directly *Internally Trimmed Band Gap Reference *500kHz Operation ORDERING INFORMATION Ordering Number Lead Free Halogen Free UC3842AL-D08-T UC3842AP-D08-T UC3842AP-S08-R UC3843AL-D08-T UC3843AP-D08-T UC3843AP-S08-R Package Packing DIP-8 SOP-8 DIP-8 SOP-8 Tube Tape Reel Tube Tape Reel MARKING Package UC3842A UC3843A 8 DIP-8 7 6 5 UTC UC3843A 1 2 3 4 Date Code L: Lead Free P: Halogen Free Lot Code SOP-8 www.unisonic.com.tw Copyright © 2015 Unisonic Technologies Co., Ltd 1 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT PIN CONFIGURATION COMP 1 8 VREF VFB 2 7 VCC Current Sense 3 6 Output RT/CT 4 5 GND BLOCK DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS (TA=25°C, unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage(Low Impedance Source) VCC 30 V Supply Voltage(ICC<30mA) VCC Self Limiting V Analog Inputs (Pin 2,3) VI(ANA) -0.3 ~ +6.3 V Output Current (Peak ) IO(PEAK) ±1 A Error Amplifier Output Sink Current ISINK(EA) 10 mA Output Energy (Capacity Load) 5 μJ DIP-8 1250 Power Dissipation( TA≦25°C) mW PD SOP-8 800 8 mW/°C Derated at TA>25°C Junction Temperature TJ +150 °C Storage Temperature TSTG -65 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (0°C≦TA≦70°C, VCC=15V, RT=10kΩ, CT=3.3nF, unless otherwise specified) PARAMETER REFERENCE SECTION Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit OSCILLATOR SECTION Initial Accuracy Voltage Stability Temperature Stability Amplitude ERROR AMPLIFIER SECTION Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low SYMBOL VREF VREF VREF VOSC TEST CONDITIONS TJ=25°C, IOUT=1mA 12≦VIN25V 1≦IOUT=20mA (Note 1) Line, Load, Temp (Note 1) 10Hz≦f≦10kHz,TJ=25°C (Note 1) TA=25°C,1000Hrs (Note 1) ISC f f/VCC VOSC VI(EA) II(BIAS) IO(SINK) IO(SOURCE) VOH VOL TYP MAX UNIT 4.9 5 6 6 0.2 5.1 20 25 0.4 5.18 V mV mV mV/°C V μV mV mA 4.82 -30 TJ=25°C 12≦VCC≦25V TMIN≦TA≦TMAX (Note 1) VPIN4 peak to peak 50 5 -100 25 -180 47 52 0.2 5 1.7 57 1 kHz % % V VPIN1=2.5V 2.42 2.58 -2 2V ≦VOUT≦4V TJ=25°C (Note 1) I2≦VCC≦25V VPIN2=2.7V,VPIN1=1.1V VPIN2=2.3V,VPIN1=5V VPIN2=2.3V, RL=15kΩ to GND VPIN2=2.7V,VPIN1=1.1V 60 0.7 60 2 -0.5 5 2.50 -0.3 90 1 70 6 -0.8 6 0.7 V A dB MHz dB mA mA V V UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 1.1 3 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER CURRENT SENSE SECTION Gain Maximum Input signal PSRR Input Bias Current Delay to Output OUTPUT SECTION SYMBOL GV VI(MAX) TEST CONDITIONS (Note 2, 3) VPIN1=5V( Note 2) 12V≦VCC≦25V MIN TYP MAX UNIT 2.85 0.9 3 1 70 -2 150 3.15 1.1 V/V V dB A ns 0.1 1.5 13.5 13.5 50 50 0.4 2.2 150 150 V V V V ns ns 16 8.4 10 7.6 17.5 9 11.5 8.2 V V V V 97 100 0 % % 0.12 11 34 0.3 17 mA mA V IBIAS VPIN3=0 to 2V IO(SINK)=20mA IO(SINK)=200mA Output Level IO(SOURCE)=20mA 13 High VOH 12 IO(SOURCE)=200mA Rise Time tR TJ=25°C, CL=1nF (Note 1) Fall Time tF TJ=25°C, CL=1nF (Note 1) UNDER-VOLTAGE LOCKOUT OUTPUT SECTION 3842A 14.5 Start Threshold VTH(ST) 3843A 7.8 3842A 8.5 Min. Operating Voltage VOPR(MIN) After Turn On 3843A 7 PWM SECTION MAX D(MAX) 95 Duty Cycle MIN D(MIN) TOTAL STANDBY CURRENT Start-up Current IST Operating Supply Current ICC(OPR) VPIN2=VPIN3=0V VCC Zener Voltage Vz ICC=25mA Notes: 1. These parameters, although guaranteed, are not 100% tested in production. 2. Parameters measured at trip point of latch with VPIN 2=0. 3. Gain defined as: Low VOL -10 300 4. Adjust VCC above the start threshold before setting at 15V. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT OPEN-LOOP LABORATORY TEST FIXTURE High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used to sample the oscillator waveform and apply an adjustable Ramp to Pin 3. UNDER-VOLTAGE LOCKOUT During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to GND with a bleeder resistor to prevent activating the power switch with output leakage currents. ERROR AMPLIFIER CONFIGURATION 2.5V 0.5mA 2 Zi Zf 1 Error amplifier can source or sink up to 0.5mA UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT CURRENT SENSE CIRCUIT Error Amplifier 2R Is R 1 R Rs C 1V Current Sense Comparator 3 5 Peak current (Is) determined by the formula: ISMAX=1.0V/Rs. A small RC filter be required to suppress switch transients. SLOPE COMPENSATION 0.1 F A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converts requiring duty cycles over 50%.Note that capacitor C, forms a filter with R2 to suppress the leading edge switch spikes. OSCILLATOR SECTION Dead time vs. CT(RT>5kΩ) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw Timing Resistance vs. Frequency RT (kΩ) td (μs) 6 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT SHUTDOWN TECHNIQUES 1kΩ Shutdown 330Ω 3 500Ω Shutdown 1 8 To current Sense resistor Shutdown UTC UC3842A can be accomplished by two methods; either raise Pin 3 above 1V or pull Pin 1 below a voltage two diode drops above ground. Either method caused the output of PWM comparator to be high(refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at Pins 1 and/or 3 is removed. In one example, an externally latched shut-down may be accomplished by adding an SCR which be reset by cycling VCC below the lower UVLO threshold. At this point the reference turns off allowing the SCR to reset. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 9 QW-R103-002.H UC3842A/3843A TYPICAL CHARACTERISTICS Error Amplifier Open-Loop Frequency Response Istart Temperature Drift VREF Temperature Drift 550 5.02 5.01 PHASE (Degree) Voltage Gain (dB) Output Saturation Characteristics Saturation Voltage (V) LINEAR INTEGRATED CIRCUIT Vcc=15V IOUT=1mA 500 Vcc=9V 5.00 450 4.99 400 4.98 350 4.97 300 4.96 -50 -25 0 25 50 75 100 125 150 Temperature (℃) 250 -50 -25 0 25 50 75 100 125 150 Temperature (℃) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 9 QW-R103-002.H UC3842A/3843A LINEAR INTEGRATED CIRCUIT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 9 QW-R103-002.H